* [PATCH 1/9] arm64: dts: h3ulcb: follow sound CTU/MIX supports
2017-01-27 9:14 [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.11 Simon Horman
@ 2017-01-27 9:14 ` Simon Horman
2017-01-27 9:14 ` [PATCH 2/9] arm64: dts: r8a7795: Add missing power-domains property for sata Simon Horman
` (8 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Simon Horman @ 2017-01-27 9:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
commit 5bcd74e8a30d9259 ("arm64: dts: r8a7795: add sound MIX support")
commit 5be5ee41d011f26b ("arm64: dts: r8a7795: add sound CTU support")
added MIX/CTU support, and it updated clocks on SoC level.
Thus, h3ulcb should be updated
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
index 6ffb0517421a..553d8968c0cf 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts
@@ -277,6 +277,8 @@
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
+ <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
+ <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clk_a>, <&cs2000>,
<&audio_clk_c>,
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 2/9] arm64: dts: r8a7795: Add missing power-domains property for sata
2017-01-27 9:14 [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.11 Simon Horman
2017-01-27 9:14 ` [PATCH 1/9] arm64: dts: h3ulcb: follow sound CTU/MIX supports Simon Horman
@ 2017-01-27 9:14 ` Simon Horman
2017-01-27 9:14 ` [PATCH 3/9] arm64: dts: r8a7795: Add R-Car Gen3 thermal support Simon Horman
` (7 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Simon Horman @ 2017-01-27 9:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
This went unnoticed as the sata_rcar driver doesn't support Runtime PM
yet, but manages module clocks manually.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 972e379c0596..026a16ac41b4 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1148,6 +1148,7 @@
reg = <0 0xee300000 0 0x1fff>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 815>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
status = "disabled";
};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 3/9] arm64: dts: r8a7795: Add R-Car Gen3 thermal support
2017-01-27 9:14 [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.11 Simon Horman
2017-01-27 9:14 ` [PATCH 1/9] arm64: dts: h3ulcb: follow sound CTU/MIX supports Simon Horman
2017-01-27 9:14 ` [PATCH 2/9] arm64: dts: r8a7795: Add missing power-domains property for sata Simon Horman
@ 2017-01-27 9:14 ` Simon Horman
2017-01-27 9:14 ` [PATCH 4/9] arm64: dts: r8a7796: " Simon Horman
` (6 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Simon Horman @ 2017-01-27 9:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Hien Dang <hien.dang.eb@renesas.com>
Signed-off-by: Thao Nguyen <thao.nguyen.yb@rvc.renesas.com>
Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
Signed-off-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 58 ++++++++++++++++++++++++++++++++
1 file changed, 58 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 026a16ac41b4..d36783e751af 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1647,5 +1647,63 @@
};
};
};
+
+ tsc: thermal at e6198000 {
+ compatible = "renesas,r8a7795-thermal";
+ reg = <0 0xe6198000 0 0x68>,
+ <0 0xe61a0000 0 0x5c>,
+ <0 0xe61a8000 0 0x5c>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ #thermal-sensor-cells = <1>;
+ status = "okay";
+ };
+
+ thermal-zones {
+ sensor_thermal1: sensor-thermal1 {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&tsc 0>;
+
+ trips {
+ sensor1_crit: sensor1-crit {
+ temperature = <120000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ sensor_thermal2: sensor-thermal2 {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&tsc 1>;
+
+ trips {
+ sensor2_crit: sensor2-crit {
+ temperature = <120000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ sensor_thermal3: sensor-thermal3 {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&tsc 2>;
+
+ trips {
+ sensor3_crit: sensor3-crit {
+ temperature = <120000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+ };
};
};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 4/9] arm64: dts: r8a7796: Add R-Car Gen3 thermal support
2017-01-27 9:14 [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.11 Simon Horman
` (2 preceding siblings ...)
2017-01-27 9:14 ` [PATCH 3/9] arm64: dts: r8a7795: Add R-Car Gen3 thermal support Simon Horman
@ 2017-01-27 9:14 ` Simon Horman
2017-01-27 9:14 ` [PATCH 5/9] arm64: dts: r8a7795: Link ARM GIC to clock and clock domain Simon Horman
` (5 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Simon Horman @ 2017-01-27 9:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Hien Dang <hien.dang.eb@renesas.com>
Signed-off-by: Thao Nguyen <thao.nguyen.yb@rvc.renesas.com>
Signed-off-by: Khiem Nguyen <khiem.nguyen.xt@renesas.com>
Signed-off-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 58 ++++++++++++++++++++++++++++++++
1 file changed, 58 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index eb446d966621..67aa0e4fde77 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -680,5 +680,63 @@
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
status = "disabled";
};
+
+ tsc: thermal at e6198000 {
+ compatible = "renesas,r8a7796-thermal";
+ reg = <0 0xe6198000 0 0x68>,
+ <0 0xe61a0000 0 0x5c>,
+ <0 0xe61a8000 0 0x5c>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ #thermal-sensor-cells = <1>;
+ status = "okay";
+ };
+
+ thermal-zones {
+ sensor_thermal1: sensor-thermal1 {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&tsc 0>;
+
+ trips {
+ sensor1_crit: sensor1-crit {
+ temperature = <120000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ sensor_thermal2: sensor-thermal2 {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&tsc 1>;
+
+ trips {
+ sensor2_crit: sensor2-crit {
+ temperature = <120000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+
+ sensor_thermal3: sensor-thermal3 {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&tsc 2>;
+
+ trips {
+ sensor3_crit: sensor3-crit {
+ temperature = <120000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+ };
};
};
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 5/9] arm64: dts: r8a7795: Link ARM GIC to clock and clock domain
2017-01-27 9:14 [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.11 Simon Horman
` (3 preceding siblings ...)
2017-01-27 9:14 ` [PATCH 4/9] arm64: dts: r8a7796: " Simon Horman
@ 2017-01-27 9:14 ` Simon Horman
2017-01-27 9:14 ` [PATCH 6/9] arm64: dts: r8a7796: " Simon Horman
` (4 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Simon Horman @ 2017-01-27 9:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Link the ARM GIC to the INTC-AP module clock, and add it to the SYSC
"always-on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index d36783e751af..8b030c323c10 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -166,6 +166,9 @@
<0x0 0xf1060000 0 0x20000>;
interrupts = <GIC_PPI 9
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
};
wdt0: watchdog at e6020000 {
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 6/9] arm64: dts: r8a7796: Link ARM GIC to clock and clock domain
2017-01-27 9:14 [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.11 Simon Horman
` (4 preceding siblings ...)
2017-01-27 9:14 ` [PATCH 5/9] arm64: dts: r8a7795: Link ARM GIC to clock and clock domain Simon Horman
@ 2017-01-27 9:14 ` Simon Horman
2017-01-27 9:14 ` [PATCH 7/9] arm64: dts: r8a7795: tidyup audma definition order Simon Horman
` (3 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Simon Horman @ 2017-01-27 9:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Link the ARM GIC to the INTC-AP module clock, and add it to the SYSC
"always-on" PM Domain, so it can be power managed using that clock.
Note that currently the GIC-400 driver doesn't support module clocks nor
Runtime PM, so this must be handled as a critical clock.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 67aa0e4fde77..82c5ef1b6065 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -101,6 +101,9 @@
<0x0 0xf1060000 0 0x20000>;
interrupts = <GIC_PPI 9
(GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
};
timer {
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 7/9] arm64: dts: r8a7795: tidyup audma definition order
2017-01-27 9:14 [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.11 Simon Horman
` (5 preceding siblings ...)
2017-01-27 9:14 ` [PATCH 6/9] arm64: dts: r8a7796: " Simon Horman
@ 2017-01-27 9:14 ` Simon Horman
2017-01-27 9:14 ` [PATCH 8/9] arm64: dts: r8a7795: Mark EthernetAVB device node disabled Simon Horman
` (2 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Simon Horman @ 2017-01-27 9:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Current r8a7795.dtsi defines audma -> ipmmu -> dma order.
Because of this order, dma can connect to ipmmu, but
audma can't connect to it.
This patch moves audma order as ipmmu -> dma -> audma.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 132 +++++++++++++++----------------
1 file changed, 66 insertions(+), 66 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 8b030c323c10..74a4e1ad057d 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -340,72 +340,6 @@
#power-domain-cells = <1>;
};
- audma0: dma-controller at ec700000 {
- compatible = "renesas,dmac-r8a7795",
- "renesas,rcar-dmac";
- reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14", "ch15";
- clocks = <&cpg CPG_MOD 502>;
- clock-names = "fck";
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- #dma-cells = <1>;
- dma-channels = <16>;
- };
-
- audma1: dma-controller at ec720000 {
- compatible = "renesas,dmac-r8a7795",
- "renesas,rcar-dmac";
- reg = <0 0xec720000 0 0x10000>;
- interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14", "ch15";
- clocks = <&cpg CPG_MOD 501>;
- clock-names = "fck";
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- #dma-cells = <1>;
- dma-channels = <16>;
- };
-
pfc: pfc at e6060000 {
compatible = "renesas,pfc-r8a7795";
reg = <0 0xe6060000 0 0x50c>;
@@ -525,6 +459,72 @@
dma-channels = <16>;
};
+ audma0: dma-controller at ec700000 {
+ compatible = "renesas,dmac-r8a7795",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ };
+
+ audma1: dma-controller at ec720000 {
+ compatible = "renesas,dmac-r8a7795",
+ "renesas,rcar-dmac";
+ reg = <0 0xec720000 0 0x10000>;
+ interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ };
+
avb: ethernet at e6800000 {
compatible = "renesas,etheravb-r8a7795",
"renesas,etheravb-rcar-gen3";
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 8/9] arm64: dts: r8a7795: Mark EthernetAVB device node disabled
2017-01-27 9:14 [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.11 Simon Horman
` (6 preceding siblings ...)
2017-01-27 9:14 ` [PATCH 7/9] arm64: dts: r8a7795: tidyup audma definition order Simon Horman
@ 2017-01-27 9:14 ` Simon Horman
2017-01-27 9:14 ` [PATCH 9/9] arm64: dts: r8a7796: " Simon Horman
2017-01-30 4:57 ` [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.11 Olof Johansson
9 siblings, 0 replies; 11+ messages in thread
From: Simon Horman @ 2017-01-27 9:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Device nodes representing I/O devices should be marked disabled in the
SoC-specific DTS, and overridden by board-specific DTSes where needed.
Fixes: a92843c8a6f8c039 ("arm64: dts: r8a7795: add EthernetAVB device node")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 74a4e1ad057d..eac4f29aa5cd 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -566,6 +566,7 @@
phy-mode = "rgmii-id";
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
can0: can at e6c30000 {
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH 9/9] arm64: dts: r8a7796: Mark EthernetAVB device node disabled
2017-01-27 9:14 [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.11 Simon Horman
` (7 preceding siblings ...)
2017-01-27 9:14 ` [PATCH 8/9] arm64: dts: r8a7795: Mark EthernetAVB device node disabled Simon Horman
@ 2017-01-27 9:14 ` Simon Horman
2017-01-30 4:57 ` [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.11 Olof Johansson
9 siblings, 0 replies; 11+ messages in thread
From: Simon Horman @ 2017-01-27 9:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Device nodes representing I/O devices should be marked disabled in the
SoC-specific DTS, and overridden by board-specific DTSes where needed.
Fixes: 8e8b9eaef8fb05d9 ("arm64: dts: renesas: r8a7796: Add EthernetAVB instance")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 82c5ef1b6065..f7120cdedd0d 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -472,6 +472,7 @@
phy-mode = "rgmii-id";
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
scif2: serial at e6e88000 {
--
2.7.0.rc3.207.g0ac5344
^ permalink raw reply related [flat|nested] 11+ messages in thread* [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.11
2017-01-27 9:14 [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v4.11 Simon Horman
` (8 preceding siblings ...)
2017-01-27 9:14 ` [PATCH 9/9] arm64: dts: r8a7796: " Simon Horman
@ 2017-01-30 4:57 ` Olof Johansson
9 siblings, 0 replies; 11+ messages in thread
From: Olof Johansson @ 2017-01-30 4:57 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Jan 27, 2017 at 10:14:27AM +0100, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these second round of Renesas ARM64 based SoC DT updates for v4.11.
>
> This pull request is based on the previous round of
> such requests, tagged as renesas-arm64-dt-for-v4.11,
> which you have already pulled.
>
>
> The following changes since commit b2b9443beee5017ebdb3f2be9ef472c73d260481:
>
> arm64: dts: r8a7795: Add PWM support (2017-01-04 10:00:44 +0100)
>
> are available in the git repository at:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-arm64-dt2-for-v4.11
>
> for you to fetch changes up to 7e1c23b94ed7f0d2719795a9828402003de5335d:
>
> arm64: dts: r8a7796: Mark EthernetAVB device node disabled (2017-01-27 10:09:02 +0100)
>
> ----------------------------------------------------------------
> Second Round of Renesas ARM64 Based SoC DT Updates for v4.11
>
> r8a779[56] SoCs:
> * Mark EthernetAVB device node disabled in DT for r8a779[56] SoCs
> - They are enabled as appropriate in board DT files
> * Link ARM GIC to clock and clock domain on r8a779[56] SoCs
> * Add thermal support
>
> r8a7795 SoC:
> * Tidyup audma definition order on r8a7795 SoC
> * Add missing power-domains property for SATA
>
> r8a7795/h3ulcb board:
> * Add MIX/CTU support as per support present in DT for r8a7796
Merged, thanks!
-Olof
^ permalink raw reply [flat|nested] 11+ messages in thread