* [PATCH 001/102] arm64: dts: renesas: r8a77965: add usb2_phy nodes
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 002/102] arm64: dts: renesas: r8a77965: add usb3_phy node Simon Horman
` (101 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch add usb2_phy nodes for r8a77965.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index f0871fcdd984..d498274fa0f3 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -650,13 +650,26 @@
};
usb2_phy0: usb-phy at ee080200 {
+ compatible = "renesas,usb2-phy-r8a77965",
+ "renesas,rcar-gen3-usb2-phy";
reg = <0 0xee080200 0 0x700>;
- /* placeholder */
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 703>;
+ #phy-cells = <0>;
+ status = "disabled";
};
usb2_phy1: usb-phy at ee0a0200 {
+ compatible = "renesas,usb2-phy-r8a77965",
+ "renesas,rcar-gen3-usb2-phy";
reg = <0 0xee0a0200 0 0x700>;
- /* placeholder */
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 703>;
+ #phy-cells = <0>;
+ status = "disabled";
};
ohci1: usb at ee0a0000 {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 002/102] arm64: dts: renesas: r8a77965: add usb3_phy node
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
2018-05-18 11:14 ` [PATCH 001/102] arm64: dts: renesas: r8a77965: add usb2_phy nodes Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 003/102] arm64: dts: renesas: r8a77965: add USB 2.0 host nodes Simon Horman
` (100 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds usb3_phy node for r8a77965.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index d498274fa0f3..abb4d4dcc0ed 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -868,9 +868,16 @@
};
usb3_phy0: usb-phy at e65ee000 {
+ compatible = "renesas,r8a77965-usb3-phy",
+ "renesas,rcar-gen3-usb3-phy";
reg = <0 0xe65ee000 0 0x90>;
+ clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
+ <&usb_extal_clk>;
+ clock-names = "usb3-if", "usb3s_clk", "usb_extal";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 328>;
#phy-cells = <0>;
- /* placeholder */
+ status = "disabled";
};
usb3_peri0: usb at ee020000 {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 003/102] arm64: dts: renesas: r8a77965: add USB 2.0 host nodes
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
2018-05-18 11:14 ` [PATCH 001/102] arm64: dts: renesas: r8a77965: add usb2_phy nodes Simon Horman
2018-05-18 11:14 ` [PATCH 002/102] arm64: dts: renesas: r8a77965: add usb3_phy node Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 004/102] arm64: dts: renesas: r8a77965: add usb_dmac nodes Simon Horman
` (99 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds USB 2.0 host (EHCI/OHCI) nodes for r8a77965.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 38 +++++++++++++++++++++++++++----
1 file changed, 34 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index abb4d4dcc0ed..ecc34ced3be2 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -640,13 +640,28 @@
};
ohci0: usb at ee080000 {
+ compatible = "generic-ohci";
reg = <0 0xee080000 0 0x100>;
- /* placeholder */
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ phys = <&usb2_phy0>;
+ phy-names = "usb";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 703>;
+ status = "disabled";
};
ehci0: usb at ee080100 {
+ compatible = "generic-ehci";
reg = <0 0xee080100 0 0x100>;
- /* placeholder */
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ phys = <&usb2_phy0>;
+ phy-names = "usb";
+ companion = <&ohci0>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 703>;
+ status = "disabled";
};
usb2_phy0: usb-phy at ee080200 {
@@ -673,13 +688,28 @@
};
ohci1: usb at ee0a0000 {
+ compatible = "generic-ohci";
reg = <0 0xee0a0000 0 0x100>;
- /* placeholder */
+ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 702>;
+ phys = <&usb2_phy1>;
+ phy-names = "usb";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 702>;
+ status = "disabled";
};
ehci1: usb at ee0a0100 {
+ compatible = "generic-ehci";
reg = <0 0xee0a0100 0 0x100>;
- /* placeholder */
+ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 702>;
+ phys = <&usb2_phy1>;
+ phy-names = "usb";
+ companion = <&ohci1>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 702>;
+ status = "disabled";
};
i2c0: i2c at e6500000 {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 004/102] arm64: dts: renesas: r8a77965: add usb_dmac nodes
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (2 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 003/102] arm64: dts: renesas: r8a77965: add USB 2.0 host nodes Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 005/102] arm64: dts: renesas: r8a77965: add HS-USB node Simon Horman
` (98 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds USB-DMAC nodes for r8a77965.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index ecc34ced3be2..e5a5dd9d43da 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -832,6 +832,34 @@
};
};
+ usb_dmac0: dma-controller at e65a0000 {
+ compatible = "renesas,r8a77965-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65a0000 0 0x100>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 330>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 330>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
+
+ usb_dmac1: dma-controller at e65b0000 {
+ compatible = "renesas,r8a77965-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65b0000 0 0x100>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 331>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 331>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
+
hsusb: usb at e6590000 {
reg = <0 0xe6590000 0 0x100>;
/* placeholder */
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 005/102] arm64: dts: renesas: r8a77965: add HS-USB node
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (3 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 004/102] arm64: dts: renesas: r8a77965: add usb_dmac nodes Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 006/102] arm64: dts: renesas: r8a77965: add USB 3.0 host node Simon Horman
` (97 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds HS-USB node for r8a77965.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 14 +++++++++++++-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index e5a5dd9d43da..ac74413d006f 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -861,8 +861,20 @@
};
hsusb: usb at e6590000 {
+ compatible = "renesas,usbhs-r8a7796",
+ "renesas,rcar-gen3-usbhs";
reg = <0 0xe6590000 0 0x100>;
- /* placeholder */
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 704>;
+ dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
+ <&usb_dmac1 0>, <&usb_dmac1 1>;
+ dma-names = "ch0", "ch1", "ch2", "ch3";
+ renesas,buswait = <11>;
+ phys = <&usb2_phy0>;
+ phy-names = "usb";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 704>;
+ status = "disabled";
};
pciec0: pcie at fe000000 {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 006/102] arm64: dts: renesas: r8a77965: add USB 3.0 host node
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (4 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 005/102] arm64: dts: renesas: r8a77965: add HS-USB node Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 007/102] arm64: dts: renesas: r8a77965: add USB 3.0 peripheral node Simon Horman
` (96 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds USB 3.0 host node for r8a77965.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index ac74413d006f..a34b80a0f304 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -956,8 +956,14 @@
};
xhci0: usb at ee000000 {
+ compatible = "renesas,xhci-r8a77965",
+ "renesas,rcar-gen3-xhci";
reg = <0 0xee000000 0 0xc00>;
- /* placeholder */
+ interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 328>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 328>;
+ status = "disabled";
};
wdt0: watchdog at e6020000 {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 007/102] arm64: dts: renesas: r8a77965: add USB 3.0 peripheral node
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (5 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 006/102] arm64: dts: renesas: r8a77965: add USB 3.0 host node Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 008/102] arm64: dts: renesas: r8a77970: Update IPMMU DS1 bit number Simon Horman
` (95 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds USB 3.0 peripheral node for r8a77965.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index a34b80a0f304..6f748e94a901 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -951,8 +951,14 @@
};
usb3_peri0: usb at ee020000 {
+ compatible = "renesas,r8a77965-usb3-peri",
+ "renesas,rcar-gen3-usb3-peri";
reg = <0 0xee020000 0 0x400>;
- /* placeholder */
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 328>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 328>;
+ status = "disabled";
};
xhci0: usb at ee000000 {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 008/102] arm64: dts: renesas: r8a77970: Update IPMMU DS1 bit number
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (6 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 007/102] arm64: dts: renesas: r8a77965: add USB 3.0 peripheral node Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 009/102] arm64: dts: renesas: r8a7796: sort subnodes of the root node Simon Horman
` (94 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Judging by "R-Car-Gen3-rev0.80" IPMMU IMSSTR register documentation
for [R-Car V3M] the DS1 bit field should be bit 0.
Update the ipmmu-main property to make it match the data sheet.
Fixes: ce3b52a1595b ("arm64: dts: renesas: r8a77970: Add IPMMU device nodes")
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index c6db8ea43906..e8358d9bfd66 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -160,7 +160,7 @@
ipmmu_ds1: mmu at e7740000 {
compatible = "renesas,ipmmu-r8a77970";
reg = <0 0xe7740000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 1>;
+ renesas,ipmmu-main = <&ipmmu_mm 0>;
power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
#iommu-cells = <1>;
};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 009/102] arm64: dts: renesas: r8a7796: sort subnodes of the root node
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (7 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 008/102] arm64: dts: renesas: r8a77970: Update IPMMU DS1 bit number Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 010/102] arm64: dts: renesas: r8a7796: sort subnodes of the soc node Simon Horman
` (93 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
Sort subnodes of the root node alphanumerically.
This is part of an ongoing effort to provide consistent node
order in the DT of Renesas SoCs to improve maintainability.
This should not have any run-time effect.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 162 +++++++++++++++----------------
1 file changed, 81 insertions(+), 81 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 556eb8e45499..78fbb4fd34bf 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -60,6 +60,72 @@
clock-frequency = <0>;
};
+ cluster0_opp: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <820000>;
+ clock-latency-ns = <300000>;
+ };
+ opp-1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <820000>;
+ clock-latency-ns = <300000>;
+ };
+ opp-1500000000 {
+ opp-hz = /bits/ 64 <1500000000>;
+ opp-microvolt = <820000>;
+ clock-latency-ns = <300000>;
+ };
+ opp-1600000000 {
+ opp-hz = /bits/ 64 <1600000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp-1700000000 {
+ opp-hz = /bits/ 64 <1700000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp-1800000000 {
+ opp-hz = /bits/ 64 <1800000000>;
+ opp-microvolt = <960000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ };
+
+ cluster1_opp: opp_table1 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = <820000>;
+ clock-latency-ns = <300000>;
+ };
+ opp-1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <820000>;
+ clock-latency-ns = <300000>;
+ };
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <820000>;
+ clock-latency-ns = <300000>;
+ };
+ opp-1300000000 {
+ opp-hz = /bits/ 64 <1300000000>;
+ opp-microvolt = <820000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -161,72 +227,6 @@
clock-frequency = <0>;
};
- cluster0_opp: opp_table0 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-500000000 {
- opp-hz = /bits/ 64 <500000000>;
- opp-microvolt = <820000>;
- clock-latency-ns = <300000>;
- };
- opp-1000000000 {
- opp-hz = /bits/ 64 <1000000000>;
- opp-microvolt = <820000>;
- clock-latency-ns = <300000>;
- };
- opp-1500000000 {
- opp-hz = /bits/ 64 <1500000000>;
- opp-microvolt = <820000>;
- clock-latency-ns = <300000>;
- };
- opp-1600000000 {
- opp-hz = /bits/ 64 <1600000000>;
- opp-microvolt = <900000>;
- clock-latency-ns = <300000>;
- turbo-mode;
- };
- opp-1700000000 {
- opp-hz = /bits/ 64 <1700000000>;
- opp-microvolt = <900000>;
- clock-latency-ns = <300000>;
- turbo-mode;
- };
- opp-1800000000 {
- opp-hz = /bits/ 64 <1800000000>;
- opp-microvolt = <960000>;
- clock-latency-ns = <300000>;
- turbo-mode;
- };
- };
-
- cluster1_opp: opp_table1 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-800000000 {
- opp-hz = /bits/ 64 <800000000>;
- opp-microvolt = <820000>;
- clock-latency-ns = <300000>;
- };
- opp-1000000000 {
- opp-hz = /bits/ 64 <1000000000>;
- opp-microvolt = <820000>;
- clock-latency-ns = <300000>;
- };
- opp-1200000000 {
- opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <820000>;
- clock-latency-ns = <300000>;
- };
- opp-1300000000 {
- opp-hz = /bits/ 64 <1300000000>;
- opp-microvolt = <820000>;
- clock-latency-ns = <300000>;
- turbo-mode;
- };
- };
-
/* External PCIe clock - can be overridden by the board */
pcie_bus_clk: pcie_bus {
compatible = "fixed-clock";
@@ -234,13 +234,6 @@
clock-frequency = <0>;
};
- pmu_a57 {
- compatible = "arm,cortex-a57-pmu";
- interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
- <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&a57_0>, <&a57_1>;
- };
-
pmu_a53 {
compatible = "arm,cortex-a53-pmu";
interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
@@ -250,6 +243,13 @@
interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
};
+ pmu_a57 {
+ compatible = "arm,cortex-a57-pmu";
+ interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&a57_0>, <&a57_1>;
+ };
+
psci {
compatible = "arm,psci-1.0", "arm,psci-0.2";
method = "smc";
@@ -2063,14 +2063,6 @@
};
};
- timer {
- compatible = "arm,armv8-timer";
- interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
- };
-
thermal-zones {
sensor_thermal1: sensor-thermal1 {
polling-delay-passive = <250>;
@@ -2151,6 +2143,14 @@
};
};
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
/* External USB clocks - can be overridden by the board */
usb3s0_clk: usb3s0 {
compatible = "fixed-clock";
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 010/102] arm64: dts: renesas: r8a7796: sort subnodes of the soc node
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (8 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 009/102] arm64: dts: renesas: r8a7796: sort subnodes of the root node Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 011/102] arm64: dts: renesas: r8a7795: sort subnodes of the root node Simon Horman
` (92 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
Sort subnodes of the soc node.
- The primary key is the bus address.
- The secondary key is the IP block.
- The tertiary key is the node name.
This is part of an ongoing effort to provide consistent node
order in the DT of Renesas SoCs to improve maintainability.
This should not have any run-time effect.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 1824 +++++++++++++++---------------
1 file changed, 912 insertions(+), 912 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 78fbb4fd34bf..55a64169d3d4 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -269,23 +269,6 @@
#size-cells = <2>;
ranges;
- gic: interrupt-controller at f1010000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0x0 0xf1010000 0 0x1000>,
- <0x0 0xf1020000 0 0x20000>,
- <0x0 0xf1040000 0 0x20000>,
- <0x0 0xf1060000 0 0x20000>;
- interrupts = <GIC_PPI 9
- (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 408>;
- };
-
wdt0: watchdog at e6020000 {
compatible = "renesas,r8a7796-wdt",
"renesas,rcar-gen3-wdt";
@@ -421,100 +404,6 @@
reg = <0 0xe6060000 0 0x50c>;
};
- ipmmu_vi0: mmu at febd0000 {
- compatible = "renesas,ipmmu-r8a7796";
- reg = <0 0xfebd0000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 9>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
- };
-
- ipmmu_vc0: mmu at fe6b0000 {
- compatible = "renesas,ipmmu-r8a7796";
- reg = <0 0xfe6b0000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 8>;
- power-domains = <&sysc R8A7796_PD_A3VC>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_pv0: mmu at fd800000 {
- compatible = "renesas,ipmmu-r8a7796";
- reg = <0 0xfd800000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 5>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
- };
-
- ipmmu_pv1: mmu at fd950000 {
- compatible = "renesas,ipmmu-r8a7796";
- reg = <0 0xfd950000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 6>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_ir: mmu at ff8b0000 {
- compatible = "renesas,ipmmu-r8a7796";
- reg = <0 0xff8b0000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 3>;
- power-domains = <&sysc R8A7796_PD_A3IR>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_hc: mmu at e6570000 {
- compatible = "renesas,ipmmu-r8a7796";
- reg = <0 0xe6570000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 2>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_rt: mmu at ffc80000 {
- compatible = "renesas,ipmmu-r8a7796";
- reg = <0 0xffc80000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 7>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_mp: mmu at ec670000 {
- compatible = "renesas,ipmmu-r8a7796";
- reg = <0 0xec670000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 4>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
- };
-
- ipmmu_ds0: mmu at e6740000 {
- compatible = "renesas,ipmmu-r8a7796";
- reg = <0 0xe6740000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 0>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
- };
-
- ipmmu_ds1: mmu at e7740000 {
- compatible = "renesas,ipmmu-r8a7796";
- reg = <0 0xe7740000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 1>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
- };
-
- ipmmu_mm: mmu at e67b0000 {
- compatible = "renesas,ipmmu-r8a7796";
- reg = <0 0xe67b0000 0 0x1000>;
- interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
- };
-
cpg: clock-controller at e6150000 {
compatible = "renesas,r8a7796-cpg-mssr";
reg = <0 0xe6150000 0 0x1000>;
@@ -530,17 +419,27 @@
reg = <0 0xe6160000 0 0x0200>;
};
- prr: chipid at fff00044 {
- compatible = "renesas,prr";
- reg = <0 0xfff00044 0 4>;
- };
-
sysc: system-controller at e6180000 {
compatible = "renesas,r8a7796-sysc";
reg = <0 0xe6180000 0 0x0400>;
#power-domain-cells = <1>;
};
+ tsc: thermal at e6198000 {
+ compatible = "renesas,r8a7796-thermal";
+ reg = <0 0xe6198000 0 0x100>,
+ <0 0xe61a0000 0 0x100>,
+ <0 0xe61a8000 0 0x100>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 522>;
+ #thermal-sensor-cells = <1>;
+ status = "okay";
+ };
+
intc_ex: interrupt-controller at e61c0000 {
compatible = "renesas,intc-ex-r8a7796", "renesas,irqc";
#interrupt-cells = <2>;
@@ -557,92 +456,6 @@
resets = <&cpg 407>;
};
- i2c_dvfs: i2c at e60b0000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7796",
- "renesas,rcar-gen3-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe60b0000 0 0x425>;
- interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 926>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 926>;
- dmas = <&dmac0 0x11>, <&dmac0 0x10>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- pwm0: pwm at e6e30000 {
- compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
- reg = <0 0xe6e30000 0 8>;
- #pwm-cells = <2>;
- clocks = <&cpg CPG_MOD 523>;
- resets = <&cpg 523>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- status = "disabled";
- };
-
- pwm1: pwm at e6e31000 {
- compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
- reg = <0 0xe6e31000 0 8>;
- #pwm-cells = <2>;
- clocks = <&cpg CPG_MOD 523>;
- resets = <&cpg 523>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- status = "disabled";
- };
-
- pwm2: pwm at e6e32000 {
- compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
- reg = <0 0xe6e32000 0 8>;
- #pwm-cells = <2>;
- clocks = <&cpg CPG_MOD 523>;
- resets = <&cpg 523>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- status = "disabled";
- };
-
- pwm3: pwm at e6e33000 {
- compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
- reg = <0 0xe6e33000 0 8>;
- #pwm-cells = <2>;
- clocks = <&cpg CPG_MOD 523>;
- resets = <&cpg 523>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- status = "disabled";
- };
-
- pwm4: pwm at e6e34000 {
- compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
- reg = <0 0xe6e34000 0 8>;
- #pwm-cells = <2>;
- clocks = <&cpg CPG_MOD 523>;
- resets = <&cpg 523>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- status = "disabled";
- };
-
- pwm5: pwm at e6e35000 {
- compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
- reg = <0 0xe6e35000 0 8>;
- #pwm-cells = <2>;
- clocks = <&cpg CPG_MOD 523>;
- resets = <&cpg 523>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- status = "disabled";
- };
-
- pwm6: pwm at e6e36000 {
- compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
- reg = <0 0xe6e36000 0 8>;
- #pwm-cells = <2>;
- clocks = <&cpg CPG_MOD 523>;
- resets = <&cpg 523>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- status = "disabled";
- };
-
i2c0: i2c at e6500000 {
#address-cells = <1>;
#size-cells = <0>;
@@ -758,226 +571,19 @@
status = "disabled";
};
- can0: can at e6c30000 {
- compatible = "renesas,can-r8a7796",
- "renesas,rcar-gen3-can";
- reg = <0 0xe6c30000 0 0x1000>;
- interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 916>,
- <&cpg CPG_CORE R8A7796_CLK_CANFD>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
- assigned-clock-rates = <40000000>;
+ i2c_dvfs: i2c at e60b0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7796",
+ "renesas,rcar-gen3-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe60b0000 0 0x425>;
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 926>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 916>;
- status = "disabled";
- };
-
- can1: can at e6c38000 {
- compatible = "renesas,can-r8a7796",
- "renesas,rcar-gen3-can";
- reg = <0 0xe6c38000 0 0x1000>;
- interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 915>,
- <&cpg CPG_CORE R8A7796_CLK_CANFD>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
- assigned-clock-rates = <40000000>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 915>;
- status = "disabled";
- };
-
- canfd: can at e66c0000 {
- compatible = "renesas,r8a7796-canfd",
- "renesas,rcar-gen3-canfd";
- reg = <0 0xe66c0000 0 0x8000>;
- interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 914>,
- <&cpg CPG_CORE R8A7796_CLK_CANFD>,
- <&can_clk>;
- clock-names = "fck", "canfd", "can_clk";
- assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
- assigned-clock-rates = <40000000>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 914>;
- status = "disabled";
-
- channel0 {
- status = "disabled";
- };
-
- channel1 {
- status = "disabled";
- };
- };
-
- drif00: rif at e6f40000 {
- compatible = "renesas,r8a7796-drif",
- "renesas,rcar-gen3-drif";
- reg = <0 0xe6f40000 0 0x64>;
- interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 515>;
- clock-names = "fck";
- dmas = <&dmac1 0x20>, <&dmac2 0x20>;
- dma-names = "rx", "rx";
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 515>;
- renesas,bonding = <&drif01>;
- status = "disabled";
- };
-
- drif01: rif at e6f50000 {
- compatible = "renesas,r8a7796-drif",
- "renesas,rcar-gen3-drif";
- reg = <0 0xe6f50000 0 0x64>;
- interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 514>;
- clock-names = "fck";
- dmas = <&dmac1 0x22>, <&dmac2 0x22>;
- dma-names = "rx", "rx";
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 514>;
- renesas,bonding = <&drif00>;
- status = "disabled";
- };
-
- drif10: rif at e6f60000 {
- compatible = "renesas,r8a7796-drif",
- "renesas,rcar-gen3-drif";
- reg = <0 0xe6f60000 0 0x64>;
- interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 513>;
- clock-names = "fck";
- dmas = <&dmac1 0x24>, <&dmac2 0x24>;
- dma-names = "rx", "rx";
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 513>;
- renesas,bonding = <&drif11>;
- status = "disabled";
- };
-
- drif11: rif at e6f70000 {
- compatible = "renesas,r8a7796-drif",
- "renesas,rcar-gen3-drif";
- reg = <0 0xe6f70000 0 0x64>;
- interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 512>;
- clock-names = "fck";
- dmas = <&dmac1 0x26>, <&dmac2 0x26>;
- dma-names = "rx", "rx";
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 512>;
- renesas,bonding = <&drif10>;
- status = "disabled";
- };
-
- drif20: rif at e6f80000 {
- compatible = "renesas,r8a7796-drif",
- "renesas,rcar-gen3-drif";
- reg = <0 0xe6f80000 0 0x64>;
- interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 511>;
- clock-names = "fck";
- dmas = <&dmac1 0x28>, <&dmac2 0x28>;
- dma-names = "rx", "rx";
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 511>;
- renesas,bonding = <&drif21>;
- status = "disabled";
- };
-
- drif21: rif at e6f90000 {
- compatible = "renesas,r8a7796-drif",
- "renesas,rcar-gen3-drif";
- reg = <0 0xe6f90000 0 0x64>;
- interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 510>;
- clock-names = "fck";
- dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
- dma-names = "rx", "rx";
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 510>;
- renesas,bonding = <&drif20>;
- status = "disabled";
- };
-
- drif30: rif at e6fa0000 {
- compatible = "renesas,r8a7796-drif",
- "renesas,rcar-gen3-drif";
- reg = <0 0xe6fa0000 0 0x64>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 509>;
- clock-names = "fck";
- dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
- dma-names = "rx", "rx";
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 509>;
- renesas,bonding = <&drif31>;
- status = "disabled";
- };
-
- drif31: rif at e6fb0000 {
- compatible = "renesas,r8a7796-drif",
- "renesas,rcar-gen3-drif";
- reg = <0 0xe6fb0000 0 0x64>;
- interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 508>;
- clock-names = "fck";
- dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
- dma-names = "rx", "rx";
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 508>;
- renesas,bonding = <&drif30>;
- status = "disabled";
- };
-
- avb: ethernet at e6800000 {
- compatible = "renesas,etheravb-r8a7796",
- "renesas,etheravb-rcar-gen3";
- reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
- interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14", "ch15",
- "ch16", "ch17", "ch18", "ch19",
- "ch20", "ch21", "ch22", "ch23",
- "ch24";
- clocks = <&cpg CPG_MOD 812>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 812>;
- phy-mode = "rgmii";
- iommus = <&ipmmu_ds0 16>;
- #address-cells = <1>;
- #size-cells = <0>;
+ resets = <&cpg 926>;
+ dmas = <&dmac0 0x11>, <&dmac0 0x10>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -1069,162 +675,61 @@
status = "disabled";
};
- scif0: serial at e6e60000 {
- compatible = "renesas,scif-r8a7796",
- "renesas,rcar-gen3-scif", "renesas,scif";
- reg = <0 0xe6e60000 0 64>;
- interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 207>,
- <&cpg CPG_CORE R8A7796_CLK_S3D1>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac1 0x51>, <&dmac1 0x50>,
- <&dmac2 0x51>, <&dmac2 0x50>;
- dma-names = "tx", "rx", "tx", "rx";
+ hsusb: usb at e6590000 {
+ compatible = "renesas,usbhs-r8a7796",
+ "renesas,rcar-gen3-usbhs";
+ reg = <0 0xe6590000 0 0x100>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 704>;
+ dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
+ <&usb_dmac1 0>, <&usb_dmac1 1>;
+ dma-names = "ch0", "ch1", "ch2", "ch3";
+ renesas,buswait = <11>;
+ phys = <&usb2_phy0>;
+ phy-names = "usb";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 207>;
+ resets = <&cpg 704>;
status = "disabled";
};
- scif1: serial at e6e68000 {
- compatible = "renesas,scif-r8a7796",
- "renesas,rcar-gen3-scif", "renesas,scif";
- reg = <0 0xe6e68000 0 64>;
- interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 206>,
- <&cpg CPG_CORE R8A7796_CLK_S3D1>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac1 0x53>, <&dmac1 0x52>,
- <&dmac2 0x53>, <&dmac2 0x52>;
- dma-names = "tx", "rx", "tx", "rx";
+ usb_dmac0: dma-controller at e65a0000 {
+ compatible = "renesas,r8a7796-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65a0000 0 0x100>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 330>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 206>;
- status = "disabled";
+ resets = <&cpg 330>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
};
- scif2: serial at e6e88000 {
- compatible = "renesas,scif-r8a7796",
- "renesas,rcar-gen3-scif", "renesas,scif";
- reg = <0 0xe6e88000 0 64>;
- interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 310>,
- <&cpg CPG_CORE R8A7796_CLK_S3D1>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 310>;
- status = "disabled";
- };
-
- scif3: serial at e6c50000 {
- compatible = "renesas,scif-r8a7796",
- "renesas,rcar-gen3-scif", "renesas,scif";
- reg = <0 0xe6c50000 0 64>;
- interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 204>,
- <&cpg CPG_CORE R8A7796_CLK_S3D1>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x57>, <&dmac0 0x56>;
- dma-names = "tx", "rx";
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 204>;
- status = "disabled";
- };
-
- scif4: serial at e6c40000 {
- compatible = "renesas,scif-r8a7796",
- "renesas,rcar-gen3-scif", "renesas,scif";
- reg = <0 0xe6c40000 0 64>;
- interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 203>,
- <&cpg CPG_CORE R8A7796_CLK_S3D1>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x59>, <&dmac0 0x58>;
- dma-names = "tx", "rx";
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 203>;
- status = "disabled";
- };
-
- scif5: serial at e6f30000 {
- compatible = "renesas,scif-r8a7796",
- "renesas,rcar-gen3-scif", "renesas,scif";
- reg = <0 0xe6f30000 0 64>;
- interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 202>,
- <&cpg CPG_CORE R8A7796_CLK_S3D1>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
- <&dmac2 0x5b>, <&dmac2 0x5a>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 202>;
- status = "disabled";
- };
-
- msiof0: spi at e6e90000 {
- compatible = "renesas,msiof-r8a7796",
- "renesas,rcar-gen3-msiof";
- reg = <0 0xe6e90000 0 0x0064>;
- interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 211>;
- dmas = <&dmac1 0x41>, <&dmac1 0x40>,
- <&dmac2 0x41>, <&dmac2 0x40>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 211>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- msiof1: spi at e6ea0000 {
- compatible = "renesas,msiof-r8a7796",
- "renesas,rcar-gen3-msiof";
- reg = <0 0xe6ea0000 0 0x0064>;
- interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 210>;
- dmas = <&dmac1 0x43>, <&dmac1 0x42>,
- <&dmac2 0x43>, <&dmac2 0x42>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 210>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- msiof2: spi at e6c00000 {
- compatible = "renesas,msiof-r8a7796",
- "renesas,rcar-gen3-msiof";
- reg = <0 0xe6c00000 0 0x0064>;
- interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 209>;
- dmas = <&dmac0 0x45>, <&dmac0 0x44>;
- dma-names = "tx", "rx";
+ usb_dmac1: dma-controller at e65b0000 {
+ compatible = "renesas,r8a7796-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65b0000 0 0x100>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 331>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 209>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
+ resets = <&cpg 331>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
};
- msiof3: spi at e6c10000 {
- compatible = "renesas,msiof-r8a7796",
- "renesas,rcar-gen3-msiof";
- reg = <0 0xe6c10000 0 0x0064>;
- interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 208>;
- dmas = <&dmac0 0x47>, <&dmac0 0x46>;
- dma-names = "tx", "rx";
+ usb3_phy0: usb-phy at e65ee000 {
+ compatible = "renesas,r8a7796-usb3-phy",
+ "renesas,rcar-gen3-usb3-phy";
+ reg = <0 0xe65ee000 0 0x90>;
+ clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
+ <&usb_extal_clk>;
+ clock-names = "usb3-if", "usb3s_clk", "usb_extal";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 208>;
- #address-cells = <1>;
- #size-cells = <0>;
+ resets = <&cpg 328>;
+ #phy-cells = <0>;
status = "disabled";
};
@@ -1354,304 +859,550 @@
<&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
};
- audma0: dma-controller at ec700000 {
- compatible = "renesas,dmac-r8a7796",
- "renesas,rcar-dmac";
- reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14", "ch15";
- clocks = <&cpg CPG_MOD 502>;
- clock-names = "fck";
+ ipmmu_ds0: mmu at e6740000 {
+ compatible = "renesas,ipmmu-r8a7796";
+ reg = <0 0xe6740000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 0>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 502>;
- #dma-cells = <1>;
- dma-channels = <16>;
- iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
- <&ipmmu_mp 2>, <&ipmmu_mp 3>,
- <&ipmmu_mp 4>, <&ipmmu_mp 5>,
- <&ipmmu_mp 6>, <&ipmmu_mp 7>,
- <&ipmmu_mp 8>, <&ipmmu_mp 9>,
- <&ipmmu_mp 10>, <&ipmmu_mp 11>,
- <&ipmmu_mp 12>, <&ipmmu_mp 13>,
- <&ipmmu_mp 14>, <&ipmmu_mp 15>;
+ #iommu-cells = <1>;
};
- audma1: dma-controller at ec720000 {
- compatible = "renesas,dmac-r8a7796",
- "renesas,rcar-dmac";
- reg = <0 0xec720000 0 0x10000>;
- interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14", "ch15";
- clocks = <&cpg CPG_MOD 501>;
- clock-names = "fck";
+ ipmmu_ds1: mmu at e7740000 {
+ compatible = "renesas,ipmmu-r8a7796";
+ reg = <0 0xe7740000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 1>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 501>;
- #dma-cells = <1>;
- dma-channels = <16>;
- iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
- <&ipmmu_mp 18>, <&ipmmu_mp 19>,
- <&ipmmu_mp 20>, <&ipmmu_mp 21>,
- <&ipmmu_mp 22>, <&ipmmu_mp 23>,
- <&ipmmu_mp 24>, <&ipmmu_mp 25>,
- <&ipmmu_mp 26>, <&ipmmu_mp 27>,
- <&ipmmu_mp 28>, <&ipmmu_mp 29>,
- <&ipmmu_mp 30>, <&ipmmu_mp 31>;
+ #iommu-cells = <1>;
};
- usb_dmac0: dma-controller at e65a0000 {
- compatible = "renesas,r8a7796-usb-dmac",
- "renesas,usb-dmac";
- reg = <0 0xe65a0000 0 0x100>;
- interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1";
- clocks = <&cpg CPG_MOD 330>;
+ ipmmu_hc: mmu at e6570000 {
+ compatible = "renesas,ipmmu-r8a7796";
+ reg = <0 0xe6570000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 2>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 330>;
- #dma-cells = <1>;
- dma-channels = <2>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- usb_dmac1: dma-controller at e65b0000 {
- compatible = "renesas,r8a7796-usb-dmac",
- "renesas,usb-dmac";
- reg = <0 0xe65b0000 0 0x100>;
- interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1";
- clocks = <&cpg CPG_MOD 331>;
+ ipmmu_ir: mmu at ff8b0000 {
+ compatible = "renesas,ipmmu-r8a7796";
+ reg = <0 0xff8b0000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 3>;
+ power-domains = <&sysc R8A7796_PD_A3IR>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mm: mmu at e67b0000 {
+ compatible = "renesas,ipmmu-r8a7796";
+ reg = <0 0xe67b0000 0 0x1000>;
+ interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 331>;
- #dma-cells = <1>;
- dma-channels = <2>;
+ #iommu-cells = <1>;
};
- hsusb: usb at e6590000 {
- compatible = "renesas,usbhs-r8a7796",
- "renesas,rcar-gen3-usbhs";
- reg = <0 0xe6590000 0 0x100>;
- interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 704>;
- dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
- <&usb_dmac1 0>, <&usb_dmac1 1>;
- dma-names = "ch0", "ch1", "ch2", "ch3";
- renesas,buswait = <11>;
- phys = <&usb2_phy0>;
- phy-names = "usb";
+ ipmmu_mp: mmu at ec670000 {
+ compatible = "renesas,ipmmu-r8a7796";
+ reg = <0 0xec670000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 4>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_pv0: mmu at fd800000 {
+ compatible = "renesas,ipmmu-r8a7796";
+ reg = <0 0xfd800000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 5>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_pv1: mmu at fd950000 {
+ compatible = "renesas,ipmmu-r8a7796";
+ reg = <0 0xfd950000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 6>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_rt: mmu at ffc80000 {
+ compatible = "renesas,ipmmu-r8a7796";
+ reg = <0 0xffc80000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 7>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_vc0: mmu at fe6b0000 {
+ compatible = "renesas,ipmmu-r8a7796";
+ reg = <0 0xfe6b0000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 8>;
+ power-domains = <&sysc R8A7796_PD_A3VC>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_vi0: mmu at febd0000 {
+ compatible = "renesas,ipmmu-r8a7796";
+ reg = <0 0xfebd0000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 9>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ avb: ethernet at e6800000 {
+ compatible = "renesas,etheravb-r8a7796",
+ "renesas,etheravb-rcar-gen3";
+ reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15",
+ "ch16", "ch17", "ch18", "ch19",
+ "ch20", "ch21", "ch22", "ch23",
+ "ch24";
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 812>;
+ phy-mode = "rgmii";
+ iommus = <&ipmmu_ds0 16>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ can0: can at e6c30000 {
+ compatible = "renesas,can-r8a7796",
+ "renesas,rcar-gen3-can";
+ reg = <0 0xe6c30000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 916>,
+ <&cpg CPG_CORE R8A7796_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
+ assigned-clock-rates = <40000000>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 916>;
+ status = "disabled";
+ };
+
+ can1: can at e6c38000 {
+ compatible = "renesas,can-r8a7796",
+ "renesas,rcar-gen3-can";
+ reg = <0 0xe6c38000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 915>,
+ <&cpg CPG_CORE R8A7796_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
+ assigned-clock-rates = <40000000>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 915>;
+ status = "disabled";
+ };
+
+ canfd: can at e66c0000 {
+ compatible = "renesas,r8a7796-canfd",
+ "renesas,rcar-gen3-canfd";
+ reg = <0 0xe66c0000 0 0x8000>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 914>,
+ <&cpg CPG_CORE R8A7796_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "fck", "canfd", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
+ assigned-clock-rates = <40000000>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 914>;
+ status = "disabled";
+
+ channel0 {
+ status = "disabled";
+ };
+
+ channel1 {
+ status = "disabled";
+ };
+ };
+
+ pwm0: pwm at e6e30000 {
+ compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
+ reg = <0 0xe6e30000 0 8>;
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ pwm1: pwm at e6e31000 {
+ compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
+ reg = <0 0xe6e31000 0 8>;
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ pwm2: pwm at e6e32000 {
+ compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
+ reg = <0 0xe6e32000 0 8>;
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ pwm3: pwm at e6e33000 {
+ compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
+ reg = <0 0xe6e33000 0 8>;
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ pwm4: pwm at e6e34000 {
+ compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
+ reg = <0 0xe6e34000 0 8>;
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ pwm5: pwm at e6e35000 {
+ compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
+ reg = <0 0xe6e35000 0 8>;
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ pwm6: pwm at e6e36000 {
+ compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
+ reg = <0 0xe6e36000 0 8>;
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ status = "disabled";
+ };
+
+ scif0: serial at e6e60000 {
+ compatible = "renesas,scif-r8a7796",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 207>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x51>, <&dmac1 0x50>,
+ <&dmac2 0x51>, <&dmac2 0x50>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 207>;
+ status = "disabled";
+ };
+
+ scif1: serial at e6e68000 {
+ compatible = "renesas,scif-r8a7796",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 206>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x53>, <&dmac1 0x52>,
+ <&dmac2 0x53>, <&dmac2 0x52>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 206>;
+ status = "disabled";
+ };
+
+ scif2: serial at e6e88000 {
+ compatible = "renesas,scif-r8a7796",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6e88000 0 64>;
+ interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 310>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 310>;
+ status = "disabled";
+ };
+
+ scif3: serial at e6c50000 {
+ compatible = "renesas,scif-r8a7796",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6c50000 0 64>;
+ interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 204>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x57>, <&dmac0 0x56>;
+ dma-names = "tx", "rx";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
+ resets = <&cpg 204>;
status = "disabled";
};
- usb3_phy0: usb-phy at e65ee000 {
- compatible = "renesas,r8a7796-usb3-phy",
- "renesas,rcar-gen3-usb3-phy";
- reg = <0 0xe65ee000 0 0x90>;
- clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
- <&usb_extal_clk>;
- clock-names = "usb3-if", "usb3s_clk", "usb_extal";
+ scif4: serial at e6c40000 {
+ compatible = "renesas,scif-r8a7796",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6c40000 0 64>;
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 203>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x59>, <&dmac0 0x58>;
+ dma-names = "tx", "rx";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 328>;
- #phy-cells = <0>;
+ resets = <&cpg 203>;
status = "disabled";
};
- xhci0: usb at ee000000 {
- compatible = "renesas,xhci-r8a7796",
- "renesas,rcar-gen3-xhci";
- reg = <0 0xee000000 0 0xc00>;
- interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 328>;
+ scif5: serial at e6f30000 {
+ compatible = "renesas,scif-r8a7796",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6f30000 0 64>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 202>,
+ <&cpg CPG_CORE R8A7796_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
+ <&dmac2 0x5b>, <&dmac2 0x5a>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 328>;
+ resets = <&cpg 202>;
status = "disabled";
};
- usb3_peri0: usb at ee020000 {
- compatible = "renesas,r8a7796-usb3-peri",
- "renesas,rcar-gen3-usb3-peri";
- reg = <0 0xee020000 0 0x400>;
- interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 328>;
+ msiof0: spi at e6e90000 {
+ compatible = "renesas,msiof-r8a7796",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6e90000 0 0x0064>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 211>;
+ dmas = <&dmac1 0x41>, <&dmac1 0x40>,
+ <&dmac2 0x41>, <&dmac2 0x40>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 328>;
+ resets = <&cpg 211>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
};
- ohci0: usb at ee080000 {
- compatible = "generic-ohci";
- reg = <0 0xee080000 0 0x100>;
- interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 703>;
- phys = <&usb2_phy0>;
- phy-names = "usb";
+ msiof1: spi at e6ea0000 {
+ compatible = "renesas,msiof-r8a7796",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6ea0000 0 0x0064>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 210>;
+ dmas = <&dmac1 0x43>, <&dmac1 0x42>,
+ <&dmac2 0x43>, <&dmac2 0x42>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 703>;
+ resets = <&cpg 210>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
};
- ehci0: usb at ee080100 {
- compatible = "generic-ehci";
- reg = <0 0xee080100 0 0x100>;
- interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 703>;
- phys = <&usb2_phy0>;
- phy-names = "usb";
- companion= <&ohci0>;
+ msiof2: spi at e6c00000 {
+ compatible = "renesas,msiof-r8a7796",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6c00000 0 0x0064>;
+ interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 209>;
+ dmas = <&dmac0 0x45>, <&dmac0 0x44>;
+ dma-names = "tx", "rx";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 703>;
+ resets = <&cpg 209>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
};
- usb2_phy0: usb-phy at ee080200 {
- compatible = "renesas,usb2-phy-r8a7796",
- "renesas,rcar-gen3-usb2-phy";
- reg = <0 0xee080200 0 0x700>;
- interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 703>;
+ msiof3: spi at e6c10000 {
+ compatible = "renesas,msiof-r8a7796",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6c10000 0 0x0064>;
+ interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 208>;
+ dmas = <&dmac0 0x47>, <&dmac0 0x46>;
+ dma-names = "tx", "rx";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 703>;
- #phy-cells = <0>;
+ resets = <&cpg 208>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
};
- ohci1: usb at ee0a0000 {
- compatible = "generic-ohci";
- reg = <0 0xee0a0000 0 0x100>;
- interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 702>;
- phys = <&usb2_phy1>;
- phy-names = "usb";
+ drif00: rif at e6f40000 {
+ compatible = "renesas,r8a7796-drif",
+ "renesas,rcar-gen3-drif";
+ reg = <0 0xe6f40000 0 0x64>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 515>;
+ clock-names = "fck";
+ dmas = <&dmac1 0x20>, <&dmac2 0x20>;
+ dma-names = "rx", "rx";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 702>;
+ resets = <&cpg 515>;
+ renesas,bonding = <&drif01>;
status = "disabled";
};
- ehci1: usb at ee0a0100 {
- compatible = "generic-ehci";
- reg = <0 0xee0a0100 0 0x100>;
- interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 702>;
- phys = <&usb2_phy1>;
- phy-names = "usb";
- companion= <&ohci1>;
+ drif01: rif at e6f50000 {
+ compatible = "renesas,r8a7796-drif",
+ "renesas,rcar-gen3-drif";
+ reg = <0 0xe6f50000 0 0x64>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 514>;
+ clock-names = "fck";
+ dmas = <&dmac1 0x22>, <&dmac2 0x22>;
+ dma-names = "rx", "rx";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 702>;
+ resets = <&cpg 514>;
+ renesas,bonding = <&drif00>;
status = "disabled";
};
- usb2_phy1: usb-phy at ee0a0200 {
- compatible = "renesas,usb2-phy-r8a7796",
- "renesas,rcar-gen3-usb2-phy";
- reg = <0 0xee0a0200 0 0x700>;
- clocks = <&cpg CPG_MOD 702>;
+ drif10: rif at e6f60000 {
+ compatible = "renesas,r8a7796-drif",
+ "renesas,rcar-gen3-drif";
+ reg = <0 0xe6f60000 0 0x64>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 513>;
+ clock-names = "fck";
+ dmas = <&dmac1 0x24>, <&dmac2 0x24>;
+ dma-names = "rx", "rx";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 702>;
- #phy-cells = <0>;
+ resets = <&cpg 513>;
+ renesas,bonding = <&drif11>;
status = "disabled";
};
- sdhi0: sd at ee100000 {
- compatible = "renesas,sdhi-r8a7796",
- "renesas,rcar-gen3-sdhi";
- reg = <0 0xee100000 0 0x2000>;
- interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 314>;
- max-frequency = <200000000>;
+ drif11: rif at e6f70000 {
+ compatible = "renesas,r8a7796-drif",
+ "renesas,rcar-gen3-drif";
+ reg = <0 0xe6f70000 0 0x64>;
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 512>;
+ clock-names = "fck";
+ dmas = <&dmac1 0x26>, <&dmac2 0x26>;
+ dma-names = "rx", "rx";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 314>;
+ resets = <&cpg 512>;
+ renesas,bonding = <&drif10>;
status = "disabled";
};
- sdhi1: sd at ee120000 {
- compatible = "renesas,sdhi-r8a7796",
- "renesas,rcar-gen3-sdhi";
- reg = <0 0xee120000 0 0x2000>;
- interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 313>;
- max-frequency = <200000000>;
+ drif20: rif at e6f80000 {
+ compatible = "renesas,r8a7796-drif",
+ "renesas,rcar-gen3-drif";
+ reg = <0 0xe6f80000 0 0x64>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 511>;
+ clock-names = "fck";
+ dmas = <&dmac1 0x28>, <&dmac2 0x28>;
+ dma-names = "rx", "rx";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 313>;
+ resets = <&cpg 511>;
+ renesas,bonding = <&drif21>;
status = "disabled";
};
- sdhi2: sd at ee140000 {
- compatible = "renesas,sdhi-r8a7796",
- "renesas,rcar-gen3-sdhi";
- reg = <0 0xee140000 0 0x2000>;
- interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 312>;
- max-frequency = <200000000>;
+ drif21: rif at e6f90000 {
+ compatible = "renesas,r8a7796-drif",
+ "renesas,rcar-gen3-drif";
+ reg = <0 0xe6f90000 0 0x64>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 510>;
+ clock-names = "fck";
+ dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
+ dma-names = "rx", "rx";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 312>;
+ resets = <&cpg 510>;
+ renesas,bonding = <&drif20>;
status = "disabled";
};
- sdhi3: sd at ee160000 {
- compatible = "renesas,sdhi-r8a7796",
- "renesas,rcar-gen3-sdhi";
- reg = <0 0xee160000 0 0x2000>;
- interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 311>;
- max-frequency = <200000000>;
+ drif30: rif at e6fa0000 {
+ compatible = "renesas,r8a7796-drif",
+ "renesas,rcar-gen3-drif";
+ reg = <0 0xe6fa0000 0 0x64>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 509>;
+ clock-names = "fck";
+ dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
+ dma-names = "rx", "rx";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 311>;
+ resets = <&cpg 509>;
+ renesas,bonding = <&drif31>;
status = "disabled";
};
- tsc: thermal at e6198000 {
- compatible = "renesas,r8a7796-thermal";
- reg = <0 0xe6198000 0 0x100>,
- <0 0xe61a0000 0 0x100>,
- <0 0xe61a8000 0 0x100>;
- interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 522>;
+ drif31: rif at e6fb0000 {
+ compatible = "renesas,r8a7796-drif",
+ "renesas,rcar-gen3-drif";
+ reg = <0 0xe6fb0000 0 0x64>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 508>;
+ clock-names = "fck";
+ dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
+ dma-names = "rx", "rx";
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 522>;
- #thermal-sensor-cells = <1>;
- status = "okay";
+ resets = <&cpg 508>;
+ renesas,bonding = <&drif30>;
+ status = "disabled";
};
rcar_sound: sound at ec500000 {
@@ -1796,58 +1547,302 @@
};
};
- rcar_sound,ssi {
- ssi0: ssi-0 {
- interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi1: ssi-1 {
- interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi2: ssi-2 {
- interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi3: ssi-3 {
- interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi4: ssi-4 {
- interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi5: ssi-5 {
- interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi6: ssi-6 {
- interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi7: ssi-7 {
- interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi8: ssi-8 {
- interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- ssi9: ssi-9 {
- interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
- dma-names = "rx", "tx", "rxu", "txu";
- };
- };
+ rcar_sound,ssi {
+ ssi0: ssi-0 {
+ interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi1: ssi-1 {
+ interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi2: ssi-2 {
+ interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi3: ssi-3 {
+ interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi4: ssi-4 {
+ interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi5: ssi-5 {
+ interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi6: ssi-6 {
+ interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi7: ssi-7 {
+ interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi8: ssi-8 {
+ interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ ssi9: ssi-9 {
+ interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
+ dma-names = "rx", "tx", "rxu", "txu";
+ };
+ };
+ };
+
+ audma0: dma-controller at ec700000 {
+ compatible = "renesas,dmac-r8a7796",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
+ <&ipmmu_mp 2>, <&ipmmu_mp 3>,
+ <&ipmmu_mp 4>, <&ipmmu_mp 5>,
+ <&ipmmu_mp 6>, <&ipmmu_mp 7>,
+ <&ipmmu_mp 8>, <&ipmmu_mp 9>,
+ <&ipmmu_mp 10>, <&ipmmu_mp 11>,
+ <&ipmmu_mp 12>, <&ipmmu_mp 13>,
+ <&ipmmu_mp 14>, <&ipmmu_mp 15>;
+ };
+
+ audma1: dma-controller at ec720000 {
+ compatible = "renesas,dmac-r8a7796",
+ "renesas,rcar-dmac";
+ reg = <0 0xec720000 0 0x10000>;
+ interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 501>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
+ <&ipmmu_mp 18>, <&ipmmu_mp 19>,
+ <&ipmmu_mp 20>, <&ipmmu_mp 21>,
+ <&ipmmu_mp 22>, <&ipmmu_mp 23>,
+ <&ipmmu_mp 24>, <&ipmmu_mp 25>,
+ <&ipmmu_mp 26>, <&ipmmu_mp 27>,
+ <&ipmmu_mp 28>, <&ipmmu_mp 29>,
+ <&ipmmu_mp 30>, <&ipmmu_mp 31>;
+ };
+
+ xhci0: usb at ee000000 {
+ compatible = "renesas,xhci-r8a7796",
+ "renesas,rcar-gen3-xhci";
+ reg = <0 0xee000000 0 0xc00>;
+ interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 328>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 328>;
+ status = "disabled";
+ };
+
+ usb3_peri0: usb at ee020000 {
+ compatible = "renesas,r8a7796-usb3-peri",
+ "renesas,rcar-gen3-usb3-peri";
+ reg = <0 0xee020000 0 0x400>;
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 328>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 328>;
+ status = "disabled";
+ };
+
+ ohci0: usb at ee080000 {
+ compatible = "generic-ohci";
+ reg = <0 0xee080000 0 0x100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ phys = <&usb2_phy0>;
+ phy-names = "usb";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+ };
+
+ ohci1: usb at ee0a0000 {
+ compatible = "generic-ohci";
+ reg = <0 0xee0a0000 0 0x100>;
+ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 702>;
+ phys = <&usb2_phy1>;
+ phy-names = "usb";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 702>;
+ status = "disabled";
+ };
+
+ ehci0: usb at ee080100 {
+ compatible = "generic-ehci";
+ reg = <0 0xee080100 0 0x100>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ phys = <&usb2_phy0>;
+ phy-names = "usb";
+ companion= <&ohci0>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ status = "disabled";
+ };
+
+ ehci1: usb at ee0a0100 {
+ compatible = "generic-ehci";
+ reg = <0 0xee0a0100 0 0x100>;
+ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 702>;
+ phys = <&usb2_phy1>;
+ phy-names = "usb";
+ companion= <&ohci1>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 702>;
+ status = "disabled";
+ };
+
+ usb2_phy0: usb-phy at ee080200 {
+ compatible = "renesas,usb2-phy-r8a7796",
+ "renesas,rcar-gen3-usb2-phy";
+ reg = <0 0xee080200 0 0x700>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 703>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 703>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ usb2_phy1: usb-phy at ee0a0200 {
+ compatible = "renesas,usb2-phy-r8a7796",
+ "renesas,rcar-gen3-usb2-phy";
+ reg = <0 0xee0a0200 0 0x700>;
+ clocks = <&cpg CPG_MOD 702>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 702>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ sdhi0: sd at ee100000 {
+ compatible = "renesas,sdhi-r8a7796",
+ "renesas,rcar-gen3-sdhi";
+ reg = <0 0xee100000 0 0x2000>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 314>;
+ max-frequency = <200000000>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
+ status = "disabled";
+ };
+
+ sdhi1: sd at ee120000 {
+ compatible = "renesas,sdhi-r8a7796",
+ "renesas,rcar-gen3-sdhi";
+ reg = <0 0xee120000 0 0x2000>;
+ interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 313>;
+ max-frequency = <200000000>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 313>;
+ status = "disabled";
+ };
+
+ sdhi2: sd at ee140000 {
+ compatible = "renesas,sdhi-r8a7796",
+ "renesas,rcar-gen3-sdhi";
+ reg = <0 0xee140000 0 0x2000>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 312>;
+ max-frequency = <200000000>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
+ status = "disabled";
+ };
+
+ sdhi3: sd at ee160000 {
+ compatible = "renesas,sdhi-r8a7796",
+ "renesas,rcar-gen3-sdhi";
+ reg = <0 0xee160000 0 0x2000>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 311>;
+ max-frequency = <200000000>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
+ status = "disabled";
+ };
+
+ gic: interrupt-controller at f1010000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x0 0xf1010000 0 0x1000>,
+ <0x0 0xf1020000 0 0x20000>,
+ <0x0 0xf1040000 0 0x20000>,
+ <0x0 0xf1060000 0 0x20000>;
+ interrupts = <GIC_PPI 9
+ (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
};
pciec0: pcie at fe000000 {
@@ -1860,6 +1855,26 @@
/* placeholder */
};
+ imr-lx4 at fe860000 {
+ compatible = "renesas,r8a7796-imr-lx4",
+ "renesas,imr-lx4";
+ reg = <0 0xfe860000 0 0x2000>;
+ interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 823>;
+ power-domains = <&sysc R8A7796_PD_A3VC>;
+ resets = <&cpg 823>;
+ };
+
+ imr-lx4 at fe870000 {
+ compatible = "renesas,r8a7796-imr-lx4",
+ "renesas,imr-lx4";
+ reg = <0 0xfe870000 0 0x2000>;
+ interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 822>;
+ power-domains = <&sysc R8A7796_PD_A3VC>;
+ resets = <&cpg 822>;
+ };
+
fdp1 at fe940000 {
compatible = "renesas,fdp1";
reg = <0 0xfe940000 0 0x2400>;
@@ -1878,17 +1893,6 @@
resets = <&cpg 615>;
};
- vspb: vsp at fe960000 {
- compatible = "renesas,vsp2";
- reg = <0 0xfe960000 0 0x8000>;
- interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 626>;
- power-domains = <&sysc R8A7796_PD_A3VC>;
- resets = <&cpg 626>;
-
- renesas,fcp = <&fcpvb0>;
- };
-
fcpvb0: fcp at fe96f000 {
compatible = "renesas,fcpv";
reg = <0 0xfe96f000 0 0x200>;
@@ -1897,17 +1901,6 @@
resets = <&cpg 607>;
};
- vspi0: vsp at fe9a0000 {
- compatible = "renesas,vsp2";
- reg = <0 0xfe9a0000 0 0x8000>;
- interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 631>;
- power-domains = <&sysc R8A7796_PD_A3VC>;
- resets = <&cpg 631>;
-
- renesas,fcp = <&fcpvi0>;
- };
-
fcpvi0: fcp at fe9af000 {
compatible = "renesas,fcpv";
reg = <0 0xfe9af000 0 0x200>;
@@ -1917,6 +1910,44 @@
iommus = <&ipmmu_vc0 19>;
};
+ fcpvd0: fcp at fea27000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea27000 0 0x200>;
+ clocks = <&cpg CPG_MOD 603>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 603>;
+ iommus = <&ipmmu_vi0 8>;
+ };
+
+ fcpvd1: fcp at fea2f000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea2f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 602>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 602>;
+ iommus = <&ipmmu_vi0 9>;
+ };
+
+ fcpvd2: fcp at fea37000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea37000 0 0x200>;
+ clocks = <&cpg CPG_MOD 601>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 601>;
+ iommus = <&ipmmu_vi0 10>;
+ };
+
+ vspb: vsp at fe960000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe960000 0 0x8000>;
+ interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 626>;
+ power-domains = <&sysc R8A7796_PD_A3VC>;
+ resets = <&cpg 626>;
+
+ renesas,fcp = <&fcpvb0>;
+ };
+
vspd0: vsp at fea20000 {
compatible = "renesas,vsp2";
reg = <0 0xfea20000 0 0x8000>;
@@ -1928,15 +1959,6 @@
renesas,fcp = <&fcpvd0>;
};
- fcpvd0: fcp at fea27000 {
- compatible = "renesas,fcpv";
- reg = <0 0xfea27000 0 0x200>;
- clocks = <&cpg CPG_MOD 603>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 603>;
- iommus = <&ipmmu_vi0 8>;
- };
-
vspd1: vsp at fea28000 {
compatible = "renesas,vsp2";
reg = <0 0xfea28000 0 0x8000>;
@@ -1948,15 +1970,6 @@
renesas,fcp = <&fcpvd1>;
};
- fcpvd1: fcp at fea2f000 {
- compatible = "renesas,fcpv";
- reg = <0 0xfea2f000 0 0x200>;
- clocks = <&cpg CPG_MOD 602>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 602>;
- iommus = <&ipmmu_vi0 9>;
- };
-
vspd2: vsp at fea30000 {
compatible = "renesas,vsp2";
reg = <0 0xfea30000 0 0x8000>;
@@ -1968,13 +1981,15 @@
renesas,fcp = <&fcpvd2>;
};
- fcpvd2: fcp at fea37000 {
- compatible = "renesas,fcpv";
- reg = <0 0xfea37000 0 0x200>;
- clocks = <&cpg CPG_MOD 601>;
- power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
- resets = <&cpg 601>;
- iommus = <&ipmmu_vi0 10>;
+ vspi0: vsp at fe9a0000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe9a0000 0 0x8000>;
+ interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 631>;
+ power-domains = <&sysc R8A7796_PD_A3VC>;
+ resets = <&cpg 631>;
+
+ renesas,fcp = <&fcpvi0>;
};
hdmi0: hdmi at fead0000 {
@@ -2042,24 +2057,9 @@
};
};
- imr-lx4 at fe860000 {
- compatible = "renesas,r8a7796-imr-lx4",
- "renesas,imr-lx4";
- reg = <0 0xfe860000 0 0x2000>;
- interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 823>;
- power-domains = <&sysc R8A7796_PD_A3VC>;
- resets = <&cpg 823>;
- };
-
- imr-lx4 at fe870000 {
- compatible = "renesas,r8a7796-imr-lx4",
- "renesas,imr-lx4";
- reg = <0 0xfe870000 0 0x2000>;
- interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 822>;
- power-domains = <&sysc R8A7796_PD_A3VC>;
- resets = <&cpg 822>;
+ prr: chipid at fff00044 {
+ compatible = "renesas,prr";
+ reg = <0 0xfff00044 0 4>;
};
};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 011/102] arm64: dts: renesas: r8a7795: sort subnodes of the root node
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (9 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 010/102] arm64: dts: renesas: r8a7796: sort subnodes of the soc node Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 012/102] arm64: dts: renesas: r8a7795: sort subnodes of the soc node Simon Horman
` (91 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
Sort subnodes of the root node alphanumerically.
This is part of an ongoing effort to provide consistent node
order in the DT of Renesas SoCs to improve maintainability.
Also remove excessive line-wrapping of interrupts-extended property of
timer node.
This should not have any run-time effect.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 218 +++++++++++++++----------------
1 file changed, 105 insertions(+), 113 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 1d5e3ac0231c..bb96c7e23370 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -30,6 +30,91 @@
i2c7 = &i2c_dvfs;
};
+ /*
+ * The external audio clocks are configured as 0 Hz fixed frequency
+ * clocks by default.
+ * Boards that provide audio clocks should override them.
+ */
+ audio_clk_a: audio_clk_a {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ audio_clk_b: audio_clk_b {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ audio_clk_c: audio_clk_c {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ /* External CAN clock - to be overridden by boards that provide it */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ cluster0_opp: opp_table0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-500000000 {
+ opp-hz = /bits/ 64 <500000000>;
+ opp-microvolt = <830000>;
+ clock-latency-ns = <300000>;
+ };
+ opp-1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <830000>;
+ clock-latency-ns = <300000>;
+ };
+ opp-1500000000 {
+ opp-hz = /bits/ 64 <1500000000>;
+ opp-microvolt = <830000>;
+ clock-latency-ns = <300000>;
+ opp-suspend;
+ };
+ opp-1600000000 {
+ opp-hz = /bits/ 64 <1600000000>;
+ opp-microvolt = <900000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ opp-1700000000 {
+ opp-hz = /bits/ 64 <1700000000>;
+ opp-microvolt = <960000>;
+ clock-latency-ns = <300000>;
+ turbo-mode;
+ };
+ };
+
+ cluster1_opp: opp_table1 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt = <820000>;
+ clock-latency-ns = <300000>;
+ };
+ opp-1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt = <820000>;
+ clock-latency-ns = <300000>;
+ };
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <820000>;
+ clock-latency-ns = <300000>;
+ };
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -155,91 +240,6 @@
clock-frequency = <0>;
};
- /*
- * The external audio clocks are configured as 0 Hz fixed frequency
- * clocks by default.
- * Boards that provide audio clocks should override them.
- */
- audio_clk_a: audio_clk_a {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
- audio_clk_b: audio_clk_b {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
- audio_clk_c: audio_clk_c {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
- /* External CAN clock - to be overridden by boards that provide it */
- can_clk: can {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
- cluster0_opp: opp_table0 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-500000000 {
- opp-hz = /bits/ 64 <500000000>;
- opp-microvolt = <830000>;
- clock-latency-ns = <300000>;
- };
- opp-1000000000 {
- opp-hz = /bits/ 64 <1000000000>;
- opp-microvolt = <830000>;
- clock-latency-ns = <300000>;
- };
- opp-1500000000 {
- opp-hz = /bits/ 64 <1500000000>;
- opp-microvolt = <830000>;
- clock-latency-ns = <300000>;
- opp-suspend;
- };
- opp-1600000000 {
- opp-hz = /bits/ 64 <1600000000>;
- opp-microvolt = <900000>;
- clock-latency-ns = <300000>;
- turbo-mode;
- };
- opp-1700000000 {
- opp-hz = /bits/ 64 <1700000000>;
- opp-microvolt = <960000>;
- clock-latency-ns = <300000>;
- turbo-mode;
- };
- };
-
- cluster1_opp: opp_table1 {
- compatible = "operating-points-v2";
- opp-shared;
-
- opp-800000000 {
- opp-hz = /bits/ 64 <800000000>;
- opp-microvolt = <820000>;
- clock-latency-ns = <300000>;
- };
- opp-1000000000 {
- opp-hz = /bits/ 64 <1000000000>;
- opp-microvolt = <820000>;
- clock-latency-ns = <300000>;
- };
- opp-1200000000 {
- opp-hz = /bits/ 64 <1200000000>;
- opp-microvolt = <820000>;
- clock-latency-ns = <300000>;
- };
- };
-
/* External PCIe clock - can be overridden by the board */
pcie_bus_clk: pcie_bus {
compatible = "fixed-clock";
@@ -247,18 +247,6 @@
clock-frequency = <0>;
};
- pmu_a57 {
- compatible = "arm,cortex-a57-pmu";
- interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
- <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
- <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
- <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&a57_0>,
- <&a57_1>,
- <&a57_2>,
- <&a57_3>;
- };
-
pmu_a53 {
compatible = "arm,cortex-a53-pmu";
interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
@@ -271,6 +259,18 @@
<&a53_3>;
};
+ pmu_a57 {
+ compatible = "arm,cortex-a57-pmu";
+ interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&a57_0>,
+ <&a57_1>,
+ <&a57_2>,
+ <&a57_3>;
+ };
+
psci {
compatible = "arm,psci-1.0", "arm,psci-0.2";
method = "smc";
@@ -2428,22 +2428,6 @@
};
};
- timer {
- compatible = "arm,armv8-timer";
- interrupts-extended = <&gic GIC_PPI 13
- (GIC_CPU_MASK_SIMPLE(8) |
- IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 14
- (GIC_CPU_MASK_SIMPLE(8) |
- IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 11
- (GIC_CPU_MASK_SIMPLE(8) |
- IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 10
- (GIC_CPU_MASK_SIMPLE(8) |
- IRQ_TYPE_LEVEL_LOW)>;
- };
-
thermal-zones {
sensor_thermal1: sensor-thermal1 {
polling-delay-passive = <250>;
@@ -2524,6 +2508,14 @@
};
};
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
/* External USB clocks - can be overridden by the board */
usb3s0_clk: usb3s0 {
compatible = "fixed-clock";
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 012/102] arm64: dts: renesas: r8a7795: sort subnodes of the soc node
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (10 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 011/102] arm64: dts: renesas: r8a7795: sort subnodes of the root node Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 013/102] arm64: dts: renesas: r8a77965: Add all MSIOF device nodes Simon Horman
` (90 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
Sort subnodes of the soc node.
- The primary key is the bus address.
- The secondary key is the IP block.
- The tertiary key is the node name.
This is part of an ongoing effort to provide consistent node
order in the DT of Renesas SoCs to improve maintainability.
This should not have any run-time effect.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 1858 +++++++++++++++---------------
1 file changed, 929 insertions(+), 929 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index bb96c7e23370..0e958ecd2a41 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -291,23 +291,6 @@
#size-cells = <2>;
ranges;
- gic: interrupt-controller at f1010000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0x0 0xf1010000 0 0x1000>,
- <0x0 0xf1020000 0 0x20000>,
- <0x0 0xf1040000 0 0x20000>,
- <0x0 0xf1060000 0 0x20000>;
- interrupts = <GIC_PPI 9
- (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 408>;
- };
-
wdt0: watchdog at e6020000 {
compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
reg = <0 0xe6020000 0 0x0c>;
@@ -437,6 +420,11 @@
resets = <&cpg 905>;
};
+ pfc: pin-controller at e6060000 {
+ compatible = "renesas,pfc-r8a7795";
+ reg = <0 0xe6060000 0 0x50c>;
+ };
+
cpg: clock-controller at e6150000 {
compatible = "renesas,r8a7795-cpg-mssr";
reg = <0 0xe6150000 0 0x1000>;
@@ -452,20 +440,25 @@
reg = <0 0xe6160000 0 0x0200>;
};
- prr: chipid at fff00044 {
- compatible = "renesas,prr";
- reg = <0 0xfff00044 0 4>;
- };
-
sysc: system-controller at e6180000 {
compatible = "renesas,r8a7795-sysc";
reg = <0 0xe6180000 0 0x0400>;
#power-domain-cells = <1>;
};
- pfc: pin-controller at e6060000 {
- compatible = "renesas,pfc-r8a7795";
- reg = <0 0xe6060000 0 0x50c>;
+ tsc: thermal at e6198000 {
+ compatible = "renesas,r8a7795-thermal";
+ reg = <0 0xe6198000 0 0x100>,
+ <0 0xe61a0000 0 0x100>,
+ <0 0xe61a8000 0 0x100>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 522>;
+ #thermal-sensor-cells = <1>;
+ status = "okay";
};
intc_ex: interrupt-controller at e61c0000 {
@@ -484,153 +477,326 @@
resets = <&cpg 407>;
};
- ipmmu_vi0: mmu at febd0000 {
- compatible = "renesas,ipmmu-r8a7795";
- reg = <0 0xfebd0000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 14>;
+ i2c0: i2c at e6500000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7795",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe6500000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
+ resets = <&cpg 931>;
+ dmas = <&dmac1 0x91>, <&dmac1 0x90>,
+ <&dmac2 0x91>, <&dmac2 0x90>;
+ dma-names = "tx", "rx", "tx", "rx";
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
};
- ipmmu_vi1: mmu at febe0000 {
- compatible = "renesas,ipmmu-r8a7795";
- reg = <0 0xfebe0000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 15>;
+ i2c1: i2c at e6508000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7795",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
+ resets = <&cpg 930>;
+ dmas = <&dmac1 0x93>, <&dmac1 0x92>,
+ <&dmac2 0x93>, <&dmac2 0x92>;
+ dma-names = "tx", "rx", "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
- ipmmu_vp0: mmu at fe990000 {
- compatible = "renesas,ipmmu-r8a7795";
- reg = <0 0xfe990000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 16>;
- power-domains = <&sysc R8A7795_PD_A3VP>;
- #iommu-cells = <1>;
+ i2c2: i2c at e6510000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7795",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe6510000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 929>;
+ dmas = <&dmac1 0x95>, <&dmac1 0x94>,
+ <&dmac2 0x95>, <&dmac2 0x94>;
+ dma-names = "tx", "rx", "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
- ipmmu_vp1: mmu at fe980000 {
- compatible = "renesas,ipmmu-r8a7795";
- reg = <0 0xfe980000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 17>;
- power-domains = <&sysc R8A7795_PD_A3VP>;
- #iommu-cells = <1>;
- };
-
- ipmmu_vc0: mmu at fe6b0000 {
- compatible = "renesas,ipmmu-r8a7795";
- reg = <0 0xfe6b0000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 12>;
- power-domains = <&sysc R8A7795_PD_A3VC>;
- #iommu-cells = <1>;
+ i2c3: i2c at e66d0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7795",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe66d0000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 928>;
+ dmas = <&dmac0 0x97>, <&dmac0 0x96>;
+ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
- ipmmu_vc1: mmu at fe6f0000 {
- compatible = "renesas,ipmmu-r8a7795";
- reg = <0 0xfe6f0000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 13>;
- power-domains = <&sysc R8A7795_PD_A3VC>;
- #iommu-cells = <1>;
+ i2c4: i2c at e66d8000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7795",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe66d8000 0 0x40>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 927>;
+ dmas = <&dmac0 0x99>, <&dmac0 0x98>;
+ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
- ipmmu_pv0: mmu at fd800000 {
- compatible = "renesas,ipmmu-r8a7795";
- reg = <0 0xfd800000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 6>;
+ i2c5: i2c at e66e0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7795",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe66e0000 0 0x40>;
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 919>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
+ resets = <&cpg 919>;
+ dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
+ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
- ipmmu_pv1: mmu at fd950000 {
- compatible = "renesas,ipmmu-r8a7795";
- reg = <0 0xfd950000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 7>;
+ i2c6: i2c at e66e8000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a7795",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe66e8000 0 0x40>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 918>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
+ resets = <&cpg 918>;
+ dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
+ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
- ipmmu_pv2: mmu at fd960000 {
- compatible = "renesas,ipmmu-r8a7795";
- reg = <0 0xfd960000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 8>;
+ i2c_dvfs: i2c at e60b0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a7795",
+ "renesas,rcar-gen3-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe60b0000 0 0x425>;
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 926>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
+ resets = <&cpg 926>;
+ dmas = <&dmac0 0x11>, <&dmac0 0x10>;
+ dma-names = "tx", "rx";
status = "disabled";
};
- ipmmu_pv3: mmu at fd970000 {
- compatible = "renesas,ipmmu-r8a7795";
- reg = <0 0xfd970000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 9>;
+ hscif0: serial at e6540000 {
+ compatible = "renesas,hscif-r8a7795",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe6540000 0 96>;
+ interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 520>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x31>, <&dmac1 0x30>,
+ <&dmac2 0x31>, <&dmac2 0x30>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
+ resets = <&cpg 520>;
status = "disabled";
};
- ipmmu_ir: mmu at ff8b0000 {
- compatible = "renesas,ipmmu-r8a7795";
- reg = <0 0xff8b0000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 3>;
- power-domains = <&sysc R8A7795_PD_A3IR>;
- #iommu-cells = <1>;
+ hscif1: serial at e6550000 {
+ compatible = "renesas,hscif-r8a7795",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe6550000 0 96>;
+ interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 519>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x33>, <&dmac1 0x32>,
+ <&dmac2 0x33>, <&dmac2 0x32>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 519>;
status = "disabled";
};
- ipmmu_hc: mmu at e6570000 {
- compatible = "renesas,ipmmu-r8a7795";
- reg = <0 0xe6570000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 2>;
+ hscif2: serial at e6560000 {
+ compatible = "renesas,hscif-r8a7795",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe6560000 0 96>;
+ interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 518>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x35>, <&dmac1 0x34>,
+ <&dmac2 0x35>, <&dmac2 0x34>;
+ dma-names = "tx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
+ resets = <&cpg 518>;
status = "disabled";
};
- ipmmu_rt: mmu at ffc80000 {
- compatible = "renesas,ipmmu-r8a7795";
- reg = <0 0xffc80000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 10>;
+ hscif3: serial at e66a0000 {
+ compatible = "renesas,hscif-r8a7795",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe66a0000 0 96>;
+ interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 517>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x37>, <&dmac0 0x36>;
+ dma-names = "tx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
+ resets = <&cpg 517>;
status = "disabled";
};
- ipmmu_mp0: mmu at ec670000 {
- compatible = "renesas,ipmmu-r8a7795";
- reg = <0 0xec670000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 4>;
+ hscif4: serial at e66b0000 {
+ compatible = "renesas,hscif-r8a7795",
+ "renesas,rcar-gen3-hscif",
+ "renesas,hscif";
+ reg = <0 0xe66b0000 0 96>;
+ interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 516>,
+ <&cpg CPG_CORE R8A7795_CLK_S3D1>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac0 0x39>, <&dmac0 0x38>;
+ dma-names = "tx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
+ resets = <&cpg 516>;
status = "disabled";
};
- ipmmu_ds0: mmu at e6740000 {
- compatible = "renesas,ipmmu-r8a7795";
- reg = <0 0xe6740000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 0>;
+ hsusb: usb at e6590000 {
+ compatible = "renesas,usbhs-r8a7795",
+ "renesas,rcar-gen3-usbhs";
+ reg = <0 0xe6590000 0 0x100>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 704>;
+ dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
+ <&usb_dmac1 0>, <&usb_dmac1 1>;
+ dma-names = "ch0", "ch1", "ch2", "ch3";
+ renesas,buswait = <11>;
+ phys = <&usb2_phy0>;
+ phy-names = "usb";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
+ resets = <&cpg 704>;
+ status = "disabled";
};
- ipmmu_ds1: mmu at e7740000 {
- compatible = "renesas,ipmmu-r8a7795";
- reg = <0 0xe7740000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 1>;
+ hsusb3: usb at e659c000 {
+ compatible = "renesas,usbhs-r8a7795",
+ "renesas,rcar-gen3-usbhs";
+ reg = <0 0xe659c000 0 0x100>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 705>;
+ dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
+ <&usb_dmac3 0>, <&usb_dmac3 1>;
+ dma-names = "ch0", "ch1", "ch2", "ch3";
+ renesas,buswait = <11>;
+ phys = <&usb2_phy3>;
+ phy-names = "usb";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
+ resets = <&cpg 705>;
+ status = "disabled";
};
- ipmmu_mm: mmu at e67b0000 {
- compatible = "renesas,ipmmu-r8a7795";
- reg = <0 0xe67b0000 0 0x1000>;
- interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
+ usb_dmac0: dma-controller at e65a0000 {
+ compatible = "renesas,r8a7795-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65a0000 0 0x100>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 330>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
+ resets = <&cpg 330>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
+
+ usb_dmac1: dma-controller at e65b0000 {
+ compatible = "renesas,r8a7795-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65b0000 0 0x100>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 331>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 331>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
+
+ usb_dmac2: dma-controller at e6460000 {
+ compatible = "renesas,r8a7795-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe6460000 0 0x100>;
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 326>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 326>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
+
+ usb_dmac3: dma-controller at e6470000 {
+ compatible = "renesas,r8a7795-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe6470000 0 0x100>;
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 329>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 329>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
+
+ usb3_phy0: usb-phy at e65ee000 {
+ compatible = "renesas,r8a7795-usb3-phy",
+ "renesas,rcar-gen3-usb3-phy";
+ reg = <0 0xe65ee000 0 0x90>;
+ clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
+ <&usb_extal_clk>;
+ clock-names = "usb3-if", "usb3s_clk", "usb_extal";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 328>;
+ #phy-cells = <0>;
+ status = "disabled";
};
dmac0: dma-controller at e6700000 {
@@ -759,460 +925,325 @@
<&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
};
- audma0: dma-controller at ec700000 {
- compatible = "renesas,dmac-r8a7795",
- "renesas,rcar-dmac";
- reg = <0 0xec700000 0 0x10000>;
- interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14", "ch15";
- clocks = <&cpg CPG_MOD 502>;
- clock-names = "fck";
+ ipmmu_ds0: mmu at e6740000 {
+ compatible = "renesas,ipmmu-r8a7795";
+ reg = <0 0xe6740000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 0>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 502>;
- #dma-cells = <1>;
- dma-channels = <16>;
- iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
- <&ipmmu_mp0 2>, <&ipmmu_mp0 3>,
- <&ipmmu_mp0 4>, <&ipmmu_mp0 5>,
- <&ipmmu_mp0 6>, <&ipmmu_mp0 7>,
- <&ipmmu_mp0 8>, <&ipmmu_mp0 9>,
- <&ipmmu_mp0 10>, <&ipmmu_mp0 11>,
- <&ipmmu_mp0 12>, <&ipmmu_mp0 13>,
- <&ipmmu_mp0 14>, <&ipmmu_mp0 15>;
+ #iommu-cells = <1>;
};
- audma1: dma-controller at ec720000 {
- compatible = "renesas,dmac-r8a7795",
- "renesas,rcar-dmac";
- reg = <0 0xec720000 0 0x10000>;
- interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14", "ch15";
- clocks = <&cpg CPG_MOD 501>;
- clock-names = "fck";
+ ipmmu_ds1: mmu at e7740000 {
+ compatible = "renesas,ipmmu-r8a7795";
+ reg = <0 0xe7740000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 1>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 501>;
- #dma-cells = <1>;
- dma-channels = <16>;
- iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>,
- <&ipmmu_mp0 18>, <&ipmmu_mp0 19>,
- <&ipmmu_mp0 20>, <&ipmmu_mp0 21>,
- <&ipmmu_mp0 22>, <&ipmmu_mp0 23>,
- <&ipmmu_mp0 24>, <&ipmmu_mp0 25>,
- <&ipmmu_mp0 26>, <&ipmmu_mp0 27>,
- <&ipmmu_mp0 28>, <&ipmmu_mp0 29>,
- <&ipmmu_mp0 30>, <&ipmmu_mp0 31>;
+ #iommu-cells = <1>;
};
- avb: ethernet at e6800000 {
- compatible = "renesas,etheravb-r8a7795",
- "renesas,etheravb-rcar-gen3";
- reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
- interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14", "ch15",
- "ch16", "ch17", "ch18", "ch19",
- "ch20", "ch21", "ch22", "ch23",
- "ch24";
- clocks = <&cpg CPG_MOD 812>;
+ ipmmu_hc: mmu at e6570000 {
+ compatible = "renesas,ipmmu-r8a7795";
+ reg = <0 0xe6570000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 2>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 812>;
- phy-mode = "rgmii";
- iommus = <&ipmmu_ds0 16>;
- #address-cells = <1>;
- #size-cells = <0>;
+ #iommu-cells = <1>;
status = "disabled";
};
- can0: can at e6c30000 {
- compatible = "renesas,can-r8a7795",
- "renesas,rcar-gen3-can";
- reg = <0 0xe6c30000 0 0x1000>;
- interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 916>,
- <&cpg CPG_CORE R8A7795_CLK_CANFD>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
- assigned-clock-rates = <40000000>;
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 916>;
+ ipmmu_ir: mmu at ff8b0000 {
+ compatible = "renesas,ipmmu-r8a7795";
+ reg = <0 0xff8b0000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 3>;
+ power-domains = <&sysc R8A7795_PD_A3IR>;
+ #iommu-cells = <1>;
status = "disabled";
};
- can1: can at e6c38000 {
- compatible = "renesas,can-r8a7795",
- "renesas,rcar-gen3-can";
- reg = <0 0xe6c38000 0 0x1000>;
- interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 915>,
- <&cpg CPG_CORE R8A7795_CLK_CANFD>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
- assigned-clock-rates = <40000000>;
+ ipmmu_mm: mmu at e67b0000 {
+ compatible = "renesas,ipmmu-r8a7795";
+ reg = <0 0xe67b0000 0 0x1000>;
+ interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 915>;
- status = "disabled";
+ #iommu-cells = <1>;
};
- canfd: can at e66c0000 {
- compatible = "renesas,r8a7795-canfd",
- "renesas,rcar-gen3-canfd";
- reg = <0 0xe66c0000 0 0x8000>;
- interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 914>,
- <&cpg CPG_CORE R8A7795_CLK_CANFD>,
- <&can_clk>;
- clock-names = "fck", "canfd", "can_clk";
- assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
- assigned-clock-rates = <40000000>;
+ ipmmu_mp0: mmu at ec670000 {
+ compatible = "renesas,ipmmu-r8a7795";
+ reg = <0 0xec670000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 4>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 914>;
+ #iommu-cells = <1>;
status = "disabled";
-
- channel0 {
- status = "disabled";
- };
-
- channel1 {
- status = "disabled";
- };
};
- drif00: rif at e6f40000 {
- compatible = "renesas,r8a7795-drif",
- "renesas,rcar-gen3-drif";
- reg = <0 0xe6f40000 0 0x64>;
- interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 515>;
- clock-names = "fck";
- dmas = <&dmac1 0x20>, <&dmac2 0x20>;
- dma-names = "rx", "rx";
+ ipmmu_pv0: mmu at fd800000 {
+ compatible = "renesas,ipmmu-r8a7795";
+ reg = <0 0xfd800000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 6>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 515>;
- renesas,bonding = <&drif01>;
+ #iommu-cells = <1>;
status = "disabled";
};
- drif01: rif at e6f50000 {
- compatible = "renesas,r8a7795-drif",
- "renesas,rcar-gen3-drif";
- reg = <0 0xe6f50000 0 0x64>;
- interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 514>;
- clock-names = "fck";
- dmas = <&dmac1 0x22>, <&dmac2 0x22>;
- dma-names = "rx", "rx";
+ ipmmu_pv1: mmu at fd950000 {
+ compatible = "renesas,ipmmu-r8a7795";
+ reg = <0 0xfd950000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 7>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 514>;
- renesas,bonding = <&drif00>;
+ #iommu-cells = <1>;
status = "disabled";
};
- drif10: rif at e6f60000 {
- compatible = "renesas,r8a7795-drif",
- "renesas,rcar-gen3-drif";
- reg = <0 0xe6f60000 0 0x64>;
- interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 513>;
- clock-names = "fck";
- dmas = <&dmac1 0x24>, <&dmac2 0x24>;
- dma-names = "rx", "rx";
+ ipmmu_pv2: mmu at fd960000 {
+ compatible = "renesas,ipmmu-r8a7795";
+ reg = <0 0xfd960000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 8>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 513>;
- renesas,bonding = <&drif11>;
+ #iommu-cells = <1>;
status = "disabled";
};
- drif11: rif at e6f70000 {
- compatible = "renesas,r8a7795-drif",
- "renesas,rcar-gen3-drif";
- reg = <0 0xe6f70000 0 0x64>;
- interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 512>;
- clock-names = "fck";
- dmas = <&dmac1 0x26>, <&dmac2 0x26>;
- dma-names = "rx", "rx";
+ ipmmu_pv3: mmu at fd970000 {
+ compatible = "renesas,ipmmu-r8a7795";
+ reg = <0 0xfd970000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 9>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 512>;
- renesas,bonding = <&drif10>;
+ #iommu-cells = <1>;
status = "disabled";
};
- drif20: rif at e6f80000 {
- compatible = "renesas,r8a7795-drif",
- "renesas,rcar-gen3-drif";
- reg = <0 0xe6f80000 0 0x64>;
- interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 511>;
- clock-names = "fck";
- dmas = <&dmac1 0x28>, <&dmac2 0x28>;
- dma-names = "rx", "rx";
+ ipmmu_rt: mmu at ffc80000 {
+ compatible = "renesas,ipmmu-r8a7795";
+ reg = <0 0xffc80000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 10>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 511>;
- renesas,bonding = <&drif21>;
+ #iommu-cells = <1>;
status = "disabled";
};
- drif21: rif at e6f90000 {
- compatible = "renesas,r8a7795-drif",
- "renesas,rcar-gen3-drif";
- reg = <0 0xe6f90000 0 0x64>;
- interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 510>;
- clock-names = "fck";
- dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
- dma-names = "rx", "rx";
+ ipmmu_vc0: mmu at fe6b0000 {
+ compatible = "renesas,ipmmu-r8a7795";
+ reg = <0 0xfe6b0000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 12>;
+ power-domains = <&sysc R8A7795_PD_A3VC>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_vc1: mmu at fe6f0000 {
+ compatible = "renesas,ipmmu-r8a7795";
+ reg = <0 0xfe6f0000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 13>;
+ power-domains = <&sysc R8A7795_PD_A3VC>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_vi0: mmu at febd0000 {
+ compatible = "renesas,ipmmu-r8a7795";
+ reg = <0 0xfebd0000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 14>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 510>;
- renesas,bonding = <&drif20>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_vi1: mmu at febe0000 {
+ compatible = "renesas,ipmmu-r8a7795";
+ reg = <0 0xfebe0000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 15>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
status = "disabled";
};
- drif30: rif at e6fa0000 {
- compatible = "renesas,r8a7795-drif",
- "renesas,rcar-gen3-drif";
- reg = <0 0xe6fa0000 0 0x64>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 509>;
- clock-names = "fck";
- dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
- dma-names = "rx", "rx";
+ ipmmu_vp0: mmu at fe990000 {
+ compatible = "renesas,ipmmu-r8a7795";
+ reg = <0 0xfe990000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 16>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_vp1: mmu at fe980000 {
+ compatible = "renesas,ipmmu-r8a7795";
+ reg = <0 0xfe980000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 17>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ #iommu-cells = <1>;
+ };
+
+ avb: ethernet at e6800000 {
+ compatible = "renesas,etheravb-r8a7795",
+ "renesas,etheravb-rcar-gen3";
+ reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15",
+ "ch16", "ch17", "ch18", "ch19",
+ "ch20", "ch21", "ch22", "ch23",
+ "ch24";
+ clocks = <&cpg CPG_MOD 812>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 509>;
- renesas,bonding = <&drif31>;
+ resets = <&cpg 812>;
+ phy-mode = "rgmii";
+ iommus = <&ipmmu_ds0 16>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
};
- drif31: rif at e6fb0000 {
- compatible = "renesas,r8a7795-drif",
- "renesas,rcar-gen3-drif";
- reg = <0 0xe6fb0000 0 0x64>;
- interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 508>;
- clock-names = "fck";
- dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
- dma-names = "rx", "rx";
+ can0: can at e6c30000 {
+ compatible = "renesas,can-r8a7795",
+ "renesas,rcar-gen3-can";
+ reg = <0 0xe6c30000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 916>,
+ <&cpg CPG_CORE R8A7795_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
+ assigned-clock-rates = <40000000>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 508>;
- renesas,bonding = <&drif30>;
+ resets = <&cpg 916>;
status = "disabled";
};
- hscif0: serial at e6540000 {
- compatible = "renesas,hscif-r8a7795",
- "renesas,rcar-gen3-hscif",
- "renesas,hscif";
- reg = <0 0xe6540000 0 96>;
- interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 520>,
- <&cpg CPG_CORE R8A7795_CLK_S3D1>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac1 0x31>, <&dmac1 0x30>,
- <&dmac2 0x31>, <&dmac2 0x30>;
- dma-names = "tx", "rx", "tx", "rx";
+ can1: can at e6c38000 {
+ compatible = "renesas,can-r8a7795",
+ "renesas,rcar-gen3-can";
+ reg = <0 0xe6c38000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 915>,
+ <&cpg CPG_CORE R8A7795_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
+ assigned-clock-rates = <40000000>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 520>;
+ resets = <&cpg 915>;
status = "disabled";
};
- hscif1: serial at e6550000 {
- compatible = "renesas,hscif-r8a7795",
- "renesas,rcar-gen3-hscif",
- "renesas,hscif";
- reg = <0 0xe6550000 0 96>;
- interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 519>,
- <&cpg CPG_CORE R8A7795_CLK_S3D1>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac1 0x33>, <&dmac1 0x32>,
- <&dmac2 0x33>, <&dmac2 0x32>;
- dma-names = "tx", "rx", "tx", "rx";
+ canfd: can at e66c0000 {
+ compatible = "renesas,r8a7795-canfd",
+ "renesas,rcar-gen3-canfd";
+ reg = <0 0xe66c0000 0 0x8000>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 914>,
+ <&cpg CPG_CORE R8A7795_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "fck", "canfd", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
+ assigned-clock-rates = <40000000>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 519>;
+ resets = <&cpg 914>;
status = "disabled";
+
+ channel0 {
+ status = "disabled";
+ };
+
+ channel1 {
+ status = "disabled";
+ };
};
- hscif2: serial at e6560000 {
- compatible = "renesas,hscif-r8a7795",
- "renesas,rcar-gen3-hscif",
- "renesas,hscif";
- reg = <0 0xe6560000 0 96>;
- interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 518>,
- <&cpg CPG_CORE R8A7795_CLK_S3D1>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac1 0x35>, <&dmac1 0x34>,
- <&dmac2 0x35>, <&dmac2 0x34>;
- dma-names = "tx", "rx", "tx", "rx";
+ pwm0: pwm at e6e30000 {
+ compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
+ reg = <0 0xe6e30000 0 0x8>;
+ clocks = <&cpg CPG_MOD 523>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 518>;
+ resets = <&cpg 523>;
+ #pwm-cells = <2>;
status = "disabled";
};
- hscif3: serial at e66a0000 {
- compatible = "renesas,hscif-r8a7795",
- "renesas,rcar-gen3-hscif",
- "renesas,hscif";
- reg = <0 0xe66a0000 0 96>;
- interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 517>,
- <&cpg CPG_CORE R8A7795_CLK_S3D1>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x37>, <&dmac0 0x36>;
- dma-names = "tx", "rx";
+ pwm1: pwm at e6e31000 {
+ compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
+ reg = <0 0xe6e31000 0 0x8>;
+ clocks = <&cpg CPG_MOD 523>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 517>;
+ resets = <&cpg 523>;
+ #pwm-cells = <2>;
status = "disabled";
};
- hscif4: serial at e66b0000 {
- compatible = "renesas,hscif-r8a7795",
- "renesas,rcar-gen3-hscif",
- "renesas,hscif";
- reg = <0 0xe66b0000 0 96>;
- interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 516>,
- <&cpg CPG_CORE R8A7795_CLK_S3D1>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac0 0x39>, <&dmac0 0x38>;
- dma-names = "tx", "rx";
+ pwm2: pwm at e6e32000 {
+ compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
+ reg = <0 0xe6e32000 0 0x8>;
+ clocks = <&cpg CPG_MOD 523>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 516>;
+ resets = <&cpg 523>;
+ #pwm-cells = <2>;
status = "disabled";
};
- msiof0: spi at e6e90000 {
- compatible = "renesas,msiof-r8a7795",
- "renesas,rcar-gen3-msiof";
- reg = <0 0xe6e90000 0 0x0064>;
- interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 211>;
- dmas = <&dmac1 0x41>, <&dmac1 0x40>,
- <&dmac2 0x41>, <&dmac2 0x40>;
- dma-names = "tx", "rx", "tx", "rx";
+ pwm3: pwm at e6e33000 {
+ compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
+ reg = <0 0xe6e33000 0 0x8>;
+ clocks = <&cpg CPG_MOD 523>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 211>;
- #address-cells = <1>;
- #size-cells = <0>;
+ resets = <&cpg 523>;
+ #pwm-cells = <2>;
status = "disabled";
};
- msiof1: spi at e6ea0000 {
- compatible = "renesas,msiof-r8a7795",
- "renesas,rcar-gen3-msiof";
- reg = <0 0xe6ea0000 0 0x0064>;
- interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 210>;
- dmas = <&dmac1 0x43>, <&dmac1 0x42>,
- <&dmac2 0x43>, <&dmac2 0x42>;
- dma-names = "tx", "rx", "tx", "rx";
+ pwm4: pwm at e6e34000 {
+ compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
+ reg = <0 0xe6e34000 0 0x8>;
+ clocks = <&cpg CPG_MOD 523>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 210>;
- #address-cells = <1>;
- #size-cells = <0>;
+ resets = <&cpg 523>;
+ #pwm-cells = <2>;
status = "disabled";
};
- msiof2: spi at e6c00000 {
- compatible = "renesas,msiof-r8a7795",
- "renesas,rcar-gen3-msiof";
- reg = <0 0xe6c00000 0 0x0064>;
- interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 209>;
- dmas = <&dmac0 0x45>, <&dmac0 0x44>;
- dma-names = "tx", "rx";
+ pwm5: pwm at e6e35000 {
+ compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
+ reg = <0 0xe6e35000 0 0x8>;
+ clocks = <&cpg CPG_MOD 523>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 209>;
- #address-cells = <1>;
- #size-cells = <0>;
+ resets = <&cpg 523>;
+ #pwm-cells = <2>;
status = "disabled";
};
- msiof3: spi at e6c10000 {
- compatible = "renesas,msiof-r8a7795",
- "renesas,rcar-gen3-msiof";
- reg = <0 0xe6c10000 0 0x0064>;
- interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 208>;
- dmas = <&dmac0 0x47>, <&dmac0 0x46>;
- dma-names = "tx", "rx";
+ pwm6: pwm at e6e36000 {
+ compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
+ reg = <0 0xe6e36000 0 0x8>;
+ clocks = <&cpg CPG_MOD 523>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 208>;
- #address-cells = <1>;
- #size-cells = <0>;
+ resets = <&cpg 523>;
+ #pwm-cells = <2>;
status = "disabled";
};
@@ -1316,204 +1347,185 @@
status = "disabled";
};
- i2c_dvfs: i2c at e60b0000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a7795",
- "renesas,rcar-gen3-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe60b0000 0 0x425>;
- interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 926>;
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 926>;
- dmas = <&dmac0 0x11>, <&dmac0 0x10>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- i2c0: i2c at e6500000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7795",
- "renesas,rcar-gen3-i2c";
- reg = <0 0xe6500000 0 0x40>;
- interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 931>;
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 931>;
- dmas = <&dmac1 0x91>, <&dmac1 0x90>,
- <&dmac2 0x91>, <&dmac2 0x90>;
+ msiof0: spi at e6e90000 {
+ compatible = "renesas,msiof-r8a7795",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6e90000 0 0x0064>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 211>;
+ dmas = <&dmac1 0x41>, <&dmac1 0x40>,
+ <&dmac2 0x41>, <&dmac2 0x40>;
dma-names = "tx", "rx", "tx", "rx";
- i2c-scl-internal-delay-ns = <110>;
- status = "disabled";
- };
-
- i2c1: i2c at e6508000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7795",
- "renesas,rcar-gen3-i2c";
- reg = <0 0xe6508000 0 0x40>;
- interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 930>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 930>;
- dmas = <&dmac1 0x93>, <&dmac1 0x92>,
- <&dmac2 0x93>, <&dmac2 0x92>;
- dma-names = "tx", "rx", "tx", "rx";
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
-
- i2c2: i2c at e6510000 {
+ resets = <&cpg 211>;
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,i2c-r8a7795",
- "renesas,rcar-gen3-i2c";
- reg = <0 0xe6510000 0 0x40>;
- interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 929>;
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 929>;
- dmas = <&dmac1 0x95>, <&dmac1 0x94>,
- <&dmac2 0x95>, <&dmac2 0x94>;
- dma-names = "tx", "rx", "tx", "rx";
- i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
- i2c3: i2c at e66d0000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7795",
- "renesas,rcar-gen3-i2c";
- reg = <0 0xe66d0000 0 0x40>;
- interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 928>;
+ msiof1: spi at e6ea0000 {
+ compatible = "renesas,msiof-r8a7795",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6ea0000 0 0x0064>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 210>;
+ dmas = <&dmac1 0x43>, <&dmac1 0x42>,
+ <&dmac2 0x43>, <&dmac2 0x42>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 928>;
- dmas = <&dmac0 0x97>, <&dmac0 0x96>;
- dma-names = "tx", "rx";
- i2c-scl-internal-delay-ns = <110>;
+ resets = <&cpg 210>;
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
};
- i2c4: i2c at e66d8000 {
+ msiof2: spi at e6c00000 {
+ compatible = "renesas,msiof-r8a7795",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6c00000 0 0x0064>;
+ interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 209>;
+ dmas = <&dmac0 0x45>, <&dmac0 0x44>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 209>;
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,i2c-r8a7795",
- "renesas,rcar-gen3-i2c";
- reg = <0 0xe66d8000 0 0x40>;
- interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 927>;
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 927>;
- dmas = <&dmac0 0x99>, <&dmac0 0x98>;
- dma-names = "tx", "rx";
- i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
- i2c5: i2c at e66e0000 {
+ msiof3: spi at e6c10000 {
+ compatible = "renesas,msiof-r8a7795",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6c10000 0 0x0064>;
+ interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 208>;
+ dmas = <&dmac0 0x47>, <&dmac0 0x46>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 208>;
#address-cells = <1>;
#size-cells = <0>;
- compatible = "renesas,i2c-r8a7795",
- "renesas,rcar-gen3-i2c";
- reg = <0 0xe66e0000 0 0x40>;
- interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 919>;
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 919>;
- dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
- dma-names = "tx", "rx";
- i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
- i2c6: i2c at e66e8000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a7795",
- "renesas,rcar-gen3-i2c";
- reg = <0 0xe66e8000 0 0x40>;
- interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 918>;
+ drif00: rif at e6f40000 {
+ compatible = "renesas,r8a7795-drif",
+ "renesas,rcar-gen3-drif";
+ reg = <0 0xe6f40000 0 0x64>;
+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 515>;
+ clock-names = "fck";
+ dmas = <&dmac1 0x20>, <&dmac2 0x20>;
+ dma-names = "rx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 918>;
- dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
- dma-names = "tx", "rx";
- i2c-scl-internal-delay-ns = <6>;
+ resets = <&cpg 515>;
+ renesas,bonding = <&drif01>;
status = "disabled";
};
- pwm0: pwm at e6e30000 {
- compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
- reg = <0 0xe6e30000 0 0x8>;
- clocks = <&cpg CPG_MOD 523>;
+ drif01: rif at e6f50000 {
+ compatible = "renesas,r8a7795-drif",
+ "renesas,rcar-gen3-drif";
+ reg = <0 0xe6f50000 0 0x64>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 514>;
+ clock-names = "fck";
+ dmas = <&dmac1 0x22>, <&dmac2 0x22>;
+ dma-names = "rx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 523>;
- #pwm-cells = <2>;
+ resets = <&cpg 514>;
+ renesas,bonding = <&drif00>;
status = "disabled";
};
- pwm1: pwm at e6e31000 {
- compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
- reg = <0 0xe6e31000 0 0x8>;
- clocks = <&cpg CPG_MOD 523>;
+ drif10: rif at e6f60000 {
+ compatible = "renesas,r8a7795-drif",
+ "renesas,rcar-gen3-drif";
+ reg = <0 0xe6f60000 0 0x64>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 513>;
+ clock-names = "fck";
+ dmas = <&dmac1 0x24>, <&dmac2 0x24>;
+ dma-names = "rx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 523>;
- #pwm-cells = <2>;
+ resets = <&cpg 513>;
+ renesas,bonding = <&drif11>;
status = "disabled";
};
- pwm2: pwm at e6e32000 {
- compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
- reg = <0 0xe6e32000 0 0x8>;
- clocks = <&cpg CPG_MOD 523>;
+ drif11: rif at e6f70000 {
+ compatible = "renesas,r8a7795-drif",
+ "renesas,rcar-gen3-drif";
+ reg = <0 0xe6f70000 0 0x64>;
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 512>;
+ clock-names = "fck";
+ dmas = <&dmac1 0x26>, <&dmac2 0x26>;
+ dma-names = "rx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 523>;
- #pwm-cells = <2>;
+ resets = <&cpg 512>;
+ renesas,bonding = <&drif10>;
status = "disabled";
};
- pwm3: pwm at e6e33000 {
- compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
- reg = <0 0xe6e33000 0 0x8>;
- clocks = <&cpg CPG_MOD 523>;
+ drif20: rif at e6f80000 {
+ compatible = "renesas,r8a7795-drif",
+ "renesas,rcar-gen3-drif";
+ reg = <0 0xe6f80000 0 0x64>;
+ interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 511>;
+ clock-names = "fck";
+ dmas = <&dmac1 0x28>, <&dmac2 0x28>;
+ dma-names = "rx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 523>;
- #pwm-cells = <2>;
+ resets = <&cpg 511>;
+ renesas,bonding = <&drif21>;
status = "disabled";
};
- pwm4: pwm at e6e34000 {
- compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
- reg = <0 0xe6e34000 0 0x8>;
- clocks = <&cpg CPG_MOD 523>;
+ drif21: rif at e6f90000 {
+ compatible = "renesas,r8a7795-drif",
+ "renesas,rcar-gen3-drif";
+ reg = <0 0xe6f90000 0 0x64>;
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 510>;
+ clock-names = "fck";
+ dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
+ dma-names = "rx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 523>;
- #pwm-cells = <2>;
+ resets = <&cpg 510>;
+ renesas,bonding = <&drif20>;
status = "disabled";
};
- pwm5: pwm at e6e35000 {
- compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
- reg = <0 0xe6e35000 0 0x8>;
- clocks = <&cpg CPG_MOD 523>;
+ drif30: rif at e6fa0000 {
+ compatible = "renesas,r8a7795-drif",
+ "renesas,rcar-gen3-drif";
+ reg = <0 0xe6fa0000 0 0x64>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 509>;
+ clock-names = "fck";
+ dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
+ dma-names = "rx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 523>;
- #pwm-cells = <2>;
+ resets = <&cpg 509>;
+ renesas,bonding = <&drif31>;
status = "disabled";
};
- pwm6: pwm at e6e36000 {
- compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
- reg = <0 0xe6e36000 0 0x8>;
- clocks = <&cpg CPG_MOD 523>;
+ drif31: rif at e6fb0000 {
+ compatible = "renesas,r8a7795-drif",
+ "renesas,rcar-gen3-drif";
+ reg = <0 0xe6fb0000 0 0x64>;
+ interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 508>;
+ clock-names = "fck";
+ dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
+ dma-names = "rx", "rx";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 523>;
- #pwm-cells = <2>;
+ resets = <&cpg 508>;
+ renesas,bonding = <&drif30>;
status = "disabled";
};
@@ -1713,29 +1725,88 @@
};
};
- sata: sata at ee300000 {
- compatible = "renesas,sata-r8a7795",
- "renesas,rcar-gen3-sata";
- reg = <0 0xee300000 0 0x200000>;
- interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 815>;
+ audma0: dma-controller at ec700000 {
+ compatible = "renesas,dmac-r8a7795",
+ "renesas,rcar-dmac";
+ reg = <0 0xec700000 0 0x10000>;
+ interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 502>;
+ clock-names = "fck";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 815>;
- status = "disabled";
- iommus = <&ipmmu_hc 2>;
+ resets = <&cpg 502>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
+ <&ipmmu_mp0 2>, <&ipmmu_mp0 3>,
+ <&ipmmu_mp0 4>, <&ipmmu_mp0 5>,
+ <&ipmmu_mp0 6>, <&ipmmu_mp0 7>,
+ <&ipmmu_mp0 8>, <&ipmmu_mp0 9>,
+ <&ipmmu_mp0 10>, <&ipmmu_mp0 11>,
+ <&ipmmu_mp0 12>, <&ipmmu_mp0 13>,
+ <&ipmmu_mp0 14>, <&ipmmu_mp0 15>;
};
- usb3_phy0: usb-phy at e65ee000 {
- compatible = "renesas,r8a7795-usb3-phy",
- "renesas,rcar-gen3-usb3-phy";
- reg = <0 0xe65ee000 0 0x90>;
- clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
- <&usb_extal_clk>;
- clock-names = "usb3-if", "usb3s_clk", "usb_extal";
+ audma1: dma-controller at ec720000 {
+ compatible = "renesas,dmac-r8a7795",
+ "renesas,rcar-dmac";
+ reg = <0 0xec720000 0 0x10000>;
+ interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15";
+ clocks = <&cpg CPG_MOD 501>;
+ clock-names = "fck";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 328>;
- #phy-cells = <0>;
- status = "disabled";
+ resets = <&cpg 501>;
+ #dma-cells = <1>;
+ dma-channels = <16>;
+ iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>,
+ <&ipmmu_mp0 18>, <&ipmmu_mp0 19>,
+ <&ipmmu_mp0 20>, <&ipmmu_mp0 21>,
+ <&ipmmu_mp0 22>, <&ipmmu_mp0 23>,
+ <&ipmmu_mp0 24>, <&ipmmu_mp0 25>,
+ <&ipmmu_mp0 26>, <&ipmmu_mp0 27>,
+ <&ipmmu_mp0 28>, <&ipmmu_mp0 29>,
+ <&ipmmu_mp0 30>, <&ipmmu_mp0 31>;
};
xhci0: usb at ee000000 {
@@ -1759,153 +1830,51 @@
status = "disabled";
};
- usb_dmac0: dma-controller at e65a0000 {
- compatible = "renesas,r8a7795-usb-dmac",
- "renesas,usb-dmac";
- reg = <0 0xe65a0000 0 0x100>;
- interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1";
- clocks = <&cpg CPG_MOD 330>;
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 330>;
- #dma-cells = <1>;
- dma-channels = <2>;
- };
-
- usb_dmac1: dma-controller at e65b0000 {
- compatible = "renesas,r8a7795-usb-dmac",
- "renesas,usb-dmac";
- reg = <0 0xe65b0000 0 0x100>;
- interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1";
- clocks = <&cpg CPG_MOD 331>;
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 331>;
- #dma-cells = <1>;
- dma-channels = <2>;
- };
-
- usb_dmac2: dma-controller at e6460000 {
- compatible = "renesas,r8a7795-usb-dmac",
- "renesas,usb-dmac";
- reg = <0 0xe6460000 0 0x100>;
- interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1";
- clocks = <&cpg CPG_MOD 326>;
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 326>;
- #dma-cells = <1>;
- dma-channels = <2>;
- };
-
- usb_dmac3: dma-controller at e6470000 {
- compatible = "renesas,r8a7795-usb-dmac",
- "renesas,usb-dmac";
- reg = <0 0xe6470000 0 0x100>;
- interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1";
- clocks = <&cpg CPG_MOD 329>;
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 329>;
- #dma-cells = <1>;
- dma-channels = <2>;
- };
-
- sdhi0: sd at ee100000 {
- compatible = "renesas,sdhi-r8a7795",
- "renesas,rcar-gen3-sdhi";
- reg = <0 0xee100000 0 0x2000>;
- interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 314>;
- max-frequency = <200000000>;
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 314>;
- status = "disabled";
- };
-
- sdhi1: sd at ee120000 {
- compatible = "renesas,sdhi-r8a7795",
- "renesas,rcar-gen3-sdhi";
- reg = <0 0xee120000 0 0x2000>;
- interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 313>;
- max-frequency = <200000000>;
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 313>;
- status = "disabled";
- };
-
- sdhi2: sd at ee140000 {
- compatible = "renesas,sdhi-r8a7795",
- "renesas,rcar-gen3-sdhi";
- reg = <0 0xee140000 0 0x2000>;
- interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 312>;
- max-frequency = <200000000>;
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 312>;
- status = "disabled";
- };
-
- sdhi3: sd at ee160000 {
- compatible = "renesas,sdhi-r8a7795",
- "renesas,rcar-gen3-sdhi";
- reg = <0 0xee160000 0 0x2000>;
- interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 311>;
- max-frequency = <200000000>;
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 311>;
- status = "disabled";
- };
-
- usb2_phy0: usb-phy at ee080200 {
- compatible = "renesas,usb2-phy-r8a7795",
- "renesas,rcar-gen3-usb2-phy";
- reg = <0 0xee080200 0 0x700>;
+ ohci0: usb at ee080000 {
+ compatible = "generic-ohci";
+ reg = <0 0xee080000 0 0x100>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
+ phys = <&usb2_phy0>;
+ phy-names = "usb";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 703>;
- #phy-cells = <0>;
status = "disabled";
};
- usb2_phy1: usb-phy at ee0a0200 {
- compatible = "renesas,usb2-phy-r8a7795",
- "renesas,rcar-gen3-usb2-phy";
- reg = <0 0xee0a0200 0 0x700>;
+ ohci1: usb at ee0a0000 {
+ compatible = "generic-ohci";
+ reg = <0 0xee0a0000 0 0x100>;
+ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 702>;
+ phys = <&usb2_phy1>;
+ phy-names = "usb";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 702>;
- #phy-cells = <0>;
status = "disabled";
};
- usb2_phy2: usb-phy at ee0c0200 {
- compatible = "renesas,usb2-phy-r8a7795",
- "renesas,rcar-gen3-usb2-phy";
- reg = <0 0xee0c0200 0 0x700>;
+ ohci2: usb at ee0c0000 {
+ compatible = "generic-ohci";
+ reg = <0 0xee0c0000 0 0x100>;
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 701>;
+ phys = <&usb2_phy2>;
+ phy-names = "usb";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 701>;
- #phy-cells = <0>;
status = "disabled";
};
- usb2_phy3: usb-phy at ee0e0200 {
- compatible = "renesas,usb2-phy-r8a7795",
- "renesas,rcar-gen3-usb2-phy";
- reg = <0 0xee0e0200 0 0x700>;
+ ohci3: usb at ee0e0000 {
+ compatible = "generic-ohci";
+ reg = <0 0xee0e0000 0 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 700>;
+ phys = <&usb2_phy3>;
+ phy-names = "usb";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 700>;
- #phy-cells = <0>;
status = "disabled";
};
@@ -1961,86 +1930,127 @@
status = "disabled";
};
- ohci0: usb at ee080000 {
- compatible = "generic-ohci";
- reg = <0 0xee080000 0 0x100>;
+ usb2_phy0: usb-phy at ee080200 {
+ compatible = "renesas,usb2-phy-r8a7795",
+ "renesas,rcar-gen3-usb2-phy";
+ reg = <0 0xee080200 0 0x700>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
- phys = <&usb2_phy0>;
- phy-names = "usb";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 703>;
+ #phy-cells = <0>;
status = "disabled";
};
- ohci1: usb at ee0a0000 {
- compatible = "generic-ohci";
- reg = <0 0xee0a0000 0 0x100>;
- interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ usb2_phy1: usb-phy at ee0a0200 {
+ compatible = "renesas,usb2-phy-r8a7795",
+ "renesas,rcar-gen3-usb2-phy";
+ reg = <0 0xee0a0200 0 0x700>;
clocks = <&cpg CPG_MOD 702>;
- phys = <&usb2_phy1>;
- phy-names = "usb";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
resets = <&cpg 702>;
+ #phy-cells = <0>;
status = "disabled";
};
- ohci2: usb at ee0c0000 {
- compatible = "generic-ohci";
- reg = <0 0xee0c0000 0 0x100>;
- interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ usb2_phy2: usb-phy at ee0c0200 {
+ compatible = "renesas,usb2-phy-r8a7795",
+ "renesas,rcar-gen3-usb2-phy";
+ reg = <0 0xee0c0200 0 0x700>;
clocks = <&cpg CPG_MOD 701>;
- phys = <&usb2_phy2>;
- phy-names = "usb";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 701>;
+ resets = <&cpg 701>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ usb2_phy3: usb-phy at ee0e0200 {
+ compatible = "renesas,usb2-phy-r8a7795",
+ "renesas,rcar-gen3-usb2-phy";
+ reg = <0 0xee0e0200 0 0x700>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 700>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 700>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
+ sdhi0: sd at ee100000 {
+ compatible = "renesas,sdhi-r8a7795",
+ "renesas,rcar-gen3-sdhi";
+ reg = <0 0xee100000 0 0x2000>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 314>;
+ max-frequency = <200000000>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
+ status = "disabled";
+ };
+
+ sdhi1: sd at ee120000 {
+ compatible = "renesas,sdhi-r8a7795",
+ "renesas,rcar-gen3-sdhi";
+ reg = <0 0xee120000 0 0x2000>;
+ interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 313>;
+ max-frequency = <200000000>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 313>;
+ status = "disabled";
+ };
+
+ sdhi2: sd at ee140000 {
+ compatible = "renesas,sdhi-r8a7795",
+ "renesas,rcar-gen3-sdhi";
+ reg = <0 0xee140000 0 0x2000>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 312>;
+ max-frequency = <200000000>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
status = "disabled";
};
- ohci3: usb at ee0e0000 {
- compatible = "generic-ohci";
- reg = <0 0xee0e0000 0 0x100>;
- interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 700>;
- phys = <&usb2_phy3>;
- phy-names = "usb";
+ sdhi3: sd at ee160000 {
+ compatible = "renesas,sdhi-r8a7795",
+ "renesas,rcar-gen3-sdhi";
+ reg = <0 0xee160000 0 0x2000>;
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 311>;
+ max-frequency = <200000000>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 700>;
+ resets = <&cpg 311>;
status = "disabled";
};
- hsusb: usb at e6590000 {
- compatible = "renesas,usbhs-r8a7795",
- "renesas,rcar-gen3-usbhs";
- reg = <0 0xe6590000 0 0x100>;
- interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 704>;
- dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
- <&usb_dmac1 0>, <&usb_dmac1 1>;
- dma-names = "ch0", "ch1", "ch2", "ch3";
- renesas,buswait = <11>;
- phys = <&usb2_phy0>;
- phy-names = "usb";
+ sata: sata at ee300000 {
+ compatible = "renesas,sata-r8a7795",
+ "renesas,rcar-gen3-sata";
+ reg = <0 0xee300000 0 0x200000>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 815>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 704>;
+ resets = <&cpg 815>;
status = "disabled";
+ iommus = <&ipmmu_hc 2>;
};
- hsusb3: usb at e659c000 {
- compatible = "renesas,usbhs-r8a7795",
- "renesas,rcar-gen3-usbhs";
- reg = <0 0xe659c000 0 0x100>;
- interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 705>;
- dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
- <&usb_dmac3 0>, <&usb_dmac3 1>;
- dma-names = "ch0", "ch1", "ch2", "ch3";
- renesas,buswait = <11>;
- phys = <&usb2_phy3>;
- phy-names = "usb";
+ gic: interrupt-controller at f1010000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x0 0xf1010000 0 0x1000>,
+ <0x0 0xf1020000 0 0x20000>,
+ <0x0 0xf1040000 0 0x20000>,
+ <0x0 0xf1060000 0 0x20000>;
+ interrupts = <GIC_PPI 9
+ (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 705>;
- status = "disabled";
+ resets = <&cpg 408>;
};
pciec0: pcie at fe000000 {
@@ -2137,24 +2147,24 @@
resets = <&cpg 820>;
};
- vspbc: vsp at fe920000 {
- compatible = "renesas,vsp2";
- reg = <0 0xfe920000 0 0x8000>;
- interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 624>;
+ fdp1 at fe940000 {
+ compatible = "renesas,fdp1";
+ reg = <0 0xfe940000 0 0x2400>;
+ interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 119>;
power-domains = <&sysc R8A7795_PD_A3VP>;
- resets = <&cpg 624>;
-
- renesas,fcp = <&fcpvb1>;
+ resets = <&cpg 119>;
+ renesas,fcp = <&fcpf0>;
};
- fcpvb1: fcp at fe92f000 {
- compatible = "renesas,fcpv";
- reg = <0 0xfe92f000 0 0x200>;
- clocks = <&cpg CPG_MOD 606>;
+ fdp1 at fe944000 {
+ compatible = "renesas,fdp1";
+ reg = <0 0xfe944000 0 0x2400>;
+ interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 118>;
power-domains = <&sysc R8A7795_PD_A3VP>;
- resets = <&cpg 606>;
- iommus = <&ipmmu_vp1 7>;
+ resets = <&cpg 118>;
+ renesas,fcp = <&fcpf1>;
};
fcpf0: fcp at fe950000 {
@@ -2175,17 +2185,6 @@
iommus = <&ipmmu_vp1 1>;
};
- vspbd: vsp at fe960000 {
- compatible = "renesas,vsp2";
- reg = <0 0xfe960000 0 0x8000>;
- interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 626>;
- power-domains = <&sysc R8A7795_PD_A3VP>;
- resets = <&cpg 626>;
-
- renesas,fcp = <&fcpvb0>;
- };
-
fcpvb0: fcp at fe96f000 {
compatible = "renesas,fcpv";
reg = <0 0xfe96f000 0 0x200>;
@@ -2195,15 +2194,13 @@
iommus = <&ipmmu_vp0 5>;
};
- vspi0: vsp at fe9a0000 {
- compatible = "renesas,vsp2";
- reg = <0 0xfe9a0000 0 0x8000>;
- interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 631>;
+ fcpvb1: fcp at fe92f000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfe92f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 606>;
power-domains = <&sysc R8A7795_PD_A3VP>;
- resets = <&cpg 631>;
-
- renesas,fcp = <&fcpvi0>;
+ resets = <&cpg 606>;
+ iommus = <&ipmmu_vp1 7>;
};
fcpvi0: fcp at fe9af000 {
@@ -2215,17 +2212,6 @@
iommus = <&ipmmu_vp0 8>;
};
- vspi1: vsp at fe9b0000 {
- compatible = "renesas,vsp2";
- reg = <0 0xfe9b0000 0 0x8000>;
- interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 630>;
- power-domains = <&sysc R8A7795_PD_A3VP>;
- resets = <&cpg 630>;
-
- renesas,fcp = <&fcpvi1>;
- };
-
fcpvi1: fcp at fe9bf000 {
compatible = "renesas,fcpv";
reg = <0 0xfe9bf000 0 0x200>;
@@ -2235,6 +2221,55 @@
iommus = <&ipmmu_vp1 9>;
};
+ fcpvd0: fcp at fea27000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea27000 0 0x200>;
+ clocks = <&cpg CPG_MOD 603>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 603>;
+ iommus = <&ipmmu_vi0 8>;
+ };
+
+ fcpvd1: fcp at fea2f000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea2f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 602>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 602>;
+ iommus = <&ipmmu_vi0 9>;
+ };
+
+ fcpvd2: fcp at fea37000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea37000 0 0x200>;
+ clocks = <&cpg CPG_MOD 601>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 601>;
+ iommus = <&ipmmu_vi1 10>;
+ };
+
+ vspbd: vsp at fe960000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe960000 0 0x8000>;
+ interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 626>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ resets = <&cpg 626>;
+
+ renesas,fcp = <&fcpvb0>;
+ };
+
+ vspbc: vsp at fe920000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe920000 0 0x8000>;
+ interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 624>;
+ power-domains = <&sysc R8A7795_PD_A3VP>;
+ resets = <&cpg 624>;
+
+ renesas,fcp = <&fcpvb1>;
+ };
+
vspd0: vsp at fea20000 {
compatible = "renesas,vsp2";
reg = <0 0xfea20000 0 0x8000>;
@@ -2246,15 +2281,6 @@
renesas,fcp = <&fcpvd0>;
};
- fcpvd0: fcp at fea27000 {
- compatible = "renesas,fcpv";
- reg = <0 0xfea27000 0 0x200>;
- clocks = <&cpg CPG_MOD 603>;
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 603>;
- iommus = <&ipmmu_vi0 8>;
- };
-
vspd1: vsp at fea28000 {
compatible = "renesas,vsp2";
reg = <0 0xfea28000 0 0x8000>;
@@ -2266,15 +2292,6 @@
renesas,fcp = <&fcpvd1>;
};
- fcpvd1: fcp at fea2f000 {
- compatible = "renesas,fcpv";
- reg = <0 0xfea2f000 0 0x200>;
- clocks = <&cpg CPG_MOD 602>;
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 602>;
- iommus = <&ipmmu_vi0 9>;
- };
-
vspd2: vsp at fea30000 {
compatible = "renesas,vsp2";
reg = <0 0xfea30000 0 0x8000>;
@@ -2286,33 +2303,26 @@
renesas,fcp = <&fcpvd2>;
};
- fcpvd2: fcp at fea37000 {
- compatible = "renesas,fcpv";
- reg = <0 0xfea37000 0 0x200>;
- clocks = <&cpg CPG_MOD 601>;
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 601>;
- iommus = <&ipmmu_vi1 10>;
- };
-
- fdp1 at fe940000 {
- compatible = "renesas,fdp1";
- reg = <0 0xfe940000 0 0x2400>;
- interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 119>;
+ vspi0: vsp at fe9a0000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe9a0000 0 0x8000>;
+ interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 631>;
power-domains = <&sysc R8A7795_PD_A3VP>;
- resets = <&cpg 119>;
- renesas,fcp = <&fcpf0>;
+ resets = <&cpg 631>;
+
+ renesas,fcp = <&fcpvi0>;
};
- fdp1 at fe944000 {
- compatible = "renesas,fdp1";
- reg = <0 0xfe944000 0 0x2400>;
- interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 118>;
+ vspi1: vsp at fe9b0000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe9b0000 0 0x8000>;
+ interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 630>;
power-domains = <&sysc R8A7795_PD_A3VP>;
- resets = <&cpg 118>;
- renesas,fcp = <&fcpf1>;
+ resets = <&cpg 630>;
+
+ renesas,fcp = <&fcpvi1>;
};
hdmi0: hdmi at fead0000 {
@@ -2412,19 +2422,9 @@
};
};
- tsc: thermal at e6198000 {
- compatible = "renesas,r8a7795-thermal";
- reg = <0 0xe6198000 0 0x100>,
- <0 0xe61a0000 0 0x100>,
- <0 0xe61a8000 0 0x100>;
- interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 522>;
- power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
- resets = <&cpg 522>;
- #thermal-sensor-cells = <1>;
- status = "okay";
+ prr: chipid at fff00044 {
+ compatible = "renesas,prr";
+ reg = <0 0xfff00044 0 4>;
};
};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 013/102] arm64: dts: renesas: r8a77965: Add all MSIOF device nodes
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (11 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 012/102] arm64: dts: renesas: r8a7795: sort subnodes of the soc node Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 014/102] arm64: dts: renesas: r8a77965: Add PWM " Simon Horman
` (89 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Add the device nodes for all MSIOF SPI controllers.
Based on several similar patches of the R8A7796 device tree
by Geert Uytterhoeven <geert+renesas@glider.be>
and Simon Horman <horms+renesas@verge.net.au>.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Use numerical power domain indices for initial r8a77965.dtsi]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 62 +++++++++++++++++++++++++++++++
1 file changed, 62 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 6f748e94a901..4371be3e869a 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -805,6 +805,68 @@
/* placeholder */
};
+ msiof0: spi at e6e90000 {
+ compatible = "renesas,msiof-r8a77965",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6e90000 0 0x0064>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 211>;
+ dmas = <&dmac1 0x41>, <&dmac1 0x40>,
+ <&dmac2 0x41>, <&dmac2 0x40>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 211>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof1: spi at e6ea0000 {
+ compatible = "renesas,msiof-r8a77965",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6ea0000 0 0x0064>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 210>;
+ dmas = <&dmac1 0x43>, <&dmac1 0x42>,
+ <&dmac2 0x43>, <&dmac2 0x42>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 210>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof2: spi at e6c00000 {
+ compatible = "renesas,msiof-r8a77965",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6c00000 0 0x0064>;
+ interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 209>;
+ dmas = <&dmac0 0x45>, <&dmac0 0x44>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 209>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ msiof3: spi at e6c10000 {
+ compatible = "renesas,msiof-r8a77965",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6c10000 0 0x0064>;
+ interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 208>;
+ dmas = <&dmac0 0x47>, <&dmac0 0x46>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 208>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
du: display at feb00000 {
reg = <0 0xfeb00000 0 0x80000>,
<0 0xfeb90000 0 0x14>;
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 014/102] arm64: dts: renesas: r8a77965: Add PWM device nodes
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (12 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 013/102] arm64: dts: renesas: r8a77965: Add all MSIOF device nodes Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 015/102] arm64: dts: renesas: r8a77970: add FCPVD support Simon Horman
` (88 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds PWM device nodes for r8a77965.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 48 ++++++++++++++++++++++++++-----
1 file changed, 41 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 4371be3e869a..a41f91653d93 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -770,39 +770,73 @@
};
pwm0: pwm at e6e30000 {
+ compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
reg = <0 0xe6e30000 0 8>;
- /* placeholder */
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc 32>;
+ status = "disabled";
};
pwm1: pwm at e6e31000 {
+ compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
reg = <0 0xe6e31000 0 8>;
#pwm-cells = <2>;
- /* placeholder */
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc 32>;
+ status = "disabled";
};
pwm2: pwm at e6e32000 {
+ compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
reg = <0 0xe6e32000 0 8>;
- /* placeholder */
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc 32>;
+ status = "disabled";
};
pwm3: pwm at e6e33000 {
+ compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
reg = <0 0xe6e33000 0 8>;
- /* placeholder */
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc 32>;
+ status = "disabled";
};
pwm4: pwm at e6e34000 {
+ compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
reg = <0 0xe6e34000 0 8>;
- /* placeholder */
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc 32>;
+ status = "disabled";
};
pwm5: pwm at e6e35000 {
+ compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
reg = <0 0xe6e35000 0 8>;
- /* placeholder */
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc 32>;
+ status = "disabled";
};
pwm6: pwm at e6e36000 {
+ compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
reg = <0 0xe6e36000 0 8>;
- /* placeholder */
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc 32>;
+ status = "disabled";
};
msiof0: spi at e6e90000 {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 015/102] arm64: dts: renesas: r8a77970: add FCPVD support
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (13 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 014/102] arm64: dts: renesas: r8a77965: Add PWM " Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 016/102] arm64: dts: renesas: Add Renesas R8A77990 Kconfig support Simon Horman
` (87 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Describe FCPVD0 in the R8A77970 device tree; it will be used by VSPD0 in
the next patch...
Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@hitachi.com>.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index e8358d9bfd66..71f466daa036 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -617,6 +617,14 @@
#address-cells = <1>;
#size-cells = <0>;
};
+
+ fcpvd0: fcp at fea27000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea27000 0 0x200>;
+ clocks = <&cpg CPG_MOD 603>;
+ power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+ resets = <&cpg 603>;
+ };
};
timer {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 016/102] arm64: dts: renesas: Add Renesas R8A77990 Kconfig support
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (14 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 015/102] arm64: dts: renesas: r8a77970: add FCPVD support Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 017/102] arm64: dts: renesas: r8a7795: decrease temperature hysteresis Simon Horman
` (86 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Add configuration option for the R-Car E3 (R8A77990) SoC.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/Kconfig.platforms | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 2b1535cdeb7c..d5aeac351fc3 100644
--- a/arch/arm64/Kconfig.platforms
+++ b/arch/arm64/Kconfig.platforms
@@ -208,6 +208,12 @@ config ARCH_R8A77980
help
This enables support for the Renesas R-Car V3H SoC.
+config ARCH_R8A77990
+ bool "Renesas R-Car E3 SoC Platform"
+ depends on ARCH_RENESAS
+ help
+ This enables support for the Renesas R-Car E3 SoC.
+
config ARCH_R8A77995
bool "Renesas R-Car D3 SoC Platform"
depends on ARCH_RENESAS
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 017/102] arm64: dts: renesas: r8a7795: decrease temperature hysteresis
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (15 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 016/102] arm64: dts: renesas: Add Renesas R8A77990 Kconfig support Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 018/102] arm64: dts: renesas: r8a7796: " Simon Horman
` (85 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
To incorporate more tests by the hardware team decrease the hysteresis
value to 1C.
Signed-off-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 0e958ecd2a41..acf0c6f72a4d 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -2437,12 +2437,12 @@
trips {
sensor1_passive: sensor1-passive {
temperature = <95000>;
- hysteresis = <2000>;
+ hysteresis = <1000>;
type = "passive";
};
sensor1_crit: sensor1-crit {
temperature = <120000>;
- hysteresis = <2000>;
+ hysteresis = <1000>;
type = "critical";
};
};
@@ -2463,12 +2463,12 @@
trips {
sensor2_passive: sensor2-passive {
temperature = <95000>;
- hysteresis = <2000>;
+ hysteresis = <1000>;
type = "passive";
};
sensor2_crit: sensor2-crit {
temperature = <120000>;
- hysteresis = <2000>;
+ hysteresis = <1000>;
type = "critical";
};
};
@@ -2489,12 +2489,12 @@
trips {
sensor3_passive: sensor3-passive {
temperature = <95000>;
- hysteresis = <2000>;
+ hysteresis = <1000>;
type = "passive";
};
sensor3_crit: sensor3-crit {
temperature = <120000>;
- hysteresis = <2000>;
+ hysteresis = <1000>;
type = "critical";
};
};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 018/102] arm64: dts: renesas: r8a7796: decrease temperature hysteresis
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (16 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 017/102] arm64: dts: renesas: r8a7795: decrease temperature hysteresis Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 019/102] arm64: dts: renesas: r8a77970: add VSPD support Simon Horman
` (84 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
To incorporate more tests by the hardware team decrease the hysteresis
value to 1C.
Signed-off-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 55a64169d3d4..e6254711556c 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -2072,12 +2072,12 @@
trips {
sensor1_passive: sensor1-passive {
temperature = <95000>;
- hysteresis = <2000>;
+ hysteresis = <1000>;
type = "passive";
};
sensor1_crit: sensor1-crit {
temperature = <120000>;
- hysteresis = <2000>;
+ hysteresis = <1000>;
type = "critical";
};
};
@@ -2098,12 +2098,12 @@
trips {
sensor2_passive: sensor2-passive {
temperature = <95000>;
- hysteresis = <2000>;
+ hysteresis = <1000>;
type = "passive";
};
sensor2_crit: sensor2-crit {
temperature = <120000>;
- hysteresis = <2000>;
+ hysteresis = <1000>;
type = "critical";
};
};
@@ -2124,12 +2124,12 @@
trips {
sensor3_passive: sensor3-passive {
temperature = <95000>;
- hysteresis = <2000>;
+ hysteresis = <1000>;
type = "passive";
};
sensor3_crit: sensor3-crit {
temperature = <120000>;
- hysteresis = <2000>;
+ hysteresis = <1000>;
type = "critical";
};
};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 019/102] arm64: dts: renesas: r8a77970: add VSPD support
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (17 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 018/102] arm64: dts: renesas: r8a7796: " Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 020/102] arm64: dts: renesas: r8a77970: add DU support Simon Horman
` (83 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Describe VSPD0 in the R8A77970 device tree; it will be used by DU in
the next patch...
Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@hitachi.com>.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index 71f466daa036..9a7cf2ab099e 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -625,6 +625,16 @@
power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
resets = <&cpg 603>;
};
+
+ vspd0: vsp at fea20000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfea20000 0 0x8000>;
+ interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 623>;
+ power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+ resets = <&cpg 623>;
+ renesas,fcp = <&fcpvd0>;
+ };
};
timer {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 020/102] arm64: dts: renesas: r8a77970: add DU support
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (18 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 019/102] arm64: dts: renesas: r8a77970: add VSPD support Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 021/102] arm64: dts: renesas: r8a77970: add LVDS support Simon Horman
` (82 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Define the generic R8A77970 part of the DU device node.
Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@hitachi.com>.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index 9a7cf2ab099e..8efb5c3a5da1 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -635,6 +635,35 @@
resets = <&cpg 623>;
renesas,fcp = <&fcpvd0>;
};
+
+ du: display at feb00000 {
+ compatible = "renesas,du-r8a77970";
+ reg = <0 0xfeb00000 0 0x80000>;
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>;
+ clock-names = "du.0";
+ power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+ resets = <&cpg 724>;
+ vsps = <&vspd0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ du_out_rgb: endpoint {
+ };
+ };
+
+ port at 1 {
+ reg = <1>;
+ du_out_lvds0: endpoint {
+ };
+ };
+ };
+ };
};
timer {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 021/102] arm64: dts: renesas: r8a77970: add LVDS support
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (19 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 020/102] arm64: dts: renesas: r8a77970: add DU support Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 022/102] arm64: dts: renesas: eagle: Enable HDMI output Simon Horman
` (81 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Define the generic R8A77970 part of the LVDS device node.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index 8efb5c3a5da1..a194cb8d7d62 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -660,6 +660,34 @@
port at 1 {
reg = <1>;
du_out_lvds0: endpoint {
+ remote-endpoint = <&lvds0_in>;
+ };
+ };
+ };
+ };
+
+ lvds0: lvds-encoder at feb90000 {
+ compatible = "renesas,r8a77970-lvds";
+ reg = <0 0xfeb90000 0 0x14>;
+ clocks = <&cpg CPG_MOD 727>;
+ power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+ resets = <&cpg 727>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ lvds0_in: endpoint {
+ remote-endpoint =
+ <&du_out_lvds0>;
+ };
+ };
+ port at 1 {
+ reg = <1>;
+ lvds0_out: endpoint {
};
};
};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 022/102] arm64: dts: renesas: eagle: Enable HDMI output
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (20 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 021/102] arm64: dts: renesas: r8a77970: add LVDS support Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 023/102] arm64: dts: renesas: r8a77995: sort subnodes of the root node Simon Horman
` (80 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Jacopo Mondi <jacopo+renesas@jmondi.org>
Enable HDMI output on Renesas R-Car V3M Eagle board.
The HDMI output is enabled connecting the DU LVDS output to the
transparent LVDS converter THC63LVD1024, and successively routing its
RGB output to the ADV7511W HDMI encoder.
Signed-off-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
[for THC63LVD1024: ]
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970-eagle.dts | 93 ++++++++++++++++++++++++++
1 file changed, 93 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
index 3c5f598c9766..ebfbb51ab168 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
@@ -31,6 +31,51 @@
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x38000000>;
};
+
+ hdmi-out {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_out: endpoint {
+ remote-endpoint = <&adv7511_out>;
+ };
+ };
+ };
+
+ d3p3: regulator-fixed {
+ compatible = "regulator-fixed";
+ regulator-name = "fixed-3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ lvds-decoder {
+ compatible = "thine,thc63lvd1024";
+
+ vcc-supply = <&d3p3>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ thc63lvd1024_in: endpoint {
+ remote-endpoint = <&lvds0_out>;
+ };
+ };
+
+ port at 2 {
+ reg = <2>;
+ thc63lvd1024_out: endpoint {
+ remote-endpoint = <&adv7511_in>;
+ };
+ };
+ };
+ };
};
&avb {
@@ -68,6 +113,38 @@
gpio-controller;
#gpio-cells = <2>;
};
+
+ hdmi at 39 {
+ compatible = "adi,adv7511w";
+ reg = <0x39>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
+
+ adi,input-depth = <8>;
+ adi,input-colorspace = "rgb";
+ adi,input-clock = "1x";
+ adi,input-style = <1>;
+ adi,input-justification = "evenly";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ adv7511_in: endpoint {
+ remote-endpoint = <&thc63lvd1024_out>;
+ };
+ };
+
+ port at 1 {
+ reg = <1>;
+ adv7511_out: endpoint {
+ remote-endpoint = <&hdmi_con_out>;
+ };
+ };
+ };
+ };
};
&pfc {
@@ -93,3 +170,19 @@
status = "okay";
};
+
+&du {
+ status = "okay";
+};
+
+&lvds0 {
+ status = "okay";
+
+ ports {
+ port at 1 {
+ lvds0_out: endpoint {
+ remote-endpoint = <&thc63lvd1024_in>;
+ };
+ };
+ };
+};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 023/102] arm64: dts: renesas: r8a77995: sort subnodes of the root node
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (21 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 022/102] arm64: dts: renesas: eagle: Enable HDMI output Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 024/102] arm64: dts: renesas: r8a77995: sort subnodes of the soc node Simon Horman
` (79 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Sort subnodes of the root node alphanumerically.
This is part of an ongoing effort to provide consistent node
order in the DT of Renesas SoCs to improve maintainability.
This should not have any run-time effect.
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index 82aed7ee984c..cf476556504a 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -18,9 +18,11 @@
#address-cells = <2>;
#size-cells = <2>;
- psci {
- compatible = "arm,psci-1.0", "arm,psci-0.2";
- method = "smc";
+ /* External CAN clock - to be overridden by boards that provide it */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
};
cpus {
@@ -51,18 +53,16 @@
clock-frequency = <0>;
};
- /* External CAN clock - to be overridden by boards that provide it */
- can_clk: can {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
pmu_a53 {
compatible = "arm,cortex-a53-pmu";
interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
};
+ psci {
+ compatible = "arm,psci-1.0", "arm,psci-0.2";
+ method = "smc";
+ };
+
scif_clk: scif {
compatible = "fixed-clock";
#clock-cells = <0>;
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 024/102] arm64: dts: renesas: r8a77995: sort subnodes of the soc node
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (22 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 023/102] arm64: dts: renesas: r8a77995: sort subnodes of the root node Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 025/102] arm64: dts: renesas: r8a77965: sort subnodes of the root node Simon Horman
` (78 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Sort subnodes of the soc node.
- The primary key is the bus address.
- The secondary key is the IP block.
- The tertiary key is the node name.
This is part of an ongoing effort to provide consistent node
order in the DT of Renesas SoCs to improve maintainability.
This should not have any run-time effect.
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 697 +++++++++++++++---------------
1 file changed, 348 insertions(+), 349 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index cf476556504a..a97830589b0d 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -76,23 +76,6 @@
#size-cells = <2>;
ranges;
- gic: interrupt-controller at f1010000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0x0 0xf1010000 0 0x1000>,
- <0x0 0xf1020000 0 0x20000>,
- <0x0 0xf1040000 0 0x20000>,
- <0x0 0xf1060000 0 0x20000>;
- interrupts = <GIC_PPI 9
- (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
- resets = <&cpg 408>;
- };
-
rwdt: watchdog at e6020000 {
compatible = "renesas,r8a77995-wdt",
"renesas,rcar-gen3-wdt";
@@ -103,88 +86,123 @@
status = "disabled";
};
- ipmmu_vi0: mmu at febd0000 {
- compatible = "renesas,ipmmu-r8a77995";
- reg = <0 0xfebd0000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 14>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_vp0: mmu at fe990000 {
- compatible = "renesas,ipmmu-r8a77995";
- reg = <0 0xfe990000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 16>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_vc0: mmu at fe6b0000 {
- compatible = "renesas,ipmmu-r8a77995";
- reg = <0 0xfe6b0000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 12>;
- #iommu-cells = <1>;
- status = "disabled";
+ gpio0: gpio at e6050000 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 9>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 912>;
};
- ipmmu_pv0: mmu at fd800000 {
- compatible = "renesas,ipmmu-r8a77995";
- reg = <0 0xfd800000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 6>;
- #iommu-cells = <1>;
- status = "disabled";
+ gpio1: gpio at e6051000 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 911>;
};
- ipmmu_hc: mmu at e6570000 {
- compatible = "renesas,ipmmu-r8a77995";
- reg = <0 0xe6570000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 2>;
- #iommu-cells = <1>;
- status = "disabled";
+ gpio2: gpio at e6052000 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 910>;
};
- ipmmu_rt: mmu at ffc80000 {
- compatible = "renesas,ipmmu-r8a77995";
- reg = <0 0xffc80000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 10>;
- #iommu-cells = <1>;
- status = "disabled";
+ gpio3: gpio at e6053000 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 10>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 909>;
};
- ipmmu_mp: mmu at ec670000 {
- compatible = "renesas,ipmmu-r8a77995";
- reg = <0 0xec670000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 4>;
- #iommu-cells = <1>;
- status = "disabled";
+ gpio4: gpio at e6054000 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 908>;
};
- ipmmu_ds0: mmu at e6740000 {
- compatible = "renesas,ipmmu-r8a77995";
- reg = <0 0xe6740000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 0>;
- #iommu-cells = <1>;
- status = "disabled";
+ gpio5: gpio at e6055000 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 160 21>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 907>;
};
- ipmmu_ds1: mmu at e7740000 {
- compatible = "renesas,ipmmu-r8a77995";
- reg = <0 0xe7740000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 1>;
- #iommu-cells = <1>;
- status = "disabled";
+ gpio6: gpio at e6055400 {
+ compatible = "renesas,gpio-r8a77995",
+ "renesas,rcar-gen3-gpio",
+ "renesas,gpio-rcar";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 192 14>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 906>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 906>;
};
- ipmmu_mm: mmu at e67b0000 {
- compatible = "renesas,ipmmu-r8a77995";
- reg = <0 0xe67b0000 0 0x1000>;
- interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
- #iommu-cells = <1>;
- status = "disabled";
+ pfc: pin-controller at e6060000 {
+ compatible = "renesas,pfc-r8a77995";
+ reg = <0 0xe6060000 0 0x508>;
};
-
cpg: clock-controller at e6150000 {
compatible = "renesas,r8a77995-cpg-mssr";
reg = <0 0xe6150000 0 0x1000>;
@@ -200,16 +218,6 @@
reg = <0 0xe6160000 0 0x0200>;
};
- pfc: pin-controller at e6060000 {
- compatible = "renesas,pfc-r8a77995";
- reg = <0 0xe6060000 0 0x508>;
- };
-
- prr: chipid at fff00044 {
- compatible = "renesas,prr";
- reg = <0 0xfff00044 0 4>;
- };
-
sysc: system-controller at e6180000 {
compatible = "renesas,r8a77995-sysc";
reg = <0 0xe6180000 0 0x0400>;
@@ -232,6 +240,98 @@
resets = <&cpg 407>;
};
+ i2c0: i2c at e6500000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a77995",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe6500000 0 0x40>;
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 931>;
+ dmas = <&dmac1 0x91>, <&dmac1 0x90>,
+ <&dmac2 0x91>, <&dmac2 0x90>;
+ dma-names = "tx", "rx", "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+
+ i2c1: i2c at e6508000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a77995",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe6508000 0 0x40>;
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 930>;
+ dmas = <&dmac1 0x93>, <&dmac1 0x92>,
+ <&dmac2 0x93>, <&dmac2 0x92>;
+ dma-names = "tx", "rx", "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+
+ i2c2: i2c at e6510000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a77995",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe6510000 0 0x40>;
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 929>;
+ dmas = <&dmac1 0x95>, <&dmac1 0x94>,
+ <&dmac2 0x95>, <&dmac2 0x94>;
+ dma-names = "tx", "rx", "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+
+ i2c3: i2c at e66d0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a77995",
+ "renesas,rcar-gen3-i2c";
+ reg = <0 0xe66d0000 0 0x40>;
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 928>;
+ dmas = <&dmac0 0x97>, <&dmac0 0x96>;
+ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
+ };
+
+ canfd: can at e66c0000 {
+ compatible = "renesas,r8a77995-canfd",
+ "renesas,rcar-gen3-canfd";
+ reg = <0 0xe66c0000 0 0x8000>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 914>,
+ <&cpg CPG_CORE R8A77995_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "fck", "canfd", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
+ assigned-clock-rates = <40000000>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 914>;
+ status = "disabled";
+
+ channel0 {
+ status = "disabled";
+ };
+
+ channel1 {
+ status = "disabled";
+ };
+ };
+
dmac0: dma-controller at e6700000 {
compatible = "renesas,dmac-r8a77995",
"renesas,rcar-dmac";
@@ -304,173 +404,85 @@
dma-channels = <8>;
};
- gpio0: gpio at e6050000 {
- compatible = "renesas,gpio-r8a77995",
- "renesas,rcar-gen3-gpio",
- "renesas,gpio-rcar";
- reg = <0 0xe6050000 0 0x50>;
- interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 0 9>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 912>;
- power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
- resets = <&cpg 912>;
- };
-
- gpio1: gpio at e6051000 {
- compatible = "renesas,gpio-r8a77995",
- "renesas,rcar-gen3-gpio",
- "renesas,gpio-rcar";
- reg = <0 0xe6051000 0 0x50>;
- interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 32 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 911>;
- power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
- resets = <&cpg 911>;
+ ipmmu_ds0: mmu at e6740000 {
+ compatible = "renesas,ipmmu-r8a77995";
+ reg = <0 0xe6740000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 0>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- gpio2: gpio at e6052000 {
- compatible = "renesas,gpio-r8a77995",
- "renesas,rcar-gen3-gpio",
- "renesas,gpio-rcar";
- reg = <0 0xe6052000 0 0x50>;
- interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 64 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 910>;
- power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
- resets = <&cpg 910>;
+ ipmmu_ds1: mmu at e7740000 {
+ compatible = "renesas,ipmmu-r8a77995";
+ reg = <0 0xe7740000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 1>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- gpio3: gpio at e6053000 {
- compatible = "renesas,gpio-r8a77995",
- "renesas,rcar-gen3-gpio",
- "renesas,gpio-rcar";
- reg = <0 0xe6053000 0 0x50>;
- interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 96 10>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 909>;
- power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
- resets = <&cpg 909>;
+ ipmmu_hc: mmu at e6570000 {
+ compatible = "renesas,ipmmu-r8a77995";
+ reg = <0 0xe6570000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 2>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- gpio4: gpio at e6054000 {
- compatible = "renesas,gpio-r8a77995",
- "renesas,rcar-gen3-gpio",
- "renesas,gpio-rcar";
- reg = <0 0xe6054000 0 0x50>;
- interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 128 32>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 908>;
- power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
- resets = <&cpg 908>;
+ ipmmu_mm: mmu at e67b0000 {
+ compatible = "renesas,ipmmu-r8a77995";
+ reg = <0 0xe67b0000 0 0x1000>;
+ interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- gpio5: gpio at e6055000 {
- compatible = "renesas,gpio-r8a77995",
- "renesas,rcar-gen3-gpio",
- "renesas,gpio-rcar";
- reg = <0 0xe6055000 0 0x50>;
- interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 160 21>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 907>;
- power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
- resets = <&cpg 907>;
+ ipmmu_mp: mmu at ec670000 {
+ compatible = "renesas,ipmmu-r8a77995";
+ reg = <0 0xec670000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 4>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- gpio6: gpio at e6055400 {
- compatible = "renesas,gpio-r8a77995",
- "renesas,rcar-gen3-gpio",
- "renesas,gpio-rcar";
- reg = <0 0xe6055400 0 0x50>;
- interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- #gpio-cells = <2>;
- gpio-controller;
- gpio-ranges = <&pfc 0 192 14>;
- #interrupt-cells = <2>;
- interrupt-controller;
- clocks = <&cpg CPG_MOD 906>;
- power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
- resets = <&cpg 906>;
+ ipmmu_pv0: mmu at fd800000 {
+ compatible = "renesas,ipmmu-r8a77995";
+ reg = <0 0xfd800000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 6>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
- can0: can at e6c30000 {
- compatible = "renesas,can-r8a77995",
- "renesas,rcar-gen3-can";
- reg = <0 0xe6c30000 0 0x1000>;
- interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 916>,
- <&cpg CPG_CORE R8A77995_CLK_CANFD>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
- assigned-clock-rates = <40000000>;
- power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
- resets = <&cpg 916>;
+ ipmmu_rt: mmu at ffc80000 {
+ compatible = "renesas,ipmmu-r8a77995";
+ reg = <0 0xffc80000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 10>;
+ #iommu-cells = <1>;
status = "disabled";
};
- can1: can at e6c38000 {
- compatible = "renesas,can-r8a77995",
- "renesas,rcar-gen3-can";
- reg = <0 0xe6c38000 0 0x1000>;
- interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 915>,
- <&cpg CPG_CORE R8A77995_CLK_CANFD>,
- <&can_clk>;
- clock-names = "clkp1", "clkp2", "can_clk";
- assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
- assigned-clock-rates = <40000000>;
- power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
- resets = <&cpg 915>;
+ ipmmu_vc0: mmu at fe6b0000 {
+ compatible = "renesas,ipmmu-r8a77995";
+ reg = <0 0xfe6b0000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 12>;
+ #iommu-cells = <1>;
status = "disabled";
};
- canfd: can at e66c0000 {
- compatible = "renesas,r8a77995-canfd",
- "renesas,rcar-gen3-canfd";
- reg = <0 0xe66c0000 0 0x8000>;
- interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 914>,
- <&cpg CPG_CORE R8A77995_CLK_CANFD>,
- <&can_clk>;
- clock-names = "fck", "canfd", "can_clk";
- assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
- assigned-clock-rates = <40000000>;
- power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
- resets = <&cpg 914>;
+ ipmmu_vi0: mmu at febd0000 {
+ compatible = "renesas,ipmmu-r8a77995";
+ reg = <0 0xfebd0000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 14>;
+ #iommu-cells = <1>;
status = "disabled";
+ };
- channel0 {
- status = "disabled";
- };
-
- channel1 {
- status = "disabled";
- };
+ ipmmu_vp0: mmu at fe990000 {
+ compatible = "renesas,ipmmu-r8a77995";
+ reg = <0 0xfe990000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 16>;
+ #iommu-cells = <1>;
+ status = "disabled";
};
avb: ethernet at e6800000 {
@@ -519,87 +531,35 @@
status = "disabled";
};
- scif2: serial at e6e88000 {
- compatible = "renesas,scif-r8a77995",
- "renesas,rcar-gen3-scif", "renesas,scif";
- reg = <0 0xe6e88000 0 64>;
- interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 310>,
- <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac1 0x13>, <&dmac1 0x12>,
- <&dmac2 0x13>, <&dmac2 0x12>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
- resets = <&cpg 310>;
- status = "disabled";
- };
-
- i2c0: i2c at e6500000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a77995",
- "renesas,rcar-gen3-i2c";
- reg = <0 0xe6500000 0 0x40>;
- interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 931>;
- power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
- resets = <&cpg 931>;
- dmas = <&dmac1 0x91>, <&dmac1 0x90>,
- <&dmac2 0x91>, <&dmac2 0x90>;
- dma-names = "tx", "rx", "tx", "rx";
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
-
- i2c1: i2c at e6508000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a77995",
- "renesas,rcar-gen3-i2c";
- reg = <0 0xe6508000 0 0x40>;
- interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 930>;
- power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
- resets = <&cpg 930>;
- dmas = <&dmac1 0x93>, <&dmac1 0x92>,
- <&dmac2 0x93>, <&dmac2 0x92>;
- dma-names = "tx", "rx", "tx", "rx";
- i2c-scl-internal-delay-ns = <6>;
- status = "disabled";
- };
-
- i2c2: i2c at e6510000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a77995",
- "renesas,rcar-gen3-i2c";
- reg = <0 0xe6510000 0 0x40>;
- interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 929>;
+ can0: can at e6c30000 {
+ compatible = "renesas,can-r8a77995",
+ "renesas,rcar-gen3-can";
+ reg = <0 0xe6c30000 0 0x1000>;
+ interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 916>,
+ <&cpg CPG_CORE R8A77995_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
+ assigned-clock-rates = <40000000>;
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
- resets = <&cpg 929>;
- dmas = <&dmac1 0x95>, <&dmac1 0x94>,
- <&dmac2 0x95>, <&dmac2 0x94>;
- dma-names = "tx", "rx", "tx", "rx";
- i2c-scl-internal-delay-ns = <6>;
+ resets = <&cpg 916>;
status = "disabled";
};
- i2c3: i2c at e66d0000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,i2c-r8a77995",
- "renesas,rcar-gen3-i2c";
- reg = <0 0xe66d0000 0 0x40>;
- interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 928>;
+ can1: can at e6c38000 {
+ compatible = "renesas,can-r8a77995",
+ "renesas,rcar-gen3-can";
+ reg = <0 0xe6c38000 0 0x1000>;
+ interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 915>,
+ <&cpg CPG_CORE R8A77995_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "clkp1", "clkp2", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A77995_CLK_CANFD>;
+ assigned-clock-rates = <40000000>;
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
- resets = <&cpg 928>;
- dmas = <&dmac0 0x97>, <&dmac0 0x96>;
- dma-names = "tx", "rx";
- i2c-scl-internal-delay-ns = <6>;
+ resets = <&cpg 915>;
status = "disabled";
};
@@ -643,38 +603,43 @@
status = "disabled";
};
- sdhi2: sd at ee140000 {
- compatible = "renesas,sdhi-r8a77995",
- "renesas,rcar-gen3-sdhi";
- reg = <0 0xee140000 0 0x2000>;
- interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 312>;
- max-frequency = <200000000>;
+ scif2: serial at e6e88000 {
+ compatible = "renesas,scif-r8a77995",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6e88000 0 64>;
+ interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 310>,
+ <&cpg CPG_CORE R8A77995_CLK_S3D1C>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x13>, <&dmac1 0x12>,
+ <&dmac2 0x13>, <&dmac2 0x12>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
- resets = <&cpg 312>;
+ resets = <&cpg 310>;
status = "disabled";
};
- ehci0: usb at ee080100 {
- compatible = "generic-ehci";
- reg = <0 0xee080100 0 0x100>;
+ ohci0: usb at ee080000 {
+ compatible = "generic-ohci";
+ reg = <0 0xee080000 0 0x100>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
phys = <&usb2_phy0>;
phy-names = "usb";
- companion = <&ohci0>;
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
resets = <&cpg 703>;
status = "disabled";
};
- ohci0: usb at ee080000 {
- compatible = "generic-ohci";
- reg = <0 0xee080000 0 0x100>;
+ ehci0: usb at ee080100 {
+ compatible = "generic-ehci";
+ reg = <0 0xee080100 0 0x100>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
phys = <&usb2_phy0>;
phy-names = "usb";
+ companion = <&ohci0>;
power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
resets = <&cpg 703>;
status = "disabled";
@@ -692,6 +657,35 @@
status = "disabled";
};
+ sdhi2: sd at ee140000 {
+ compatible = "renesas,sdhi-r8a77995",
+ "renesas,rcar-gen3-sdhi";
+ reg = <0 0xee140000 0 0x2000>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 312>;
+ max-frequency = <200000000>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
+ status = "disabled";
+ };
+
+ gic: interrupt-controller at f1010000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x0 0xf1010000 0 0x1000>,
+ <0x0 0xf1020000 0 0x20000>,
+ <0x0 0xf1040000 0 0x20000>,
+ <0x0 0xf1060000 0 0x20000>;
+ interrupts = <GIC_PPI 9
+ (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
+ };
+
vspbs: vsp at fe960000 {
compatible = "renesas,vsp2";
reg = <0 0xfe960000 0 0x8000>;
@@ -702,15 +696,6 @@
renesas,fcp = <&fcpvb0>;
};
- fcpvb0: fcp at fe96f000 {
- compatible = "renesas,fcpv";
- reg = <0 0xfe96f000 0 0x200>;
- clocks = <&cpg CPG_MOD 607>;
- power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
- resets = <&cpg 607>;
- iommus = <&ipmmu_vp0 5>;
- };
-
vspd0: vsp at fea20000 {
compatible = "renesas,vsp2";
reg = <0 0xfea20000 0 0x8000>;
@@ -721,15 +706,6 @@
renesas,fcp = <&fcpvd0>;
};
- fcpvd0: fcp at fea27000 {
- compatible = "renesas,fcpv";
- reg = <0 0xfea27000 0 0x200>;
- clocks = <&cpg CPG_MOD 603>;
- power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
- resets = <&cpg 603>;
- iommus = <&ipmmu_vi0 8>;
- };
-
vspd1: vsp at fea28000 {
compatible = "renesas,vsp2";
reg = <0 0xfea28000 0 0x8000>;
@@ -740,6 +716,24 @@
renesas,fcp = <&fcpvd1>;
};
+ fcpvb0: fcp at fe96f000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfe96f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 607>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 607>;
+ iommus = <&ipmmu_vp0 5>;
+ };
+
+ fcpvd0: fcp at fea27000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea27000 0 0x200>;
+ clocks = <&cpg CPG_MOD 603>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 603>;
+ iommus = <&ipmmu_vi0 8>;
+ };
+
fcpvd1: fcp at fea2f000 {
compatible = "renesas,fcpv";
reg = <0 0xfea2f000 0 0x200>;
@@ -783,6 +777,11 @@
};
};
};
+
+ prr: chipid at fff00044 {
+ compatible = "renesas,prr";
+ reg = <0 0xfff00044 0 4>;
+ };
};
timer {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 025/102] arm64: dts: renesas: r8a77965: sort subnodes of the root node
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (23 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 024/102] arm64: dts: renesas: r8a77995: sort subnodes of the soc node Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 026/102] arm64: dts: renesas: r8a77965: sort subnodes of the soc node Simon Horman
` (77 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Sort subnodes of the root node alphanumerically.
This is part of an ongoing effort to provide consistent node
order in the DT of Renesas SoCs to improve maintainability.
This should not have any run-time effect.
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 120 +++++++++++++++---------------
1 file changed, 60 insertions(+), 60 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index a41f91653d93..d110382276b7 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -22,9 +22,34 @@
i2c7 = &i2c_dvfs;
};
- psci {
- compatible = "arm,psci-1.0", "arm,psci-0.2";
- method = "smc";
+ /*
+ * The external audio clocks are configured as 0 Hz fixed frequency
+ * clocks by default.
+ * Boards that provide audio clocks should override them.
+ */
+ audio_clk_a: audio_clk_a {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ audio_clk_b: audio_clk_b {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ audio_clk_c: audio_clk_c {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ /* External CAN clock - to be overridden by boards that provide it */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
};
cpus {
@@ -71,34 +96,24 @@
clock-frequency = <0>;
};
- /*
- * The external audio clocks are configured as 0 Hz fixed frequency
- * clocks by default.
- * Boards that provide audio clocks should override them.
- */
- audio_clk_a: audio_clk_a {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
- audio_clk_b: audio_clk_b {
+ /* External PCIe clock - can be overridden by the board */
+ pcie_bus_clk: pcie_bus {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
- audio_clk_c: audio_clk_c {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
+ pmu_a57 {
+ compatible = "arm,cortex-a57-pmu";
+ interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&a57_0>,
+ <&a57_1>;
};
- /* External CAN clock - to be overridden by boards that provide it */
- can_clk: can {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
+ psci {
+ compatible = "arm,psci-1.0", "arm,psci-0.2";
+ method = "smc";
};
/* External SCIF clock - to be overridden by boards that provide it */
@@ -108,42 +123,6 @@
clock-frequency = <0>;
};
- /* External PCIe clock - can be overridden by the board */
- pcie_bus_clk: pcie_bus {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
- /* External USB clocks - can be overridden by the board */
- usb3s0_clk: usb3s0 {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
- usb_extal_clk: usb_extal {
- compatible = "fixed-clock";
- #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
- };
-
- pmu_a57 {
- compatible = "arm,cortex-a57-pmu";
- interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
- <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-affinity = <&a57_0>,
- <&a57_1>;
- };
-
soc {
compatible = "simple-bus";
interrupt-parent = <&gic>;
@@ -1073,4 +1052,25 @@
/* placeholder */
};
};
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ /* External USB clocks - can be overridden by the board */
+ usb3s0_clk: usb3s0 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ usb_extal_clk: usb_extal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 026/102] arm64: dts: renesas: r8a77965: sort subnodes of the soc node
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (24 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 025/102] arm64: dts: renesas: r8a77965: sort subnodes of the root node Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 027/102] arm64: dts: renesas: r8a77970: " Simon Horman
` (76 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Sort subnodes of the soc node.
- The primary key is the bus address.
- The secondary key is the IP block.
- The tertiary key is the node name.
This is part of an ongoing effort to provide consistent node
order in the DT of Renesas SoCs to improve maintainability.
This should not have any run-time effect.
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 912 +++++++++++++++---------------
1 file changed, 456 insertions(+), 456 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index d110382276b7..b12f41755aea 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -130,52 +130,9 @@
#size-cells = <2>;
ranges;
- gic: interrupt-controller at f1010000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0x0 0xf1010000 0 0x1000>,
- <0x0 0xf1020000 0 0x20000>,
- <0x0 0xf1040000 0 0x20000>,
- <0x0 0xf1060000 0 0x20000>;
- interrupts = <GIC_PPI 9
- (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc 32>;
- resets = <&cpg 408>;
- };
-
- pfc: pin-controller at e6060000 {
- compatible = "renesas,pfc-r8a77965";
- reg = <0 0xe6060000 0 0x50c>;
- };
-
- cpg: clock-controller at e6150000 {
- compatible = "renesas,r8a77965-cpg-mssr";
- reg = <0 0xe6150000 0 0x1000>;
- clocks = <&extal_clk>, <&extalr_clk>;
- clock-names = "extal", "extalr";
- #clock-cells = <2>;
- #power-domain-cells = <0>;
- #reset-cells = <1>;
- };
-
- rst: reset-controller at e6160000 {
- compatible = "renesas,r8a77965-rst";
- reg = <0 0xe6160000 0 0x0200>;
- };
-
- prr: chipid at fff00044 {
- compatible = "renesas,prr";
- reg = <0 0xfff00044 0 4>;
- };
-
- sysc: system-controller at e6180000 {
- compatible = "renesas,r8a77965-sysc";
- reg = <0 0xe6180000 0 0x0400>;
- #power-domain-cells = <1>;
+ wdt0: watchdog at e6020000 {
+ reg = <0 0xe6020000 0 0x0c>;
+ /* placeholder */
};
gpio0: gpio at e6050000 {
@@ -298,6 +255,32 @@
resets = <&cpg 905>;
};
+ pfc: pin-controller at e6060000 {
+ compatible = "renesas,pfc-r8a77965";
+ reg = <0 0xe6060000 0 0x50c>;
+ };
+
+ cpg: clock-controller at e6150000 {
+ compatible = "renesas,r8a77965-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>, <&extalr_clk>;
+ clock-names = "extal", "extalr";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
+
+ rst: reset-controller at e6160000 {
+ compatible = "renesas,r8a77965-rst";
+ reg = <0 0xe6160000 0 0x0200>;
+ };
+
+ sysc: system-controller at e6180000 {
+ compatible = "renesas,r8a77965-sysc";
+ reg = <0 0xe6180000 0 0x0400>;
+ #power-domain-cells = <1>;
+ };
+
intc_ex: interrupt-controller at e61c0000 {
compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
#interrupt-cells = <2>;
@@ -314,6 +297,121 @@
resets = <&cpg 407>;
};
+ i2c0: i2c at e6500000 {
+ reg = <0 0xe6500000 0 0x40>;
+ /* placeholder */
+ };
+
+ i2c1: i2c at e6508000 {
+ reg = <0 0xe6508000 0 0x40>;
+ /* placeholder */
+ };
+
+ i2c2: i2c at e6510000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <0 0xe6510000 0 0x40>;
+ /* placeholder */
+ };
+
+ i2c3: i2c at e66d0000 {
+ reg = <0 0xe66d0000 0 0x40>;
+ /* placeholder */
+ };
+
+ i2c4: i2c at e66d8000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <0 0xe66d8000 0 0x40>;
+ /* placeholder */
+ };
+
+ i2c5: i2c at e66e0000 {
+ reg = <0 0xe66e0000 0 0x40>;
+ /* placeholder */
+ };
+
+ i2c6: i2c at e66e8000 {
+ reg = <0 0xe66e8000 0 0x40>;
+ /* placeholder */
+ };
+
+ i2c_dvfs: i2c at e60b0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,iic-r8a77965",
+ "renesas,rcar-gen3-iic",
+ "renesas,rmobile-iic";
+ reg = <0 0xe60b0000 0 0x425>;
+ interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 926>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 926>;
+ dmas = <&dmac0 0x11>, <&dmac0 0x10>;
+ dma-names = "tx", "rx";
+ status = "disabled";
+ };
+
+ hsusb: usb at e6590000 {
+ compatible = "renesas,usbhs-r8a7796",
+ "renesas,rcar-gen3-usbhs";
+ reg = <0 0xe6590000 0 0x100>;
+ interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 704>;
+ dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
+ <&usb_dmac1 0>, <&usb_dmac1 1>;
+ dma-names = "ch0", "ch1", "ch2", "ch3";
+ renesas,buswait = <11>;
+ phys = <&usb2_phy0>;
+ phy-names = "usb";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 704>;
+ status = "disabled";
+ };
+
+ usb_dmac0: dma-controller at e65a0000 {
+ compatible = "renesas,r8a77965-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65a0000 0 0x100>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 330>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 330>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
+
+ usb_dmac1: dma-controller at e65b0000 {
+ compatible = "renesas,r8a77965-usb-dmac",
+ "renesas,usb-dmac";
+ reg = <0 0xe65b0000 0 0x100>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1";
+ clocks = <&cpg CPG_MOD 331>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 331>;
+ #dma-cells = <1>;
+ dma-channels = <2>;
+ };
+
+ usb3_phy0: usb-phy at e65ee000 {
+ compatible = "renesas,r8a77965-usb3-phy",
+ "renesas,rcar-gen3-usb3-phy";
+ reg = <0 0xe65ee000 0 0x90>;
+ clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
+ <&usb_extal_clk>;
+ clock-names = "usb3-if", "usb3s_clk", "usb_extal";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 328>;
+ #phy-cells = <0>;
+ status = "disabled";
+ };
+
dmac0: dma-controller at e6700000 {
compatible = "renesas,dmac-r8a77965",
"renesas,rcar-dmac";
@@ -416,35 +514,150 @@
dma-channels = <16>;
};
- scif0: serial at e6e60000 {
- compatible = "renesas,scif-r8a77965",
- "renesas,rcar-gen3-scif", "renesas,scif";
- reg = <0 0xe6e60000 0 64>;
- interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 207>,
- <&cpg CPG_CORE 20>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac1 0x51>, <&dmac1 0x50>,
- <&dmac2 0x51>, <&dmac2 0x50>;
- dma-names = "tx", "rx", "tx", "rx";
+ avb: ethernet at e6800000 {
+ compatible = "renesas,etheravb-r8a77965",
+ "renesas,etheravb-rcar-gen3";
+ reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15",
+ "ch16", "ch17", "ch18", "ch19",
+ "ch20", "ch21", "ch22", "ch23",
+ "ch24";
+ clocks = <&cpg CPG_MOD 812>;
power-domains = <&sysc 32>;
- resets = <&cpg 207>;
+ resets = <&cpg 812>;
+ phy-mode = "rgmii";
+ #address-cells = <1>;
+ #size-cells = <0>;
status = "disabled";
};
- scif1: serial at e6e68000 {
- compatible = "renesas,scif-r8a77965",
- "renesas,rcar-gen3-scif", "renesas,scif";
- reg = <0 0xe6e68000 0 64>;
- interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 206>,
- <&cpg CPG_CORE 20>,
- <&scif_clk>;
- clock-names = "fck", "brg_int", "scif_clk";
- dmas = <&dmac1 0x53>, <&dmac1 0x52>,
- <&dmac2 0x53>, <&dmac2 0x52>;
- dma-names = "tx", "rx", "tx", "rx";
+ pwm0: pwm at e6e30000 {
+ compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
+ reg = <0 0xe6e30000 0 8>;
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc 32>;
+ status = "disabled";
+ };
+
+ pwm1: pwm at e6e31000 {
+ compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
+ reg = <0 0xe6e31000 0 8>;
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc 32>;
+ status = "disabled";
+ };
+
+ pwm2: pwm at e6e32000 {
+ compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
+ reg = <0 0xe6e32000 0 8>;
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc 32>;
+ status = "disabled";
+ };
+
+ pwm3: pwm at e6e33000 {
+ compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
+ reg = <0 0xe6e33000 0 8>;
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc 32>;
+ status = "disabled";
+ };
+
+ pwm4: pwm at e6e34000 {
+ compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
+ reg = <0 0xe6e34000 0 8>;
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc 32>;
+ status = "disabled";
+ };
+
+ pwm5: pwm at e6e35000 {
+ compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
+ reg = <0 0xe6e35000 0 8>;
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc 32>;
+ status = "disabled";
+ };
+
+ pwm6: pwm at e6e36000 {
+ compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
+ reg = <0 0xe6e36000 0 8>;
+ #pwm-cells = <2>;
+ clocks = <&cpg CPG_MOD 523>;
+ resets = <&cpg 523>;
+ power-domains = <&sysc 32>;
+ status = "disabled";
+ };
+
+ scif0: serial at e6e60000 {
+ compatible = "renesas,scif-r8a77965",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6e60000 0 64>;
+ interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 207>,
+ <&cpg CPG_CORE 20>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x51>, <&dmac1 0x50>,
+ <&dmac2 0x51>, <&dmac2 0x50>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 207>;
+ status = "disabled";
+ };
+
+ scif1: serial at e6e68000 {
+ compatible = "renesas,scif-r8a77965",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6e68000 0 64>;
+ interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 206>,
+ <&cpg CPG_CORE 20>,
+ <&scif_clk>;
+ clock-names = "fck", "brg_int", "scif_clk";
+ dmas = <&dmac1 0x53>, <&dmac1 0x52>,
+ <&dmac2 0x53>, <&dmac2 0x52>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>;
resets = <&cpg 206>;
status = "disabled";
@@ -513,69 +726,66 @@
status = "disabled";
};
- avb: ethernet at e6800000 {
- compatible = "renesas,etheravb-r8a77965",
- "renesas,etheravb-rcar-gen3";
- reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
- interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14", "ch15",
- "ch16", "ch17", "ch18", "ch19",
- "ch20", "ch21", "ch22", "ch23",
- "ch24";
- clocks = <&cpg CPG_MOD 812>;
+ msiof0: spi at e6e90000 {
+ compatible = "renesas,msiof-r8a77965",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6e90000 0 0x0064>;
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 211>;
+ dmas = <&dmac1 0x41>, <&dmac1 0x40>,
+ <&dmac2 0x41>, <&dmac2 0x40>;
+ dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc 32>;
- resets = <&cpg 812>;
- phy-mode = "rgmii";
+ resets = <&cpg 211>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
- csi20: csi2 at fea80000 {
- reg = <0 0xfea80000 0 0x10000>;
- /* placeholder */
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- };
+ msiof1: spi at e6ea0000 {
+ compatible = "renesas,msiof-r8a77965",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6ea0000 0 0x0064>;
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 210>;
+ dmas = <&dmac1 0x43>, <&dmac1 0x42>,
+ <&dmac2 0x43>, <&dmac2 0x42>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 210>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
};
- csi40: csi2 at feaa0000 {
- reg = <0 0xfeaa0000 0 0x10000>;
- /* placeholder */
+ msiof2: spi at e6c00000 {
+ compatible = "renesas,msiof-r8a77965",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6c00000 0 0x0064>;
+ interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 209>;
+ dmas = <&dmac0 0x45>, <&dmac0 0x44>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 209>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- };
+ msiof3: spi at e6c10000 {
+ compatible = "renesas,msiof-r8a77965",
+ "renesas,rcar-gen3-msiof";
+ reg = <0 0xe6c10000 0 0x0064>;
+ interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 208>;
+ dmas = <&dmac0 0x47>, <&dmac0 0x46>;
+ dma-names = "tx", "rx";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 208>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
};
vin0: video at e6ef0000 {
@@ -618,6 +828,58 @@
/* placeholder */
};
+ rcar_sound: sound at ec500000 {
+ reg = <0 0xec500000 0 0x1000>, /* SCU */
+ <0 0xec5a0000 0 0x100>, /* ADG */
+ <0 0xec540000 0 0x1000>, /* SSIU */
+ <0 0xec541000 0 0x280>, /* SSI */
+ <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
+ /* placeholder */
+
+ rcar_sound,dvc {
+ dvc0: dvc-0 {
+ };
+ dvc1: dvc-1 {
+ };
+ };
+
+ rcar_sound,src {
+ src0: src-0 {
+ };
+ src1: src-1 {
+ };
+ };
+
+ rcar_sound,ssi {
+ ssi0: ssi-0 {
+ };
+ ssi1: ssi-1 {
+ };
+ };
+ };
+
+ xhci0: usb at ee000000 {
+ compatible = "renesas,xhci-r8a77965",
+ "renesas,rcar-gen3-xhci";
+ reg = <0 0xee000000 0 0xc00>;
+ interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 328>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 328>;
+ status = "disabled";
+ };
+
+ usb3_peri0: usb at ee020000 {
+ compatible = "renesas,r8a77965-usb3-peri",
+ "renesas,rcar-gen3-usb3-peri";
+ reg = <0 0xee020000 0 0x400>;
+ interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 328>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 328>;
+ status = "disabled";
+ };
+
ohci0: usb at ee080000 {
compatible = "generic-ohci";
reg = <0 0xee080000 0 0x100>;
@@ -630,6 +892,18 @@
status = "disabled";
};
+ ohci1: usb at ee0a0000 {
+ compatible = "generic-ohci";
+ reg = <0 0xee0a0000 0 0x100>;
+ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 702>;
+ phys = <&usb2_phy1>;
+ phy-names = "usb";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 702>;
+ status = "disabled";
+ };
+
ehci0: usb at ee080100 {
compatible = "generic-ehci";
reg = <0 0xee080100 0 0x100>;
@@ -643,6 +917,19 @@
status = "disabled";
};
+ ehci1: usb at ee0a0100 {
+ compatible = "generic-ehci";
+ reg = <0 0xee0a0100 0 0x100>;
+ interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 702>;
+ phys = <&usb2_phy1>;
+ phy-names = "usb";
+ companion = <&ohci1>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 702>;
+ status = "disabled";
+ };
+
usb2_phy0: usb-phy at ee080200 {
compatible = "renesas,usb2-phy-r8a77965",
"renesas,rcar-gen3-usb2-phy";
@@ -666,218 +953,71 @@
status = "disabled";
};
- ohci1: usb at ee0a0000 {
- compatible = "generic-ohci";
- reg = <0 0xee0a0000 0 0x100>;
- interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 702>;
- phys = <&usb2_phy1>;
- phy-names = "usb";
- power-domains = <&sysc 32>;
- resets = <&cpg 702>;
- status = "disabled";
- };
-
- ehci1: usb at ee0a0100 {
- compatible = "generic-ehci";
- reg = <0 0xee0a0100 0 0x100>;
- interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 702>;
- phys = <&usb2_phy1>;
- phy-names = "usb";
- companion = <&ohci1>;
- power-domains = <&sysc 32>;
- resets = <&cpg 702>;
- status = "disabled";
- };
-
- i2c0: i2c at e6500000 {
- reg = <0 0xe6500000 0 0x40>;
+ sdhi0: sd at ee100000 {
+ reg = <0 0xee100000 0 0x2000>;
/* placeholder */
};
- i2c1: i2c at e6508000 {
- reg = <0 0xe6508000 0 0x40>;
+ sdhi1: sd at ee120000 {
+ reg = <0 0xee120000 0 0x2000>;
/* placeholder */
};
- i2c2: i2c at e6510000 {
- #address-cells = <1>;
- #size-cells = <0>;
-
- reg = <0 0xe6510000 0 0x40>;
+ sdhi2: sd at ee140000 {
+ reg = <0 0xee140000 0 0x2000>;
/* placeholder */
};
- i2c3: i2c at e66d0000 {
- reg = <0 0xe66d0000 0 0x40>;
+ sdhi3: sd at ee160000 {
+ reg = <0 0xee160000 0 0x2000>;
/* placeholder */
};
- i2c4: i2c at e66d8000 {
- #address-cells = <1>;
- #size-cells = <0>;
-
- reg = <0 0xe66d8000 0 0x40>;
- /* placeholder */
+ gic: interrupt-controller at f1010000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x0 0xf1010000 0 0x1000>,
+ <0x0 0xf1020000 0 0x20000>,
+ <0x0 0xf1040000 0 0x20000>,
+ <0x0 0xf1060000 0 0x20000>;
+ interrupts = <GIC_PPI 9
+ (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 408>;
};
- i2c5: i2c at e66e0000 {
- reg = <0 0xe66e0000 0 0x40>;
+ pciec0: pcie at fe000000 {
+ reg = <0 0xfe000000 0 0x80000>;
/* placeholder */
};
- i2c6: i2c at e66e8000 {
- reg = <0 0xe66e8000 0 0x40>;
+ pciec1: pcie at ee800000 {
+ reg = <0 0xee800000 0 0x80000>;
/* placeholder */
};
- i2c_dvfs: i2c at e60b0000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "renesas,iic-r8a77965",
- "renesas,rcar-gen3-iic",
- "renesas,rmobile-iic";
- reg = <0 0xe60b0000 0 0x425>;
- interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 926>;
- power-domains = <&sysc 32>;
- resets = <&cpg 926>;
- dmas = <&dmac0 0x11>, <&dmac0 0x10>;
- dma-names = "tx", "rx";
- status = "disabled";
- };
-
- pwm0: pwm at e6e30000 {
- compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
- reg = <0 0xe6e30000 0 8>;
- #pwm-cells = <2>;
- clocks = <&cpg CPG_MOD 523>;
- resets = <&cpg 523>;
- power-domains = <&sysc 32>;
- status = "disabled";
- };
-
- pwm1: pwm at e6e31000 {
- compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
- reg = <0 0xe6e31000 0 8>;
- #pwm-cells = <2>;
- clocks = <&cpg CPG_MOD 523>;
- resets = <&cpg 523>;
- power-domains = <&sysc 32>;
- status = "disabled";
- };
-
- pwm2: pwm at e6e32000 {
- compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
- reg = <0 0xe6e32000 0 8>;
- #pwm-cells = <2>;
- clocks = <&cpg CPG_MOD 523>;
- resets = <&cpg 523>;
- power-domains = <&sysc 32>;
- status = "disabled";
- };
-
- pwm3: pwm at e6e33000 {
- compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
- reg = <0 0xe6e33000 0 8>;
- #pwm-cells = <2>;
- clocks = <&cpg CPG_MOD 523>;
- resets = <&cpg 523>;
- power-domains = <&sysc 32>;
- status = "disabled";
- };
-
- pwm4: pwm at e6e34000 {
- compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
- reg = <0 0xe6e34000 0 8>;
- #pwm-cells = <2>;
- clocks = <&cpg CPG_MOD 523>;
- resets = <&cpg 523>;
- power-domains = <&sysc 32>;
- status = "disabled";
- };
-
- pwm5: pwm at e6e35000 {
- compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
- reg = <0 0xe6e35000 0 8>;
- #pwm-cells = <2>;
- clocks = <&cpg CPG_MOD 523>;
- resets = <&cpg 523>;
- power-domains = <&sysc 32>;
- status = "disabled";
- };
-
- pwm6: pwm at e6e36000 {
- compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar";
- reg = <0 0xe6e36000 0 8>;
- #pwm-cells = <2>;
- clocks = <&cpg CPG_MOD 523>;
- resets = <&cpg 523>;
- power-domains = <&sysc 32>;
- status = "disabled";
- };
-
- msiof0: spi at e6e90000 {
- compatible = "renesas,msiof-r8a77965",
- "renesas,rcar-gen3-msiof";
- reg = <0 0xe6e90000 0 0x0064>;
- interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 211>;
- dmas = <&dmac1 0x41>, <&dmac1 0x40>,
- <&dmac2 0x41>, <&dmac2 0x40>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc 32>;
- resets = <&cpg 211>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ csi20: csi2 at fea80000 {
+ reg = <0 0xfea80000 0 0x10000>;
+ /* placeholder */
- msiof1: spi at e6ea0000 {
- compatible = "renesas,msiof-r8a77965",
- "renesas,rcar-gen3-msiof";
- reg = <0 0xe6ea0000 0 0x0064>;
- interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 210>;
- dmas = <&dmac1 0x43>, <&dmac1 0x42>,
- <&dmac2 0x43>, <&dmac2 0x42>;
- dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc 32>;
- resets = <&cpg 210>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
- msiof2: spi at e6c00000 {
- compatible = "renesas,msiof-r8a77965",
- "renesas,rcar-gen3-msiof";
- reg = <0 0xe6c00000 0 0x0064>;
- interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 209>;
- dmas = <&dmac0 0x45>, <&dmac0 0x44>;
- dma-names = "tx", "rx";
- power-domains = <&sysc 32>;
- resets = <&cpg 209>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
+ csi40: csi2 at feaa0000 {
+ reg = <0 0xfeaa0000 0 0x10000>;
+ /* placeholder */
- msiof3: spi at e6c10000 {
- compatible = "renesas,msiof-r8a77965",
- "renesas,rcar-gen3-msiof";
- reg = <0 0xe6c10000 0 0x0064>;
- interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 208>;
- dmas = <&dmac0 0x47>, <&dmac0 0x46>;
- dma-names = "tx", "rx";
- power-domains = <&sysc 32>;
- resets = <&cpg 208>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
};
du: display at feb00000 {
@@ -907,149 +1047,9 @@
};
};
- usb_dmac0: dma-controller at e65a0000 {
- compatible = "renesas,r8a77965-usb-dmac",
- "renesas,usb-dmac";
- reg = <0 0xe65a0000 0 0x100>;
- interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1";
- clocks = <&cpg CPG_MOD 330>;
- power-domains = <&sysc 32>;
- resets = <&cpg 330>;
- #dma-cells = <1>;
- dma-channels = <2>;
- };
-
- usb_dmac1: dma-controller at e65b0000 {
- compatible = "renesas,r8a77965-usb-dmac",
- "renesas,usb-dmac";
- reg = <0 0xe65b0000 0 0x100>;
- interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1";
- clocks = <&cpg CPG_MOD 331>;
- power-domains = <&sysc 32>;
- resets = <&cpg 331>;
- #dma-cells = <1>;
- dma-channels = <2>;
- };
-
- hsusb: usb at e6590000 {
- compatible = "renesas,usbhs-r8a7796",
- "renesas,rcar-gen3-usbhs";
- reg = <0 0xe6590000 0 0x100>;
- interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 704>;
- dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
- <&usb_dmac1 0>, <&usb_dmac1 1>;
- dma-names = "ch0", "ch1", "ch2", "ch3";
- renesas,buswait = <11>;
- phys = <&usb2_phy0>;
- phy-names = "usb";
- power-domains = <&sysc 32>;
- resets = <&cpg 704>;
- status = "disabled";
- };
-
- pciec0: pcie at fe000000 {
- reg = <0 0xfe000000 0 0x80000>;
- /* placeholder */
- };
-
- pciec1: pcie at ee800000 {
- reg = <0 0xee800000 0 0x80000>;
- /* placeholder */
- };
-
- rcar_sound: sound at ec500000 {
- reg = <0 0xec500000 0 0x1000>, /* SCU */
- <0 0xec5a0000 0 0x100>, /* ADG */
- <0 0xec540000 0 0x1000>, /* SSIU */
- <0 0xec541000 0 0x280>, /* SSI */
- <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
- /* placeholder */
-
- rcar_sound,dvc {
- dvc0: dvc-0 {
- };
- dvc1: dvc-1 {
- };
- };
-
- rcar_sound,src {
- src0: src-0 {
- };
- src1: src-1 {
- };
- };
-
- rcar_sound,ssi {
- ssi0: ssi-0 {
- };
- ssi1: ssi-1 {
- };
- };
- };
-
- sdhi0: sd at ee100000 {
- reg = <0 0xee100000 0 0x2000>;
- /* placeholder */
- };
-
- sdhi1: sd at ee120000 {
- reg = <0 0xee120000 0 0x2000>;
- /* placeholder */
- };
-
- sdhi2: sd at ee140000 {
- reg = <0 0xee140000 0 0x2000>;
- /* placeholder */
- };
-
- sdhi3: sd at ee160000 {
- reg = <0 0xee160000 0 0x2000>;
- /* placeholder */
- };
-
- usb3_phy0: usb-phy at e65ee000 {
- compatible = "renesas,r8a77965-usb3-phy",
- "renesas,rcar-gen3-usb3-phy";
- reg = <0 0xe65ee000 0 0x90>;
- clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
- <&usb_extal_clk>;
- clock-names = "usb3-if", "usb3s_clk", "usb_extal";
- power-domains = <&sysc 32>;
- resets = <&cpg 328>;
- #phy-cells = <0>;
- status = "disabled";
- };
-
- usb3_peri0: usb at ee020000 {
- compatible = "renesas,r8a77965-usb3-peri",
- "renesas,rcar-gen3-usb3-peri";
- reg = <0 0xee020000 0 0x400>;
- interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 328>;
- power-domains = <&sysc 32>;
- resets = <&cpg 328>;
- status = "disabled";
- };
-
- xhci0: usb at ee000000 {
- compatible = "renesas,xhci-r8a77965",
- "renesas,rcar-gen3-xhci";
- reg = <0 0xee000000 0 0xc00>;
- interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cpg CPG_MOD 328>;
- power-domains = <&sysc 32>;
- resets = <&cpg 328>;
- status = "disabled";
- };
-
- wdt0: watchdog at e6020000 {
- reg = <0 0xe6020000 0 0x0c>;
- /* placeholder */
+ prr: chipid at fff00044 {
+ compatible = "renesas,prr";
+ reg = <0 0xfff00044 0 4>;
};
};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 027/102] arm64: dts: renesas: r8a77970: sort subnodes of the soc node
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (25 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 026/102] arm64: dts: renesas: r8a77965: sort subnodes of the soc node Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 028/102] arm64: dts: renesas: Add Renesas R8A77990 SoC support Simon Horman
` (75 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Sort subnodes of the soc node.
- The primary key is the bus address.
- The secondary key is the IP block.
- The tertiary key is the node name.
This is part of an ongoing effort to provide consistent node
order in the DT of Renesas SoCs to improve maintainability.
This should not have any run-time effect.
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
[simon: rebased; move fcpvd0 to after vspd0]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 388 +++++++++++++++---------------
1 file changed, 194 insertions(+), 194 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index a194cb8d7d62..c06d7fbfb7be 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -83,23 +83,6 @@
#size-cells = <2>;
ranges;
- gic: interrupt-controller at f1010000 {
- compatible = "arm,gic-400";
- #interrupt-cells = <3>;
- #address-cells = <0>;
- interrupt-controller;
- reg = <0 0xf1010000 0 0x1000>,
- <0 0xf1020000 0 0x20000>,
- <0 0xf1040000 0 0x20000>,
- <0 0xf1060000 0 0x20000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) |
- IRQ_TYPE_LEVEL_HIGH)>;
- clocks = <&cpg CPG_MOD 408>;
- clock-names = "clk";
- power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
- resets = <&cpg 408>;
- };
-
rwdt: watchdog at e6020000 {
compatible = "renesas,r8a77970-wdt",
"renesas,rcar-gen3-wdt";
@@ -110,75 +93,6 @@
status = "disabled";
};
- cpg: clock-controller at e6150000 {
- compatible = "renesas,r8a77970-cpg-mssr";
- reg = <0 0xe6150000 0 0x1000>;
- clocks = <&extal_clk>, <&extalr_clk>;
- clock-names = "extal", "extalr";
- #clock-cells = <2>;
- #power-domain-cells = <0>;
- #reset-cells = <1>;
- };
-
- rst: reset-controller at e6160000 {
- compatible = "renesas,r8a77970-rst";
- reg = <0 0xe6160000 0 0x200>;
- };
-
- sysc: system-controller at e6180000 {
- compatible = "renesas,r8a77970-sysc";
- reg = <0 0xe6180000 0 0x440>;
- #power-domain-cells = <1>;
- };
-
- ipmmu_vi0: mmu at febd0000 {
- compatible = "renesas,ipmmu-r8a77970";
- reg = <0 0xfebd0000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 9>;
- power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_ir: mmu at ff8b0000 {
- compatible = "renesas,ipmmu-r8a77970";
- reg = <0 0xff8b0000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 3>;
- power-domains = <&sysc R8A77970_PD_A3IR>;
- #iommu-cells = <1>;
- status = "disabled";
- };
-
- ipmmu_rt: mmu at ffc80000 {
- compatible = "renesas,ipmmu-r8a77970";
- reg = <0 0xffc80000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 7>;
- power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
- };
-
- ipmmu_ds1: mmu at e7740000 {
- compatible = "renesas,ipmmu-r8a77970";
- reg = <0 0xe7740000 0 0x1000>;
- renesas,ipmmu-main = <&ipmmu_mm 0>;
- power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
- };
-
- ipmmu_mm: mmu at e67b0000 {
- compatible = "renesas,ipmmu-r8a77970";
- reg = <0 0xe67b0000 0 0x1000>;
- interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
- power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
- #iommu-cells = <1>;
- };
-
- pfc: pin-controller at e6060000 {
- compatible = "renesas,pfc-r8a77970";
- reg = <0 0xe6060000 0 0x504>;
- };
-
gpio0: gpio at e6050000 {
compatible = "renesas,gpio-r8a77970",
"renesas,rcar-gen3-gpio";
@@ -269,6 +183,32 @@
resets = <&cpg 907>;
};
+ pfc: pin-controller at e6060000 {
+ compatible = "renesas,pfc-r8a77970";
+ reg = <0 0xe6060000 0 0x504>;
+ };
+
+ cpg: clock-controller at e6150000 {
+ compatible = "renesas,r8a77970-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>, <&extalr_clk>;
+ clock-names = "extal", "extalr";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
+
+ rst: reset-controller at e6160000 {
+ compatible = "renesas,r8a77970-rst";
+ reg = <0 0xe6160000 0 0x200>;
+ };
+
+ sysc: system-controller at e6180000 {
+ compatible = "renesas,r8a77970-sysc";
+ reg = <0 0xe6180000 0 0x440>;
+ #power-domain-cells = <1>;
+ };
+
intc_ex: interrupt-controller at e61c0000 {
compatible = "renesas,intc-ex-r8a77970", "renesas,irqc";
#interrupt-cells = <2>;
@@ -285,67 +225,6 @@
resets = <&cpg 407>;
};
- prr: chipid at fff00044 {
- compatible = "renesas,prr";
- reg = <0 0xfff00044 0 4>;
- };
-
- dmac1: dma-controller at e7300000 {
- compatible = "renesas,dmac-r8a77970",
- "renesas,rcar-dmac";
- reg = <0 0xe7300000 0 0x10000>;
- interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7";
- clocks = <&cpg CPG_MOD 218>;
- clock-names = "fck";
- power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
- resets = <&cpg 218>;
- #dma-cells = <1>;
- dma-channels = <8>;
- iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
- <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
- <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
- <&ipmmu_ds1 6>, <&ipmmu_ds1 7>;
- };
-
- dmac2: dma-controller at e7310000 {
- compatible = "renesas,dmac-r8a77970",
- "renesas,rcar-dmac";
- reg = <0 0xe7310000 0 0x10000>;
- interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "error",
- "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7";
- clocks = <&cpg CPG_MOD 217>;
- clock-names = "fck";
- power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
- resets = <&cpg 217>;
- #dma-cells = <1>;
- dma-channels = <8>;
- iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
- <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
- <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
- <&ipmmu_ds1 22>, <&ipmmu_ds1 23>;
- };
-
i2c0: i2c at e6500000 {
compatible = "renesas,i2c-r8a77970",
"renesas,rcar-gen3-i2c";
@@ -502,6 +381,51 @@
status = "disabled";
};
+ avb: ethernet at e6800000 {
+ compatible = "renesas,etheravb-r8a77970",
+ "renesas,etheravb-rcar-gen3";
+ reg = <0 0xe6800000 0 0x800>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15",
+ "ch16", "ch17", "ch18", "ch19",
+ "ch20", "ch21", "ch22", "ch23",
+ "ch24";
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+ resets = <&cpg 812>;
+ phy-mode = "rgmii";
+ iommus = <&ipmmu_rt 3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
scif0: serial at e6e60000 {
compatible = "renesas,scif-r8a77970",
"renesas,rcar-gen3-scif",
@@ -573,57 +497,120 @@
status = "disabled";
};
- avb: ethernet at e6800000 {
- compatible = "renesas,etheravb-r8a77970",
- "renesas,etheravb-rcar-gen3";
- reg = <0 0xe6800000 0 0x800>;
- interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "ch0", "ch1", "ch2", "ch3",
- "ch4", "ch5", "ch6", "ch7",
- "ch8", "ch9", "ch10", "ch11",
- "ch12", "ch13", "ch14", "ch15",
- "ch16", "ch17", "ch18", "ch19",
- "ch20", "ch21", "ch22", "ch23",
- "ch24";
- clocks = <&cpg CPG_MOD 812>;
+ dmac1: dma-controller at e7300000 {
+ compatible = "renesas,dmac-r8a77970",
+ "renesas,rcar-dmac";
+ reg = <0 0xe7300000 0 0x10000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7";
+ clocks = <&cpg CPG_MOD 218>;
+ clock-names = "fck";
power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
- resets = <&cpg 812>;
- phy-mode = "rgmii";
- iommus = <&ipmmu_rt 3>;
- #address-cells = <1>;
- #size-cells = <0>;
+ resets = <&cpg 218>;
+ #dma-cells = <1>;
+ dma-channels = <8>;
+ iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
+ <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
+ <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
+ <&ipmmu_ds1 6>, <&ipmmu_ds1 7>;
};
- fcpvd0: fcp at fea27000 {
- compatible = "renesas,fcpv";
- reg = <0 0xfea27000 0 0x200>;
- clocks = <&cpg CPG_MOD 603>;
+ dmac2: dma-controller at e7310000 {
+ compatible = "renesas,dmac-r8a77970",
+ "renesas,rcar-dmac";
+ reg = <0 0xe7310000 0 0x10000>;
+ interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
+ GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "error",
+ "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7";
+ clocks = <&cpg CPG_MOD 217>;
+ clock-names = "fck";
power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
- resets = <&cpg 603>;
+ resets = <&cpg 217>;
+ #dma-cells = <1>;
+ dma-channels = <8>;
+ iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
+ <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
+ <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
+ <&ipmmu_ds1 22>, <&ipmmu_ds1 23>;
+ };
+
+ ipmmu_ds1: mmu at e7740000 {
+ compatible = "renesas,ipmmu-r8a77970";
+ reg = <0 0xe7740000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 0>;
+ power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_ir: mmu at ff8b0000 {
+ compatible = "renesas,ipmmu-r8a77970";
+ reg = <0 0xff8b0000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 3>;
+ power-domains = <&sysc R8A77970_PD_A3IR>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ ipmmu_mm: mmu at e67b0000 {
+ compatible = "renesas,ipmmu-r8a77970";
+ reg = <0 0xe67b0000 0 0x1000>;
+ interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_rt: mmu at ffc80000 {
+ compatible = "renesas,ipmmu-r8a77970";
+ reg = <0 0xffc80000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 7>;
+ power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ };
+
+ ipmmu_vi0: mmu at febd0000 {
+ compatible = "renesas,ipmmu-r8a77970";
+ reg = <0 0xfebd0000 0 0x1000>;
+ renesas,ipmmu-main = <&ipmmu_mm 9>;
+ power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ gic: interrupt-controller at f1010000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0 0xf1010000 0 0x1000>,
+ <0 0xf1020000 0 0x20000>,
+ <0 0xf1040000 0 0x20000>,
+ <0 0xf1060000 0 0x20000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+ resets = <&cpg 408>;
};
vspd0: vsp at fea20000 {
@@ -636,6 +623,14 @@
renesas,fcp = <&fcpvd0>;
};
+ fcpvd0: fcp at fea27000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea27000 0 0x200>;
+ clocks = <&cpg CPG_MOD 603>;
+ power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+ resets = <&cpg 603>;
+ };
+
du: display at feb00000 {
compatible = "renesas,du-r8a77970";
reg = <0 0xfeb00000 0 0x80000>;
@@ -692,6 +687,11 @@
};
};
};
+
+ prr: chipid at fff00044 {
+ compatible = "renesas,prr";
+ reg = <0 0xfff00044 0 4>;
+ };
};
timer {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 028/102] arm64: dts: renesas: Add Renesas R8A77990 SoC support
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (26 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 027/102] arm64: dts: renesas: r8a77970: " Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 029/102] arm64: dts: renesas: Add Renesas Ebisu board support Simon Horman
` (74 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds basic support for the Renesas R-Car E3 (R8A77990) SoC:
- PSCI
- CPU (single)
- Cache controller
- Main clocks and controller
- Interrupt controller
- Timer
- PMU
- Reset controller
- Product register
- System controller
- UART for console
Inspried by a patch by Takeshi Kihara in the BSP.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 127 ++++++++++++++++++++++++++++++
1 file changed, 127 insertions(+)
create mode 100644 arch/arm64/boot/dts/renesas/r8a77990.dtsi
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
new file mode 100644
index 000000000000..3a19b9ebdd6e
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -0,0 +1,127 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Device Tree Source for the r8a77990 SoC
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+
+#include <dt-bindings/clock/renesas-cpg-mssr.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "renesas,r8a77990";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* 1 core only at this point */
+ a53_0: cpu at 0 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <0x0>;
+ device_type = "cpu";
+ power-domains = <&sysc 5>;
+ next-level-cache = <&L2_CA53>;
+ enable-method = "psci";
+ };
+
+ L2_CA53: cache-controller at 0 {
+ compatible = "cache";
+ reg = <0>;
+ power-domains = <&sysc 21>;
+ cache-unified;
+ cache-level = <2>;
+ };
+ };
+
+ extal_clk: extal {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ /* This value must be overridden by the board */
+ clock-frequency = <0>;
+ };
+
+ pmu_a53 {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&a53_0>;
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ soc: soc {
+ compatible = "simple-bus";
+ interrupt-parent = <&gic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ cpg: clock-controller at e6150000 {
+ compatible = "renesas,r8a77990-cpg-mssr";
+ reg = <0 0xe6150000 0 0x1000>;
+ clocks = <&extal_clk>;
+ clock-names = "extal";
+ #clock-cells = <2>;
+ #power-domain-cells = <0>;
+ #reset-cells = <1>;
+ };
+
+ rst: reset-controller at e6160000 {
+ compatible = "renesas,r8a77990-rst";
+ reg = <0 0xe6160000 0 0x0200>;
+ };
+
+ sysc: system-controller at e6180000 {
+ compatible = "renesas,r8a77990-sysc";
+ reg = <0 0xe6180000 0 0x0400>;
+ #power-domain-cells = <1>;
+ };
+
+ scif2: serial at e6e88000 {
+ compatible = "renesas,scif-r8a77990",
+ "renesas,rcar-gen3-scif", "renesas,scif";
+ reg = <0 0xe6e88000 0 64>;
+ interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 310>;
+ clock-names = "fck";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 310>;
+ status = "disabled";
+ };
+
+ gic: interrupt-controller at f1010000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x0 0xf1010000 0 0x1000>,
+ <0x0 0xf1020000 0 0x20000>,
+ <0x0 0xf1040000 0 0x20000>,
+ <0x0 0xf1060000 0 0x20000>;
+ interrupts = <GIC_PPI 9
+ (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc 32>;
+ resets = <&cpg 408>;
+ };
+
+ prr: chipid at fff00044 {
+ compatible = "renesas,prr";
+ reg = <0 0xfff00044 0 4>;
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 029/102] arm64: dts: renesas: Add Renesas Ebisu board support
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (27 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 028/102] arm64: dts: renesas: Add Renesas R8A77990 SoC support Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 030/102] arm64: dts: renesas: r8a7795: Enable IPMMU devices Simon Horman
` (73 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Basic support for the Renesas Ebisu board based on R-Car E3:
- Memory,
- Main crystal,
- Serial console,
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[shimoda: rebase and add SPDX-License-Identifier]
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/Makefile | 1 +
arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts | 37 ++++++++++++++++++++++++++
2 files changed, 38 insertions(+)
create mode 100644 arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index 5ede06000ea4..a235961c6532 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -10,4 +10,5 @@ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb
dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-salvator-x.dtb r8a77965-salvator-xs.dtb
dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb r8a77970-v3msk.dtb
dtb-$(CONFIG_ARCH_R8A77980) += r8a77980-condor.dtb
+dtb-$(CONFIG_ARCH_R8A77990) += r8a77990-ebisu.dtb
dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb
diff --git a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
new file mode 100644
index 000000000000..63ee1347bb19
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Device Tree Source for the ebisu board
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ */
+
+/dts-v1/;
+#include "r8a77990.dtsi"
+
+/ {
+ model = "Renesas Ebisu board based on r8a77990";
+ compatible = "renesas,ebisu", "renesas,r8a77990";
+
+ aliases {
+ serial0 = &scif2;
+ };
+
+ chosen {
+ bootargs = "ignore_loglevel";
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory at 48000000 {
+ device_type = "memory";
+ /* first 128MB is reserved for secure area. */
+ reg = <0x0 0x48000000 0x0 0x38000000>;
+ };
+};
+
+&extal_clk {
+ clock-frequency = <48000000>;
+};
+
+&scif2 {
+ status = "okay";
+};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 030/102] arm64: dts: renesas: r8a7795: Enable IPMMU devices
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (28 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 029/102] arm64: dts: renesas: Add Renesas Ebisu board support Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 031/102] arm64: dts: renesas: r8a7796: " Simon Horman
` (72 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove 'status = "disabled"' to make sure all IPMMU devices are enabled
in DT on the r8a7795 SoC.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 12 ------------
1 file changed, 12 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index acf0c6f72a4d..32870cbaf94d 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -947,7 +947,6 @@
renesas,ipmmu-main = <&ipmmu_mm 2>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_ir: mmu at ff8b0000 {
@@ -956,7 +955,6 @@
renesas,ipmmu-main = <&ipmmu_mm 3>;
power-domains = <&sysc R8A7795_PD_A3IR>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_mm: mmu at e67b0000 {
@@ -974,7 +972,6 @@
renesas,ipmmu-main = <&ipmmu_mm 4>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_pv0: mmu at fd800000 {
@@ -983,7 +980,6 @@
renesas,ipmmu-main = <&ipmmu_mm 6>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_pv1: mmu at fd950000 {
@@ -992,7 +988,6 @@
renesas,ipmmu-main = <&ipmmu_mm 7>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_pv2: mmu at fd960000 {
@@ -1001,7 +996,6 @@
renesas,ipmmu-main = <&ipmmu_mm 8>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_pv3: mmu at fd970000 {
@@ -1010,7 +1004,6 @@
renesas,ipmmu-main = <&ipmmu_mm 9>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_rt: mmu at ffc80000 {
@@ -1019,7 +1012,6 @@
renesas,ipmmu-main = <&ipmmu_mm 10>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_vc0: mmu at fe6b0000 {
@@ -1028,7 +1020,6 @@
renesas,ipmmu-main = <&ipmmu_mm 12>;
power-domains = <&sysc R8A7795_PD_A3VC>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_vc1: mmu at fe6f0000 {
@@ -1037,7 +1028,6 @@
renesas,ipmmu-main = <&ipmmu_mm 13>;
power-domains = <&sysc R8A7795_PD_A3VC>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_vi0: mmu at febd0000 {
@@ -1054,7 +1044,6 @@
renesas,ipmmu-main = <&ipmmu_mm 15>;
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_vp0: mmu at fe990000 {
@@ -1063,7 +1052,6 @@
renesas,ipmmu-main = <&ipmmu_mm 16>;
power-domains = <&sysc R8A7795_PD_A3VP>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_vp1: mmu at fe980000 {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 031/102] arm64: dts: renesas: r8a7796: Enable IPMMU devices
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (29 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 030/102] arm64: dts: renesas: r8a7795: Enable IPMMU devices Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 032/102] arm64: dts: renesas: r8a77970: " Simon Horman
` (71 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove 'status = "disabled"' to make sure all IPMMU devices are enabled
in DT on the r8a7796 SoC.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 5 -----
1 file changed, 5 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index e6254711556c..f33063dd7cd7 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -881,7 +881,6 @@
renesas,ipmmu-main = <&ipmmu_mm 2>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_ir: mmu at ff8b0000 {
@@ -890,7 +889,6 @@
renesas,ipmmu-main = <&ipmmu_mm 3>;
power-domains = <&sysc R8A7796_PD_A3IR>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_mm: mmu at e67b0000 {
@@ -924,7 +922,6 @@
renesas,ipmmu-main = <&ipmmu_mm 6>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_rt: mmu at ffc80000 {
@@ -933,7 +930,6 @@
renesas,ipmmu-main = <&ipmmu_mm 7>;
power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_vc0: mmu at fe6b0000 {
@@ -942,7 +938,6 @@
renesas,ipmmu-main = <&ipmmu_mm 8>;
power-domains = <&sysc R8A7796_PD_A3VC>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_vi0: mmu at febd0000 {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 032/102] arm64: dts: renesas: r8a77970: Enable IPMMU devices
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (30 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 031/102] arm64: dts: renesas: r8a7796: " Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 033/102] arm64: dts: renesas: r8a77995: " Simon Horman
` (70 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove 'status = "disabled"' to make sure all IPMMU devices are enabled
in DT on the r8a77970 SoC.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
[simon: rebased]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index c06d7fbfb7be..6ed2e95eb53d 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -567,7 +567,6 @@
renesas,ipmmu-main = <&ipmmu_mm 3>;
power-domains = <&sysc R8A77970_PD_A3IR>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_mm: mmu at e67b0000 {
@@ -593,7 +592,6 @@
renesas,ipmmu-main = <&ipmmu_mm 9>;
power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
#iommu-cells = <1>;
- status = "disabled";
};
gic: interrupt-controller at f1010000 {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 033/102] arm64: dts: renesas: r8a77995: Enable IPMMU devices
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (31 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 032/102] arm64: dts: renesas: r8a77970: " Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 034/102] arm64: dts: renesas: draak: Rename EtherAVB "mdc" pin group to "mdio" Simon Horman
` (69 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Magnus Damm <damm+renesas@opensource.se>
Remove 'status = "disabled"' to make sure all IPMMU devices are enabled
in DT on the r8a77995 SoC.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
[simon: rebased]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 10 ----------
1 file changed, 10 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index a97830589b0d..ba98865b0c9b 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -409,7 +409,6 @@
reg = <0 0xe6740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 0>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_ds1: mmu at e7740000 {
@@ -417,7 +416,6 @@
reg = <0 0xe7740000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 1>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_hc: mmu at e6570000 {
@@ -425,7 +423,6 @@
reg = <0 0xe6570000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 2>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_mm: mmu at e67b0000 {
@@ -434,7 +431,6 @@
interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_mp: mmu at ec670000 {
@@ -442,7 +438,6 @@
reg = <0 0xec670000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 4>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_pv0: mmu at fd800000 {
@@ -450,7 +445,6 @@
reg = <0 0xfd800000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 6>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_rt: mmu at ffc80000 {
@@ -458,7 +452,6 @@
reg = <0 0xffc80000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 10>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_vc0: mmu at fe6b0000 {
@@ -466,7 +459,6 @@
reg = <0 0xfe6b0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 12>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_vi0: mmu at febd0000 {
@@ -474,7 +466,6 @@
reg = <0 0xfebd0000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 14>;
#iommu-cells = <1>;
- status = "disabled";
};
ipmmu_vp0: mmu at fe990000 {
@@ -482,7 +473,6 @@
reg = <0 0xfe990000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 16>;
#iommu-cells = <1>;
- status = "disabled";
};
avb: ethernet at e6800000 {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 034/102] arm64: dts: renesas: draak: Rename EtherAVB "mdc" pin group to "mdio"
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (32 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 033/102] arm64: dts: renesas: r8a77995: " Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 035/102] arm64: dts: renesas: salvator-common: " Simon Horman
` (68 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
On other Renesas SoCs, the pin group for the MDIO bus is named "mdio"
instead of "mdc". Fix the inconsistency, now the pinctrl drivers for
R-Car H3, M3-W, and M3-N have gained support for the traditional pin
group name.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
index d03f19414028..9d73de8bc94d 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts
@@ -91,7 +91,7 @@
&pfc {
avb0_pins: avb {
mux {
- groups = "avb0_link", "avb0_mdc", "avb0_mii";
+ groups = "avb0_link", "avb0_mdio", "avb0_mii";
function = "avb0";
};
};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 035/102] arm64: dts: renesas: salvator-common: Rename EtherAVB "mdc" pin group to "mdio"
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (33 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 034/102] arm64: dts: renesas: draak: Rename EtherAVB "mdc" pin group to "mdio" Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 036/102] arm64: dts: renesas: ulcb: " Simon Horman
` (67 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
On other Renesas SoCs, the pin group for the MDIO bus is named "mdio"
instead of "mdc". Fix the inconsistency, now the pinctrl drivers for
R-Car H3, M3-W, and M3-N have gained support for the traditional pin
group name.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/salvator-common.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
index 2a7f36abd2dd..1642bc9c8906 100644
--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
@@ -416,12 +416,12 @@
avb_pins: avb {
mux {
- groups = "avb_link", "avb_mdc", "avb_mii";
+ groups = "avb_link", "avb_mdio", "avb_mii";
function = "avb";
};
- pins_mdc {
- groups = "avb_mdc";
+ pins_mdio {
+ groups = "avb_mdio";
drive-strength = <24>;
};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 036/102] arm64: dts: renesas: ulcb: Rename EtherAVB "mdc" pin group to "mdio"
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (34 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 035/102] arm64: dts: renesas: salvator-common: " Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:14 ` [PATCH 037/102] arm64: dts: renesas: eagle: add EtherAVB pins Simon Horman
` (66 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
On other Renesas SoCs, the pin group for the MDIO bus is named "mdio"
instead of "mdc". Fix the inconsistency, now the pinctrl drivers for
R-Car H3, M3-W, and M3-N have gained support for the traditional pin
group name.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/ulcb.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
index 6f814845f8b6..93402783d52f 100644
--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
@@ -255,12 +255,12 @@
avb_pins: avb {
mux {
- groups = "avb_link", "avb_mdc", "avb_mii";
+ groups = "avb_link", "avb_mdio", "avb_mii";
function = "avb";
};
- pins_mdc {
- groups = "avb_mdc";
+ pins_mdio {
+ groups = "avb_mdio";
drive-strength = <24>;
};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 037/102] arm64: dts: renesas: eagle: add EtherAVB pins
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (35 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 036/102] arm64: dts: renesas: ulcb: " Simon Horman
@ 2018-05-18 11:14 ` Simon Horman
2018-05-18 11:15 ` [PATCH 038/102] arm64: dts: renesas: v3msk: " Simon Horman
` (65 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:14 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Add the (previously omitted) EtherAVB pin data to the Eagle board's
device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970-eagle.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
index ebfbb51ab168..b800a119753b 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
@@ -79,6 +79,9 @@
};
&avb {
+ pinctrl-0 = <&avb_pins>;
+ pinctrl-names = "default";
+
renesas,no-ether-link;
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
@@ -148,6 +151,11 @@
};
&pfc {
+ avb_pins: avb0 {
+ groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
+ function = "avb0";
+ };
+
i2c0_pins: i2c0 {
groups = "i2c0";
function = "i2c0";
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 038/102] arm64: dts: renesas: v3msk: add EtherAVB pins
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (36 preceding siblings ...)
2018-05-18 11:14 ` [PATCH 037/102] arm64: dts: renesas: eagle: add EtherAVB pins Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 039/102] arm64: dts: renesas: r8a77980: add PFC support Simon Horman
` (64 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Add the (previously omitted) EtherAVB pin data to the V3M Starter Kit
board's device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts b/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts
index a8ceeac77992..55aa01b663e5 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts
@@ -32,6 +32,9 @@
};
&avb {
+ pinctrl-0 = <&avb_pins>;
+ pinctrl-names = "default";
+
renesas,no-ether-link;
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
@@ -52,6 +55,11 @@
};
&pfc {
+ avb_pins: avb0 {
+ groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
+ function = "avb0";
+ };
+
scif0_pins: scif0 {
groups = "scif0_data";
function = "scif0";
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 039/102] arm64: dts: renesas: r8a77980: add PFC support
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (37 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 038/102] arm64: dts: renesas: v3msk: " Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 040/102] arm64: dts: renesas: condor: add SCIF0 pins Simon Horman
` (63 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Define the generic R8A77980 part of the PFC device node.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
index 03845fd74996..08c6708eb9dd 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -71,6 +71,11 @@
#size-cells = <2>;
ranges;
+ pfc: pin-controller at e6060000 {
+ compatible = "renesas,pfc-r8a77980";
+ reg = <0 0xe6060000 0 0x50c>;
+ };
+
cpg: clock-controller at e6150000 {
compatible = "renesas,r8a77980-cpg-mssr";
reg = <0 0xe6150000 0 0x1000>;
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 040/102] arm64: dts: renesas: condor: add SCIF0 pins
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (38 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 039/102] arm64: dts: renesas: r8a77980: add PFC support Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 041/102] arm64: dts: renesas: condor: add EtherAVB pins Simon Horman
` (62 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Add the (previously omitted) SCIF0 pin data to the Condor board's
device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77980-condor.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77980-condor.dts b/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
index 06cf6845765a..38f11cee42dc 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
@@ -49,7 +49,22 @@
clock-frequency = <32768>;
};
+&pfc {
+ scif0_pins: scif0 {
+ groups = "scif0_data";
+ function = "scif0";
+ };
+
+ scif_clk_pins: scif_clk {
+ groups = "scif_clk_b";
+ function = "scif_clk";
+ };
+};
+
&scif0 {
+ pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>;
+ pinctrl-names = "default";
+
status = "okay";
};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 041/102] arm64: dts: renesas: condor: add EtherAVB pins
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (39 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 040/102] arm64: dts: renesas: condor: add SCIF0 pins Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 042/102] arm64: dts: renesas: r8a77980: add MMC support Simon Horman
` (61 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Add the (previously omitted) EtherAVB pin data to the Condor board's
device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77980-condor.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77980-condor.dts b/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
index 38f11cee42dc..7af5afa41795 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
@@ -30,6 +30,9 @@
};
&avb {
+ pinctrl-0 = <&avb_pins>;
+ pinctrl-names = "default";
+
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
renesas,no-ether-link;
@@ -50,6 +53,11 @@
};
&pfc {
+ avb_pins: avb {
+ groups = "avb_mdio", "avb_rgmii";
+ function = "avb";
+ };
+
scif0_pins: scif0 {
groups = "scif0_data";
function = "scif0";
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 042/102] arm64: dts: renesas: r8a77980: add MMC support
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (40 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 041/102] arm64: dts: renesas: condor: add EtherAVB pins Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 043/102] arm64: dts: renesas: r8a7795: add HDMI sound support Simon Horman
` (60 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Define the generic R8A77980 part of the MMC0 (SDHI2) device node.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
index 08c6708eb9dd..d27b80bcdbb4 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -353,6 +353,18 @@
dma-channels = <16>;
};
+ mmc0: mmc at ee140000 {
+ compatible = "renesas,sdhi-r8a77980",
+ "renesas,rcar-gen3-sdhi";
+ reg = <0 0xee140000 0 0x2000>;
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 314>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 314>;
+ max-frequency = <200000000>;
+ status = "disabled";
+ };
+
gic: interrupt-controller at f1010000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 043/102] arm64: dts: renesas: r8a7795: add HDMI sound support
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (41 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 042/102] arm64: dts: renesas: r8a77980: add MMC support Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 044/102] arm64: dts: renesas: r8a7796: " Simon Horman
` (59 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Nguyen Viet Dung <nv-dung@jinso.co.jp>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 32870cbaf94d..b1c52dae4d49 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -2335,6 +2335,10 @@
port at 1 {
reg = <1>;
};
+ port at 2 {
+ /* HDMI sound */
+ reg = <2>;
+ };
};
};
@@ -2360,6 +2364,10 @@
port at 1 {
reg = <1>;
};
+ port at 2 {
+ /* HDMI sound */
+ reg = <2>;
+ };
};
};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 044/102] arm64: dts: renesas: r8a7796: add HDMI sound support
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (42 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 043/102] arm64: dts: renesas: r8a7795: add HDMI sound support Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 045/102] arm64: dts: renesas: salvator-common: use audio-graph-card for Sound Simon Horman
` (58 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Nguyen Viet Dung <nv-dung@jinso.co.jp>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index f33063dd7cd7..f41bc25b3933 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -2009,6 +2009,10 @@
port at 1 {
reg = <1>;
};
+ port at 2 {
+ /* HDMI sound */
+ reg = <2>;
+ };
};
};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 045/102] arm64: dts: renesas: salvator-common: use audio-graph-card for Sound
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (43 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 044/102] arm64: dts: renesas: r8a7796: " Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 046/102] arm64: dts: renesas: r8a7795-es1-salvator-x: enable HDMI sound Simon Horman
` (57 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Current Sound is using simple-audio-card which can't support HDMI.
To use HDMI sound, we need to use audio-graph-card.
But, one note is that r8a7795 has 2 HDMI ports, but r8a7796 has 1.
Because of this mismatch, supporting HDMI on salvator-common is
impossible.
Thus, this patch exchange sound card to audio-graph-card and keep
supporting ak4613 as 1st sound node.
r8a7795/r8a7796 salvator-x{s} need to add HDMI sound individually.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Nguyen Viet Dung <nv-dung@jinso.co.jp>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/salvator-common.dtsi | 38 ++++++++++++++----------
1 file changed, 22 insertions(+), 16 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
index 1642bc9c8906..9116f4caa3c6 100644
--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
@@ -93,20 +93,12 @@
regulator-always-on;
};
- rsnd_ak4613: sound {
- compatible = "simple-audio-card";
+ sound_card: sound {
+ compatible = "audio-graph-card";
- simple-audio-card,format = "left_j";
- simple-audio-card,bitclock-master = <&sndcpu>;
- simple-audio-card,frame-master = <&sndcpu>;
+ label = "rcar-sound";
- sndcpu: simple-audio-card,cpu {
- sound-dai = <&rcar_sound>;
- };
-
- sndcodec: simple-audio-card,codec {
- sound-dai = <&ak4613>;
- };
+ dais = <&rsnd_port0>;
};
vbus0_usb2: regulator-vbus0-usb2 {
@@ -322,6 +314,12 @@
asahi-kasei,out4-single-end;
asahi-kasei,out5-single-end;
asahi-kasei,out6-single-end;
+
+ port {
+ ak4613_endpoint: endpoint {
+ remote-endpoint = <&rsnd_endpoint0>;
+ };
+ };
};
cs2000: clk_multiplier at 4f {
@@ -581,10 +579,18 @@
<&audio_clk_c>,
<&cpg CPG_CORE CPG_AUDIO_CLK_I>;
- rcar_sound,dai {
- dai0 {
- playback = <&ssi0 &src0 &dvc0>;
- capture = <&ssi1 &src1 &dvc1>;
+ ports {
+ rsnd_port0: port at 0 {
+ rsnd_endpoint0: endpoint {
+ remote-endpoint = <&ak4613_endpoint>;
+
+ dai-format = "left_j";
+ bitclock-master = <&rsnd_endpoint0>;
+ frame-master = <&rsnd_endpoint0>;
+
+ playback = <&ssi0 &src0 &dvc0>;
+ capture = <&ssi1 &src1 &dvc1>;
+ };
};
};
};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 046/102] arm64: dts: renesas: r8a7795-es1-salvator-x: enable HDMI sound
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (44 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 045/102] arm64: dts: renesas: salvator-common: use audio-graph-card for Sound Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 047/102] arm64: dts: renesas: r8a7795-salvator-xs: " Simon Horman
` (56 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Nguyen Viet Dung <nv-dung@jinso.co.jp>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
.../boot/dts/renesas/r8a7795-es1-salvator-x.dts | 46 ++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts
index 7f2a3d923f21..3f46345a4644 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dts
@@ -56,6 +56,12 @@
status = "okay";
};
+&sound_card {
+ dais = <&rsnd_port0 /* ak4613 */
+ &rsnd_port1 /* HDMI0 */
+ &rsnd_port2>; /* HDMI1 */
+};
+
&hdmi0 {
status = "okay";
@@ -66,6 +72,12 @@
remote-endpoint = <&hdmi0_con>;
};
};
+ port at 2 {
+ reg = <2>;
+ dw_hdmi0_snd_in: endpoint {
+ remote-endpoint = <&rsnd_endpoint1>;
+ };
+ };
};
};
@@ -83,6 +95,12 @@
remote-endpoint = <&hdmi1_con>;
};
};
+ port at 2 {
+ reg = <2>;
+ dw_hdmi1_snd_in: endpoint {
+ remote-endpoint = <&rsnd_endpoint2>;
+ };
+ };
};
};
@@ -94,6 +112,34 @@
status = "okay";
};
+&rcar_sound {
+ ports {
+ /* rsnd_port0 is on salvator-common */
+ rsnd_port1: port at 1 {
+ rsnd_endpoint1: endpoint {
+ remote-endpoint = <&dw_hdmi0_snd_in>;
+
+ dai-format = "i2s";
+ bitclock-master = <&rsnd_endpoint1>;
+ frame-master = <&rsnd_endpoint1>;
+
+ playback = <&ssi2>;
+ };
+ };
+ rsnd_port2: port at 2 {
+ rsnd_endpoint2: endpoint {
+ remote-endpoint = <&dw_hdmi1_snd_in>;
+
+ dai-format = "i2s";
+ bitclock-master = <&rsnd_endpoint2>;
+ frame-master = <&rsnd_endpoint2>;
+
+ playback = <&ssi3>;
+ };
+ };
+ };
+};
+
&pfc {
usb2_pins: usb2 {
groups = "usb2";
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 047/102] arm64: dts: renesas: r8a7795-salvator-xs: enable HDMI sound
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (45 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 046/102] arm64: dts: renesas: r8a7795-es1-salvator-x: enable HDMI sound Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 048/102] arm64: dts: renesas: r8a7796-salvator-xs: " Simon Horman
` (55 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Nguyen Viet Dung <nv-dung@jinso.co.jp>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
.../arm64/boot/dts/renesas/r8a7795-salvator-xs.dts | 46 ++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts
index 8b50ceb746e8..83676684c6b4 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts
@@ -56,6 +56,12 @@
status = "okay";
};
+&sound_card {
+ dais = <&rsnd_port0 /* ak4613 */
+ &rsnd_port1 /* HDMI0 */
+ &rsnd_port2>; /* HDMI1 */
+};
+
&hdmi0 {
status = "okay";
@@ -66,6 +72,12 @@
remote-endpoint = <&hdmi0_con>;
};
};
+ port at 2 {
+ reg = <2>;
+ dw_hdmi0_snd_in: endpoint {
+ remote-endpoint = <&rsnd_endpoint1>;
+ };
+ };
};
};
@@ -83,6 +95,12 @@
remote-endpoint = <&hdmi1_con>;
};
};
+ port at 2 {
+ reg = <2>;
+ dw_hdmi1_snd_in: endpoint {
+ remote-endpoint = <&rsnd_endpoint2>;
+ };
+ };
};
};
@@ -94,6 +112,34 @@
status = "okay";
};
+&rcar_sound {
+ ports {
+ /* rsnd_port0 is on salvator-common */
+ rsnd_port1: port at 1 {
+ rsnd_endpoint1: endpoint {
+ remote-endpoint = <&dw_hdmi0_snd_in>;
+
+ dai-format = "i2s";
+ bitclock-master = <&rsnd_endpoint1>;
+ frame-master = <&rsnd_endpoint1>;
+
+ playback = <&ssi2>;
+ };
+ };
+ rsnd_port2: port at 2 {
+ rsnd_endpoint2: endpoint {
+ remote-endpoint = <&dw_hdmi1_snd_in>;
+
+ dai-format = "i2s";
+ bitclock-master = <&rsnd_endpoint2>;
+ frame-master = <&rsnd_endpoint2>;
+
+ playback = <&ssi3>;
+ };
+ };
+ };
+};
+
&pfc {
usb2_pins: usb2 {
groups = "usb2";
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 048/102] arm64: dts: renesas: r8a7796-salvator-xs: enable HDMI sound
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (46 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 047/102] arm64: dts: renesas: r8a7795-salvator-xs: " Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 049/102] arm64: dts: renesas: r8a7795-salvator-x: " Simon Horman
` (54 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Nguyen Viet Dung <nv-dung@jinso.co.jp>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
.../arm64/boot/dts/renesas/r8a7796-salvator-xs.dts | 28 ++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts
index 2c37055efa94..ddf35d4cd5e5 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dts
@@ -40,6 +40,11 @@
"dclkin.0", "dclkin.1", "dclkin.2";
};
+&sound_card {
+ dais = <&rsnd_port0 /* ak4613 */
+ &rsnd_port1>; /* HDMI0 */
+};
+
&hdmi0 {
status = "okay";
@@ -50,9 +55,32 @@
remote-endpoint = <&hdmi0_con>;
};
};
+ port at 2 {
+ reg = <2>;
+ dw_hdmi0_snd_in: endpoint {
+ remote-endpoint = <&rsnd_endpoint1>;
+ };
+ };
};
};
&hdmi0_con {
remote-endpoint = <&rcar_dw_hdmi0_out>;
};
+
+&rcar_sound {
+ ports {
+ /* rsnd_port0 is on salvator-common */
+ rsnd_port1: port at 1 {
+ rsnd_endpoint1: endpoint {
+ remote-endpoint = <&dw_hdmi0_snd_in>;
+
+ dai-format = "i2s";
+ bitclock-master = <&rsnd_endpoint1>;
+ frame-master = <&rsnd_endpoint1>;
+
+ playback = <&ssi2>;
+ };
+ };
+ };
+};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 049/102] arm64: dts: renesas: r8a7795-salvator-x: enable HDMI sound
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (47 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 048/102] arm64: dts: renesas: r8a7796-salvator-xs: " Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 050/102] arm64: dts: renesas: r8a7796-salvator-x: " Simon Horman
` (53 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Nguyen Viet Dung <nv-dung@jinso.co.jp>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 46 ++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index af467419266a..0efbef5ea9b7 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -56,6 +56,12 @@
status = "okay";
};
+&sound_card {
+ dais = <&rsnd_port0 /* ak4613 */
+ &rsnd_port1 /* HDMI0 */
+ &rsnd_port2>; /* HDMI1 */
+};
+
&hdmi0 {
status = "okay";
@@ -66,6 +72,12 @@
remote-endpoint = <&hdmi0_con>;
};
};
+ port at 2 {
+ reg = <2>;
+ dw_hdmi0_snd_in: endpoint {
+ remote-endpoint = <&rsnd_endpoint1>;
+ };
+ };
};
};
@@ -83,6 +95,12 @@
remote-endpoint = <&hdmi1_con>;
};
};
+ port at 2 {
+ reg = <2>;
+ dw_hdmi1_snd_in: endpoint {
+ remote-endpoint = <&rsnd_endpoint2>;
+ };
+ };
};
};
@@ -94,6 +112,34 @@
status = "okay";
};
+&rcar_sound {
+ ports {
+ /* rsnd_port0 is on salvator-common */
+ rsnd_port1: port at 1 {
+ rsnd_endpoint1: endpoint {
+ remote-endpoint = <&dw_hdmi0_snd_in>;
+
+ dai-format = "i2s";
+ bitclock-master = <&rsnd_endpoint1>;
+ frame-master = <&rsnd_endpoint1>;
+
+ playback = <&ssi2>;
+ };
+ };
+ rsnd_port2: port at 2 {
+ rsnd_endpoint2: endpoint {
+ remote-endpoint = <&dw_hdmi1_snd_in>;
+
+ dai-format = "i2s";
+ bitclock-master = <&rsnd_endpoint2>;
+ frame-master = <&rsnd_endpoint2>;
+
+ playback = <&ssi3>;
+ };
+ };
+ };
+};
+
&pfc {
usb2_pins: usb2 {
groups = "usb2";
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 050/102] arm64: dts: renesas: r8a7796-salvator-x: enable HDMI sound
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (48 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 049/102] arm64: dts: renesas: r8a7795-salvator-x: " Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 051/102] arm64: dts: renesas: r8a7795-es1: Enable IPMMU devices Simon Horman
` (52 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Nguyen Viet Dung <nv-dung@jinso.co.jp>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 28 ++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
index 498c9e807dc4..90cca09b9a5e 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts
@@ -40,6 +40,11 @@
"dclkin.0", "dclkin.1", "dclkin.2";
};
+&sound_card {
+ dais = <&rsnd_port0 /* ak4613 */
+ &rsnd_port1>; /* HDMI0 */
+};
+
&hdmi0 {
status = "okay";
@@ -50,9 +55,32 @@
remote-endpoint = <&hdmi0_con>;
};
};
+ port at 2 {
+ reg = <2>;
+ dw_hdmi0_snd_in: endpoint {
+ remote-endpoint = <&rsnd_endpoint1>;
+ };
+ };
};
};
&hdmi0_con {
remote-endpoint = <&rcar_dw_hdmi0_out>;
};
+
+&rcar_sound {
+ ports {
+ /* rsnd_port0 is on salvator-common */
+ rsnd_port1: port at 1 {
+ rsnd_endpoint1: endpoint {
+ remote-endpoint = <&dw_hdmi0_snd_in>;
+
+ dai-format = "i2s";
+ bitclock-master = <&rsnd_endpoint1>;
+ frame-master = <&rsnd_endpoint1>;
+
+ playback = <&ssi2>;
+ };
+ };
+ };
+};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 051/102] arm64: dts: renesas: r8a7795-es1: Enable IPMMU devices
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (49 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 050/102] arm64: dts: renesas: r8a7796-salvator-x: " Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 052/102] arm64: dts: renesas: r8a77990: Revise the psci node Simon Horman
` (51 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
Remove 'status = "disabled"' to make sure all IPMMU devices are enabled
in DT on the r8a7795 ES1.0 Soc.
This is a follow up for a patch by Magnus Damm for the
the r8a7795 ES2.0 and other R-Car Gen 3 SoCs.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
index f9acd125d687..0177f5e60e5a 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
@@ -39,7 +39,6 @@
reg = <0 0xe7730000 0 0x1000>;
renesas,ipmmu-main = <&ipmmu_mm 8>;
#iommu-cells = <1>;
- status = "disabled";
};
/delete-node/ usb-phy at ee0e0200;
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 052/102] arm64: dts: renesas: r8a77990: Revise the psci node
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (50 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 051/102] arm64: dts: renesas: r8a7795-es1: Enable IPMMU devices Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 053/102] arm64: dts: renesas: r8a77990: Revise the cache controller node Simon Horman
` (50 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
The basic support patch 9491a8b17530 ("arm64: dts: renesas: Add Renesas
R8A77990 SoC support") lacks the compatible "arm,psci-1.0" in the psci
node. So, this patch revises it.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index 3a19b9ebdd6e..19c1f7cea913 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -50,7 +50,7 @@
};
psci {
- compatible = "arm,psci-0.2";
+ compatible = "arm,psci-1.0", "arm,psci-0.2";
method = "smc";
};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 053/102] arm64: dts: renesas: r8a77990: Revise the cache controller node
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (51 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 052/102] arm64: dts: renesas: r8a77990: Revise the psci node Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 054/102] arm64: dts: renesas: r8a77965: Add FCPF and FCPV instances Simon Horman
` (49 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
The cache controller node should not have unit-addresses and reg
properties. So, this patch removes them.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index 19c1f7cea913..46580290b7fb 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -27,9 +27,8 @@
enable-method = "psci";
};
- L2_CA53: cache-controller at 0 {
+ L2_CA53: cache-controller-0 {
compatible = "cache";
- reg = <0>;
power-domains = <&sysc 21>;
cache-unified;
cache-level = <2>;
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 054/102] arm64: dts: renesas: r8a77965: Add FCPF and FCPV instances
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (52 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 053/102] arm64: dts: renesas: r8a77990: Revise the cache controller node Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 055/102] arm64: dts: renesas: r8a77965: Add VSP instances Simon Horman
` (48 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
The FCPs handle the interface between various IP cores and memory. Add
the instances related to the FDPs and VSP2s.
Based on a similar patch of the R8A7796 device tree
by Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[Kieran: Rebase to top of tree]
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 41 +++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index b12f41755aea..74a7ae4ebccc 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -10,6 +10,7 @@
#include <dt-bindings/clock/renesas-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/r8a77965-sysc.h>
#define CPG_AUDIO_CLK_I 10
@@ -1000,6 +1001,46 @@
/* placeholder */
};
+ fcpf0: fcp at fe950000 {
+ compatible = "renesas,fcpf";
+ reg = <0 0xfe950000 0 0x200>;
+ clocks = <&cpg CPG_MOD 615>;
+ power-domains = <&sysc R8A77965_PD_A3VP>;
+ resets = <&cpg 615>;
+ };
+
+ fcpvb0: fcp at fe96f000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfe96f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 607>;
+ power-domains = <&sysc R8A77965_PD_A3VP>;
+ resets = <&cpg 607>;
+ };
+
+ fcpvi0: fcp at fe9af000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfe9af000 0 0x200>;
+ clocks = <&cpg CPG_MOD 611>;
+ power-domains = <&sysc R8A77965_PD_A3VP>;
+ resets = <&cpg 611>;
+ };
+
+ fcpvd0: fcp at fea27000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea27000 0 0x200>;
+ clocks = <&cpg CPG_MOD 603>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 603>;
+ };
+
+ fcpvd1: fcp at fea2f000 {
+ compatible = "renesas,fcpv";
+ reg = <0 0xfea2f000 0 0x200>;
+ clocks = <&cpg CPG_MOD 602>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 602>;
+ };
+
csi20: csi2 at fea80000 {
reg = <0 0xfea80000 0 0x10000>;
/* placeholder */
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 055/102] arm64: dts: renesas: r8a77965: Add VSP instances
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (53 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 054/102] arm64: dts: renesas: r8a77965: Add FCPF and FCPV instances Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 056/102] arm64: dts: renesas: r8a77965: Populate the DU instance placeholder Simon Horman
` (47 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
The r8a77965 has 4 VSP instances.
Based on a similar patch of the R8A7796 device tree
by Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[Kieran: Rebased to top of tree, fixed sort orders]
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 44 +++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 74a7ae4ebccc..362eddc6b3d1 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -1009,6 +1009,17 @@
resets = <&cpg 615>;
};
+ vspb: vsp at fe960000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe960000 0 0x8000>;
+ interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 626>;
+ power-domains = <&sysc R8A77965_PD_A3VP>;
+ resets = <&cpg 626>;
+
+ renesas,fcp = <&fcpvb0>;
+ };
+
fcpvb0: fcp at fe96f000 {
compatible = "renesas,fcpv";
reg = <0 0xfe96f000 0 0x200>;
@@ -1017,6 +1028,17 @@
resets = <&cpg 607>;
};
+ vspi0: vsp at fe9a0000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfe9a0000 0 0x8000>;
+ interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 631>;
+ power-domains = <&sysc R8A77965_PD_A3VP>;
+ resets = <&cpg 631>;
+
+ renesas,fcp = <&fcpvi0>;
+ };
+
fcpvi0: fcp at fe9af000 {
compatible = "renesas,fcpv";
reg = <0 0xfe9af000 0 0x200>;
@@ -1025,6 +1047,17 @@
resets = <&cpg 611>;
};
+ vspd0: vsp at fea20000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfea20000 0 0x8000>;
+ interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 623>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 623>;
+
+ renesas,fcp = <&fcpvd0>;
+ };
+
fcpvd0: fcp at fea27000 {
compatible = "renesas,fcpv";
reg = <0 0xfea27000 0 0x200>;
@@ -1033,6 +1066,17 @@
resets = <&cpg 603>;
};
+ vspd1: vsp at fea28000 {
+ compatible = "renesas,vsp2";
+ reg = <0 0xfea28000 0 0x8000>;
+ interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 622>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 622>;
+
+ renesas,fcp = <&fcpvd1>;
+ };
+
fcpvd1: fcp at fea2f000 {
compatible = "renesas,fcpv";
reg = <0 0xfea2f000 0 0x200>;
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 056/102] arm64: dts: renesas: r8a77965: Populate the DU instance placeholder
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (54 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 055/102] arm64: dts: renesas: r8a77965: Add VSP instances Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 057/102] arm64: dts: renesas: r8a77965: Add HDMI encoder instance Simon Horman
` (46 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
The DU entity node has been previously added but only as a placeholder.
Populate the node with the properties to use the device.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 362eddc6b3d1..a35ea2f32da2 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -1106,9 +1106,19 @@
};
du: display at feb00000 {
- reg = <0 0xfeb00000 0 0x80000>,
- <0 0xfeb90000 0 0x14>;
- /* placeholder */
+ compatible = "renesas,du-r8a77965";
+ reg = <0 0xfeb00000 0 0x80000>;
+ reg-names = "du";
+ interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 721>;
+ clock-names = "du.0", "du.1", "du.3";
+ status = "disabled";
+
+ vsps = <&vspd0 0 &vspd1 0 &vspd0 1>;
ports {
#address-cells = <1>;
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 057/102] arm64: dts: renesas: r8a77965: Add HDMI encoder instance
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (55 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 056/102] arm64: dts: renesas: r8a77965: Populate the DU instance placeholder Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 058/102] arm64: dts: renesas: r8a77965-salvator-x: Enable DU external clocks and HDMI Simon Horman
` (45 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Add the HDMI encoder to the R8A77965 DT in disabled state.
Based on a similar patch of the R8A7796 device tree
by Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[Kieran: Rebase to top of tree]
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 30 +++++++++++++++++++++++++++++-
1 file changed, 29 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index a35ea2f32da2..b46af2744135 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -8,7 +8,7 @@
* Copyright (C) 2016 Renesas Electronics Corp.
*/
-#include <dt-bindings/clock/renesas-cpg-mssr.h>
+#include <dt-bindings/clock/r8a77965-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/r8a77965-sysc.h>
@@ -1105,6 +1105,33 @@
};
};
+ hdmi0: hdmi at fead0000 {
+ compatible = "renesas,r8a77965-hdmi",
+ "renesas,rcar-gen3-hdmi";
+ reg = <0 0xfead0000 0 0x10000>;
+ interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 729>,
+ <&cpg CPG_CORE R8A77965_CLK_HDMI>;
+ clock-names = "iahb", "isfr";
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 729>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port at 0 {
+ reg = <0>;
+ dw_hdmi0_in: endpoint {
+ remote-endpoint = <&du_out_hdmi0>;
+ };
+ };
+ port at 1 {
+ reg = <1>;
+ };
+ };
+ };
+
du: display at feb00000 {
compatible = "renesas,du-r8a77965";
reg = <0 0xfeb00000 0 0x80000>;
@@ -1132,6 +1159,7 @@
port at 1 {
reg = <1>;
du_out_hdmi0: endpoint {
+ remote-endpoint = <&dw_hdmi0_in>;
};
};
port at 2 {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 058/102] arm64: dts: renesas: r8a77965-salvator-x: Enable DU external clocks and HDMI
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (56 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 057/102] arm64: dts: renesas: r8a77965: Add HDMI encoder instance Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 059/102] arm64: dts: renesas: r8a77965-salvator-xs: " Simon Horman
` (44 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
The DU1 external dot clock is provided by the fixed frequency clock
generator X21, while the DU0 and DU3 clocks are provided by the
programmable Versaclock5 clock generator.
Enable the clocks, and the HDMI encoder for the M3-N Salvator-X board
and hook it up to the HDMI connector.
Based on patches from Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
.../arm64/boot/dts/renesas/r8a77965-salvator-x.dts | 28 ++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts
index 75d890d91df9..340a3c72b65a 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dts
@@ -19,3 +19,31 @@
reg = <0x0 0x48000000 0x0 0x78000000>;
};
};
+
+&du {
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 721>,
+ <&versaclock5 1>,
+ <&x21_clk>,
+ <&versaclock5 2>;
+ clock-names = "du.0", "du.1", "du.3",
+ "dclkin.0", "dclkin.1", "dclkin.3";
+};
+
+&hdmi0 {
+ status = "okay";
+
+ ports {
+ port at 1 {
+ reg = <1>;
+ rcar_dw_hdmi0_out: endpoint {
+ remote-endpoint = <&hdmi0_con>;
+ };
+ };
+ };
+};
+
+&hdmi0_con {
+ remote-endpoint = <&rcar_dw_hdmi0_out>;
+};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 059/102] arm64: dts: renesas: r8a77965-salvator-xs: Enable DU external clocks and HDMI
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (57 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 058/102] arm64: dts: renesas: r8a77965-salvator-x: Enable DU external clocks and HDMI Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 060/102] arm64: dts: renesas: condor: add eMMC support Simon Horman
` (43 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
The DU1 external dot clock is provided by the fixed frequency clock
generator X21, while the DU0 and DU3 clocks are provided by the
programmable Versaclock6 clock generator.
Enable the clocks, and the HDMI encoder for the M3-N Salvator-XS, and
hook it up to the HDMI connector
Based on patches from Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
.../boot/dts/renesas/r8a77965-salvator-xs.dts | 28 ++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a77965-salvator-xs.dts
index a83a00deed9e..9de4e3db1621 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965-salvator-xs.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77965-salvator-xs.dts
@@ -19,3 +19,31 @@
reg = <0x0 0x48000000 0x0 0x78000000>;
};
};
+
+&du {
+ clocks = <&cpg CPG_MOD 724>,
+ <&cpg CPG_MOD 723>,
+ <&cpg CPG_MOD 721>,
+ <&versaclock6 1>,
+ <&x21_clk>,
+ <&versaclock6 2>;
+ clock-names = "du.0", "du.1", "du.3",
+ "dclkin.0", "dclkin.1", "dclkin.3";
+};
+
+&hdmi0 {
+ status = "okay";
+
+ ports {
+ port at 1 {
+ reg = <1>;
+ rcar_dw_hdmi0_out: endpoint {
+ remote-endpoint = <&hdmi0_con>;
+ };
+ };
+ };
+};
+
+&hdmi0_con {
+ remote-endpoint = <&rcar_dw_hdmi0_out>;
+};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 060/102] arm64: dts: renesas: condor: add eMMC support
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (58 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 059/102] arm64: dts: renesas: r8a77965-salvator-xs: " Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 061/102] arm64: dts: renesas: v3msk: add DU/LVDS/HDMI support Simon Horman
` (42 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Define the Condor board dependent part of the MMC0 (connected to eMMC chip)
device node along with the necessary voltage regulators...
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77980-condor.dts | 43 +++++++++++++++++++++++++
1 file changed, 43 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77980-condor.dts b/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
index 7af5afa41795..b8df7604dece 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
@@ -27,6 +27,24 @@
/* first 128MB is reserved for secure area. */
reg = <0 0x48000000 0 0x78000000>;
};
+
+ d3_3v: regulator-0 {
+ compatible = "regulator-fixed";
+ regulator-name = "D3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vddq_vin01: regulator-1 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDDQ_VIN01";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
};
&avb {
@@ -52,12 +70,37 @@
clock-frequency = <32768>;
};
+&mmc0 {
+ pinctrl-0 = <&mmc_pins>;
+ pinctrl-1 = <&mmc_pins_uhs>;
+ pinctrl-names = "default", "state_uhs";
+
+ vmmc-supply = <&d3_3v>;
+ vqmmc-supply = <&vddq_vin01>;
+ mmc-hs200-1_8v;
+ bus-width = <8>;
+ non-removable;
+ status = "okay";
+};
+
&pfc {
avb_pins: avb {
groups = "avb_mdio", "avb_rgmii";
function = "avb";
};
+ mmc_pins: mmc {
+ groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
+ function = "mmc";
+ power-source = <3300>;
+ };
+
+ mmc_pins_uhs: mmc_uhs {
+ groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
+ function = "mmc";
+ power-source = <1800>;
+ };
+
scif0_pins: scif0 {
groups = "scif0_data";
function = "scif0";
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 061/102] arm64: dts: renesas: v3msk: add DU/LVDS/HDMI support
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (59 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 060/102] arm64: dts: renesas: condor: add eMMC support Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 062/102] arm64: dts: renesas: r8a7795: Add address properties to rcar_sound port nodes Simon Horman
` (41 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Define the V3M Starter Kit board dependent part of the DU and LVDS device
nodes. Also add the device nodes for Thine THC63LVD1024 LVDS decoder and
Analog Devices ADV7511W HDMI transmitter...
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts | 129 +++++++++++++++++++++++++
1 file changed, 129 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts b/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts
index 55aa01b663e5..9fce031a596f 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts
@@ -29,6 +29,65 @@
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x38000000>;
};
+
+ osc5_clk: osc5-clock {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <148500000>;
+ };
+
+ vcc_d1_8v: regulator-0 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_D1.8V";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ vcc_d3_3v: regulator-1 {
+ compatible = "regulator-fixed";
+ regulator-name = "VCC_D3.3V";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ lvds-decoder {
+ compatible = "thine,thc63lvd1024";
+ vcc-supply = <&vcc_d3_3v>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ thc63lvd1024_in: endpoint {
+ remote-endpoint = <&lvds0_out>;
+ };
+ };
+
+ port at 2 {
+ reg = <2>;
+ thc63lvd1024_out: endpoint {
+ remote-endpoint = <&adv7511_in>;
+ };
+ };
+ };
+ };
+
+ hdmi-out {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con: endpoint {
+ remote-endpoint = <&adv7511_out>;
+ };
+ };
+ };
};
&avb {
@@ -46,6 +105,13 @@
};
};
+&du {
+ clocks = <&cpg CPG_MOD 724>,
+ <&osc5_clk>;
+ clock-names = "du.0", "dclkin.0";
+ status = "okay";
+};
+
&extal_clk {
clock-frequency = <16666666>;
};
@@ -60,12 +126,75 @@
function = "avb0";
};
+ i2c0_pins: i2c0 {
+ groups = "i2c0";
+ function = "i2c0";
+ };
+
scif0_pins: scif0 {
groups = "scif0_data";
function = "scif0";
};
};
+&i2c0 {
+ pinctrl-0 = <&i2c0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+ clock-frequency = <400000>;
+
+ hdmi at 39{
+ compatible = "adi,adv7511w";
+ #sound-dai-cells = <0>;
+ reg = <0x39>;
+ interrupt-parent = <&gpio1>;
+ interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
+ avdd-supply = <&vcc_d1_8v>;
+ dvdd-supply = <&vcc_d1_8v>;
+ pvdd-supply = <&vcc_d1_8v>;
+ bgvdd-supply = <&vcc_d1_8v>;
+ dvdd-3v-supply = <&vcc_d3_3v>;
+
+ adi,input-depth = <8>;
+ adi,input-colorspace = "rgb";
+ adi,input-clock = "1x";
+ adi,input-style = <1>;
+ adi,input-justification = "evenly";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 0 {
+ reg = <0>;
+ adv7511_in: endpoint {
+ remote-endpoint = <&thc63lvd1024_out>;
+ };
+ };
+
+ port at 1 {
+ reg = <1>;
+ adv7511_out: endpoint {
+ remote-endpoint = <&hdmi_con>;
+ };
+ };
+ };
+ };
+};
+
+&lvds0 {
+ status = "okay";
+
+ ports {
+ port at 1 {
+ lvds0_out: endpoint {
+ remote-endpoint = <&thc63lvd1024_in>;
+ };
+ };
+ };
+};
+
&scif0 {
pinctrl-0 = <&scif0_pins>;
pinctrl-names = "default";
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 062/102] arm64: dts: renesas: r8a7795: Add address properties to rcar_sound port nodes
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (60 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 061/102] arm64: dts: renesas: v3msk: add DU/LVDS/HDMI support Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 063/102] arm64: dts: renesas: r8a7796: " Simon Horman
` (40 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
The rcar_sound port nodes have unit names and thus should have register
properties.
This is flagged by dtc as follows:
# make dtbs W=1
...
DTC arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dtb
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dtb: Warning (unit_address_vs_reg): /soc/sound at ec500000/ports/port at 0: node has a unit name, but no reg property
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dtb: Warning (unit_address_vs_reg): /soc/sound at ec500000/ports/port at 1: node has a unit name, but no reg property
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dtb: Warning (unit_address_vs_reg): /soc/sound at ec500000/ports/port at 2: node has a unit name, but no reg property
...
DTC arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dtb
arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dtb: Warning (unit_address_vs_reg): /soc/sound at ec500000/ports/port at 0: node has a unit name, but no reg property
arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dtb: Warning (unit_address_vs_reg): /soc/sound at ec500000/ports/port at 1: node has a unit name, but no reg property
arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dtb: Warning (unit_address_vs_reg): /soc/sound at ec500000/ports/port at 2: node has a unit name, but no reg property
DTC arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dtb
arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dtb: Warning (unit_address_vs_reg): /soc/sound at ec500000/ports/port at 0: node has a unit name, but no reg property
arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dtb: Warning (unit_address_vs_reg): /soc/sound at ec500000/ports/port at 1: node has a unit name, but no reg property
arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dtb: Warning (unit_address_vs_reg): /soc/sound at ec500000/ports/port at 2: node has a unit name, but no reg property
Prior to this patch the port nodes only defined in board DTS files.
As the register properties are common this patch defines the port nodes
and provides register properties in the SoC DTS file.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index b1c52dae4d49..9b080a864ea1 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1711,6 +1711,20 @@
dma-names = "rx", "tx", "rxu", "txu";
};
};
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port at 0 {
+ reg = <0>;
+ };
+ port at 1 {
+ reg = <1>;
+ };
+ port at 2 {
+ reg = <2>;
+ };
+ };
};
audma0: dma-controller at ec700000 {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 063/102] arm64: dts: renesas: r8a7796: Add address properties to rcar_sound port nodes
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (61 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 062/102] arm64: dts: renesas: r8a7795: Add address properties to rcar_sound port nodes Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 064/102] arm64: dts: renesas: r8a77965: " Simon Horman
` (39 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
The rcar_sound port nodes have unit names and thus should have register
properties.
This is flagged by dtc as follows:
# make dtbs W=1
...
DTC arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dtb
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dtb: Warning (unit_address_vs_reg): /soc/sound at ec500000/ports/port at 0: node has a unit name, but no reg property
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dtb: Warning (unit_address_vs_reg): /soc/sound at ec500000/ports/port at 1: node has a unit name, but no reg property
...
DTC arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dtb
arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dtb: Warning (unit_address_vs_reg): /soc/sound at ec500000/ports/port at 0: node has a unit name, but no reg property
arch/arm64/boot/dts/renesas/r8a7796-salvator-xs.dtb: Warning (unit_address_vs_reg): /soc/sound at ec500000/ports/port at 1: node has a unit name, but no reg property
Prior to this patch the port nodes only defined in board DTS files.
As the register properties are common this patch defines the port nodes
and provides register properties in the SoC DTS file.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index f41bc25b3933..3fbd86590fb0 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -1594,6 +1594,17 @@
dma-names = "rx", "tx", "rxu", "txu";
};
};
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port at 0 {
+ reg = <0>;
+ };
+ port at 1 {
+ reg = <1>;
+ };
+ };
};
audma0: dma-controller at ec700000 {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 064/102] arm64: dts: renesas: r8a77965: Add address properties to rcar_sound port nodes
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (62 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 063/102] arm64: dts: renesas: r8a7796: " Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 065/102] arm64: dts: renesas: r8a77980: use CPG core clock macros Simon Horman
` (38 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
The rcar_sound port nodes have unit names and thus should have register
properties.
This is flagged by dtc as follows:
# make dtbs W=1
...
DTC arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb
arch/arm64/boot/dts/renesas/r8a77965-salvator-x.dtb: Warning (unit_address_vs_reg): /soc/sound at ec500000/ports/port at 0: node has a unit name, but no reg property
DTC arch/arm64/boot/dts/renesas/r8a77965-salvator-xs.dtb
arch/arm64/boot/dts/renesas/r8a77965-salvator-xs.dtb: Warning (unit_address_vs_reg): /soc/sound at ec500000/ports/port at 0: node has a unit name, but no reg property
Prior to this patch the port nodes only defined in board DTS files.
As the register properties are common this patch defines the port nodes
and provides register properties in the SoC DTS file.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index b46af2744135..7c9555309c0a 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -857,6 +857,14 @@
ssi1: ssi-1 {
};
};
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port at 0 {
+ reg = <0>;
+ };
+ };
};
xhci0: usb at ee000000 {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 065/102] arm64: dts: renesas: r8a77980: use CPG core clock macros
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (63 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 064/102] arm64: dts: renesas: r8a77965: " Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 066/102] arm64: dts: renesas: r8a77980: use SYSC power domain macros Simon Horman
` (37 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Now that the commit 35b3c462dae1 ("dt-bindings: clock: add R8A77980 CPG
core clock definitions") has hit Linus' tree, we can replace the bare
numbers (we had to use to avoid a cross tree dependency) with these macro
definitions...
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
index d27b80bcdbb4..fddbaf250087 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -6,9 +6,9 @@
* Copyright (C) 2018 Cogent Embedded, Inc.
*/
+#include <dt-bindings/clock/r8a77980-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/clock/renesas-cpg-mssr.h>
/ {
compatible = "renesas,r8a77980";
@@ -23,7 +23,7 @@
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0>;
- clocks = <&cpg CPG_CORE 0>;
+ clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
power-domains = <&sysc 5>;
next-level-cache = <&L2_CA53>;
enable-method = "psci";
@@ -104,7 +104,7 @@
reg = <0 0xe6540000 0 0x60>;
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 520>,
- <&cpg CPG_CORE 19>,
+ <&cpg CPG_CORE R8A77980_CLK_S3D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x31>, <&dmac1 0x30>,
@@ -122,7 +122,7 @@
reg = <0 0xe6550000 0 0x60>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 519>,
- <&cpg CPG_CORE 19>,
+ <&cpg CPG_CORE R8A77980_CLK_S3D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x33>, <&dmac1 0x32>,
@@ -140,7 +140,7 @@
reg = <0 0xe6560000 0 0x60>;
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 518>,
- <&cpg CPG_CORE 19>,
+ <&cpg CPG_CORE R8A77980_CLK_S3D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x35>, <&dmac1 0x34>,
@@ -158,7 +158,7 @@
reg = <0 0xe66a0000 0 0x60>;
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 517>,
- <&cpg CPG_CORE 19>,
+ <&cpg CPG_CORE R8A77980_CLK_S3D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x37>, <&dmac1 0x36>,
@@ -220,7 +220,7 @@
reg = <0 0xe6e60000 0 0x40>;
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 207>,
- <&cpg CPG_CORE 19>,
+ <&cpg CPG_CORE R8A77980_CLK_S3D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x51>, <&dmac1 0x50>,
@@ -238,7 +238,7 @@
reg = <0 0xe6e68000 0 0x40>;
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 206>,
- <&cpg CPG_CORE 19>,
+ <&cpg CPG_CORE R8A77980_CLK_S3D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x53>, <&dmac1 0x52>,
@@ -256,7 +256,7 @@
reg = <0 0xe6c50000 0 0x40>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 204>,
- <&cpg CPG_CORE 19>,
+ <&cpg CPG_CORE R8A77980_CLK_S3D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x57>, <&dmac1 0x56>,
@@ -274,7 +274,7 @@
reg = <0 0xe6c40000 0 0x40>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 203>,
- <&cpg CPG_CORE 19>,
+ <&cpg CPG_CORE R8A77980_CLK_S3D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x59>, <&dmac1 0x58>,
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 066/102] arm64: dts: renesas: r8a77980: use SYSC power domain macros
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (64 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 065/102] arm64: dts: renesas: r8a77980: use CPG core clock macros Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 067/102] arm64: dts: renesas: r8a77965: use r8a77965-sysc binding definitions Simon Horman
` (36 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Now that the commit 7755b40d07a8 ("dt-bindings: power: add R8A77980 SYSC
power domain definitions") has hit Linus' tree, we can replace the bare
numbers (we had to use to avoid a cross tree dependency) with these macro
definitions...
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 31 ++++++++++++++++---------------
1 file changed, 16 insertions(+), 15 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
index fddbaf250087..5c865fcd3986 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -9,6 +9,7 @@
#include <dt-bindings/clock/r8a77980-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/r8a77980-sysc.h>
/ {
compatible = "renesas,r8a77980";
@@ -24,14 +25,14 @@
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0>;
clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
- power-domains = <&sysc 5>;
+ power-domains = <&sysc R8A77980_PD_CA53_CPU0>;
next-level-cache = <&L2_CA53>;
enable-method = "psci";
};
L2_CA53: cache-controller {
compatible = "cache";
- power-domains = <&sysc 21>;
+ power-domains = <&sysc R8A77980_PD_CA53_SCU>;
cache-unified;
cache-level = <2>;
};
@@ -110,7 +111,7 @@
dmas = <&dmac1 0x31>, <&dmac1 0x30>,
<&dmac2 0x31>, <&dmac2 0x30>;
dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 520>;
status = "disabled";
};
@@ -128,7 +129,7 @@
dmas = <&dmac1 0x33>, <&dmac1 0x32>,
<&dmac2 0x33>, <&dmac2 0x32>;
dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 519>;
status = "disabled";
};
@@ -146,7 +147,7 @@
dmas = <&dmac1 0x35>, <&dmac1 0x34>,
<&dmac2 0x35>, <&dmac2 0x34>;
dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 518>;
status = "disabled";
};
@@ -164,7 +165,7 @@
dmas = <&dmac1 0x37>, <&dmac1 0x36>,
<&dmac2 0x37>, <&dmac2 0x36>;
dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 517>;
status = "disabled";
};
@@ -206,7 +207,7 @@
"ch20", "ch21", "ch22", "ch23",
"ch24";
clocks = <&cpg CPG_MOD 812>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 812>;
phy-mode = "rgmii";
#address-cells = <1>;
@@ -226,7 +227,7 @@
dmas = <&dmac1 0x51>, <&dmac1 0x50>,
<&dmac2 0x51>, <&dmac2 0x50>;
dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 207>;
status = "disabled";
};
@@ -244,7 +245,7 @@
dmas = <&dmac1 0x53>, <&dmac1 0x52>,
<&dmac2 0x53>, <&dmac2 0x52>;
dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 206>;
status = "disabled";
};
@@ -262,7 +263,7 @@
dmas = <&dmac1 0x57>, <&dmac1 0x56>,
<&dmac2 0x57>, <&dmac2 0x56>;
dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 204>;
status = "disabled";
};
@@ -280,7 +281,7 @@
dmas = <&dmac1 0x59>, <&dmac1 0x58>,
<&dmac2 0x59>, <&dmac2 0x58>;
dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 203>;
status = "disabled";
};
@@ -313,7 +314,7 @@
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <16>;
@@ -347,7 +348,7 @@
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 217>;
clock-names = "fck";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 217>;
#dma-cells = <1>;
dma-channels = <16>;
@@ -359,7 +360,7 @@
reg = <0 0xee140000 0 0x2000>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 314>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 314>;
max-frequency = <200000000>;
status = "disabled";
@@ -378,7 +379,7 @@
IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
resets = <&cpg 408>;
};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 067/102] arm64: dts: renesas: r8a77965: use r8a77965-sysc binding definitions
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (65 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 066/102] arm64: dts: renesas: r8a77980: use SYSC power domain macros Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 068/102] arm64: dts: renesas: r8a77965: Add R-Car Gen3 thermal support Simon Horman
` (35 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Replace the hardcoded power domain indices by R8A77965_PD_* symbols.
Signed-off-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Jacopo Mondi <jacopo@jmondi.org>
[simon: dropped hunk to include r8a77965-sysc.h which is already present]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 94 +++++++++++++++----------------
1 file changed, 47 insertions(+), 47 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 7c9555309c0a..536fed8eec6a 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -61,7 +61,7 @@
compatible = "arm,cortex-a57", "arm,armv8";
reg = <0x0>;
device_type = "cpu";
- power-domains = <&sysc 0>;
+ power-domains = <&sysc R8A77965_PD_CA57_CPU0>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
};
@@ -70,14 +70,14 @@
compatible = "arm,cortex-a57","arm,armv8";
reg = <0x1>;
device_type = "cpu";
- power-domains = <&sysc 1>;
+ power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
};
L2_CA57: cache-controller-0 {
compatible = "cache";
- power-domains = <&sysc 12>;
+ power-domains = <&sysc R8A77965_PD_CA57_SCU>;
cache-unified;
cache-level = <2>;
};
@@ -147,7 +147,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 912>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 912>;
};
@@ -162,7 +162,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 911>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 911>;
};
@@ -177,7 +177,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 910>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 910>;
};
@@ -192,7 +192,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 909>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 909>;
};
@@ -207,7 +207,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 908>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 908>;
};
@@ -222,7 +222,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 907>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 907>;
};
@@ -237,7 +237,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 906>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 906>;
};
@@ -252,7 +252,7 @@
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 905>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 905>;
};
@@ -294,7 +294,7 @@
GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 407>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 407>;
};
@@ -348,7 +348,7 @@
reg = <0 0xe60b0000 0 0x425>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 926>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 926>;
dmas = <&dmac0 0x11>, <&dmac0 0x10>;
dma-names = "tx", "rx";
@@ -367,7 +367,7 @@
renesas,buswait = <11>;
phys = <&usb2_phy0>;
phy-names = "usb";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 704>;
status = "disabled";
};
@@ -380,7 +380,7 @@
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1";
clocks = <&cpg CPG_MOD 330>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 330>;
#dma-cells = <1>;
dma-channels = <2>;
@@ -394,7 +394,7 @@
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1";
clocks = <&cpg CPG_MOD 331>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 331>;
#dma-cells = <1>;
dma-channels = <2>;
@@ -407,7 +407,7 @@
clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
<&usb_extal_clk>;
clock-names = "usb3-if", "usb3s_clk", "usb_extal";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 328>;
#phy-cells = <0>;
status = "disabled";
@@ -441,7 +441,7 @@
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <16>;
@@ -475,7 +475,7 @@
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <16>;
@@ -509,7 +509,7 @@
"ch12", "ch13", "ch14", "ch15";
clocks = <&cpg CPG_MOD 217>;
clock-names = "fck";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 217>;
#dma-cells = <1>;
dma-channels = <16>;
@@ -552,7 +552,7 @@
"ch20", "ch21", "ch22", "ch23",
"ch24";
clocks = <&cpg CPG_MOD 812>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 812>;
phy-mode = "rgmii";
#address-cells = <1>;
@@ -566,7 +566,7 @@
#pwm-cells = <2>;
clocks = <&cpg CPG_MOD 523>;
resets = <&cpg 523>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -576,7 +576,7 @@
#pwm-cells = <2>;
clocks = <&cpg CPG_MOD 523>;
resets = <&cpg 523>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -586,7 +586,7 @@
#pwm-cells = <2>;
clocks = <&cpg CPG_MOD 523>;
resets = <&cpg 523>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -596,7 +596,7 @@
#pwm-cells = <2>;
clocks = <&cpg CPG_MOD 523>;
resets = <&cpg 523>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -606,7 +606,7 @@
#pwm-cells = <2>;
clocks = <&cpg CPG_MOD 523>;
resets = <&cpg 523>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -616,7 +616,7 @@
#pwm-cells = <2>;
clocks = <&cpg CPG_MOD 523>;
resets = <&cpg 523>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -626,7 +626,7 @@
#pwm-cells = <2>;
clocks = <&cpg CPG_MOD 523>;
resets = <&cpg 523>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
status = "disabled";
};
@@ -642,7 +642,7 @@
dmas = <&dmac1 0x51>, <&dmac1 0x50>,
<&dmac2 0x51>, <&dmac2 0x50>;
dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 207>;
status = "disabled";
};
@@ -659,7 +659,7 @@
dmas = <&dmac1 0x53>, <&dmac1 0x52>,
<&dmac2 0x53>, <&dmac2 0x52>;
dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 206>;
status = "disabled";
};
@@ -673,7 +673,7 @@
<&cpg CPG_CORE 20>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 310>;
status = "disabled";
};
@@ -689,7 +689,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x57>, <&dmac0 0x56>;
dma-names = "tx", "rx";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 204>;
status = "disabled";
};
@@ -705,7 +705,7 @@
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x59>, <&dmac0 0x58>;
dma-names = "tx", "rx";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 203>;
status = "disabled";
};
@@ -722,7 +722,7 @@
dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
<&dmac2 0x5b>, <&dmac2 0x5a>;
dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 202>;
status = "disabled";
};
@@ -736,7 +736,7 @@
dmas = <&dmac1 0x41>, <&dmac1 0x40>,
<&dmac2 0x41>, <&dmac2 0x40>;
dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 211>;
#address-cells = <1>;
#size-cells = <0>;
@@ -752,7 +752,7 @@
dmas = <&dmac1 0x43>, <&dmac1 0x42>,
<&dmac2 0x43>, <&dmac2 0x42>;
dma-names = "tx", "rx", "tx", "rx";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 210>;
#address-cells = <1>;
#size-cells = <0>;
@@ -767,7 +767,7 @@
clocks = <&cpg CPG_MOD 209>;
dmas = <&dmac0 0x45>, <&dmac0 0x44>;
dma-names = "tx", "rx";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 209>;
#address-cells = <1>;
#size-cells = <0>;
@@ -782,7 +782,7 @@
clocks = <&cpg CPG_MOD 208>;
dmas = <&dmac0 0x47>, <&dmac0 0x46>;
dma-names = "tx", "rx";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 208>;
#address-cells = <1>;
#size-cells = <0>;
@@ -873,7 +873,7 @@
reg = <0 0xee000000 0 0xc00>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 328>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 328>;
status = "disabled";
};
@@ -884,7 +884,7 @@
reg = <0 0xee020000 0 0x400>;
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 328>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 328>;
status = "disabled";
};
@@ -896,7 +896,7 @@
clocks = <&cpg CPG_MOD 703>;
phys = <&usb2_phy0>;
phy-names = "usb";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 703>;
status = "disabled";
};
@@ -908,7 +908,7 @@
clocks = <&cpg CPG_MOD 702>;
phys = <&usb2_phy1>;
phy-names = "usb";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 702>;
status = "disabled";
};
@@ -921,7 +921,7 @@
phys = <&usb2_phy0>;
phy-names = "usb";
companion = <&ohci0>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 703>;
status = "disabled";
};
@@ -934,7 +934,7 @@
phys = <&usb2_phy1>;
phy-names = "usb";
companion = <&ohci1>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 702>;
status = "disabled";
};
@@ -945,7 +945,7 @@
reg = <0 0xee080200 0 0x700>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 703>;
#phy-cells = <0>;
status = "disabled";
@@ -956,7 +956,7 @@
"renesas,rcar-gen3-usb2-phy";
reg = <0 0xee0a0200 0 0x700>;
clocks = <&cpg CPG_MOD 703>;
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 703>;
#phy-cells = <0>;
status = "disabled";
@@ -995,7 +995,7 @@
(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
- power-domains = <&sysc 32>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
resets = <&cpg 408>;
};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 068/102] arm64: dts: renesas: r8a77965: Add R-Car Gen3 thermal support
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (66 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 067/102] arm64: dts: renesas: r8a77965: use r8a77965-sysc binding definitions Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 069/102] arm64: dts: renesas: r8a77970: add CAN-FD support Simon Horman
` (34 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Based on previous work by Ryo Kataoka <ryo.kataoka.wt@renesas.com>.
Signed-off-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
[simon: moved thermal node to preseve ordering of nodes by bus address]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 59 +++++++++++++++++++++++++++++++
1 file changed, 59 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 536fed8eec6a..b93281affd63 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -282,6 +282,21 @@
#power-domain-cells = <1>;
};
+ tsc: thermal at e6198000 {
+ compatible = "renesas,r8a77965-thermal";
+ reg = <0 0xe6198000 0 0x100>,
+ <0 0xe61a0000 0 0x100>,
+ <0 0xe61a8000 0 0x100>;
+ interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 522>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 522>;
+ #thermal-sensor-cells = <1>;
+ status = "okay";
+ };
+
intc_ex: interrupt-controller at e61c0000 {
compatible = "renesas,intc-ex-r8a77965", "renesas,irqc";
#interrupt-cells = <2>;
@@ -1192,6 +1207,50 @@
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
+ thermal-zones {
+ sensor_thermal1: sensor-thermal1 {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&tsc 0>;
+
+ trips {
+ sensor1_crit: sensor1-crit {
+ temperature = <120000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ sensor_thermal2: sensor-thermal2 {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&tsc 1>;
+
+ trips {
+ sensor2_crit: sensor2-crit {
+ temperature = <120000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+
+ sensor_thermal3: sensor-thermal3 {
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
+ thermal-sensors = <&tsc 2>;
+
+ trips {
+ sensor3_crit: sensor3-crit {
+ temperature = <120000>;
+ hysteresis = <1000>;
+ type = "critical";
+ };
+ };
+ };
+ };
+
/* External USB clocks - can be overridden by the board */
usb3s0_clk: usb3s0 {
compatible = "fixed-clock";
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 069/102] arm64: dts: renesas: r8a77970: add CAN-FD support
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (67 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 068/102] arm64: dts: renesas: r8a77965: Add R-Car Gen3 thermal support Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 070/102] arm64: dts: renesas: eagle: " Simon Horman
` (33 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Define the generic R8A77970 part of the CAN-FD device node.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 32 +++++++++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index 6ed2e95eb53d..37b843c0677a 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -68,6 +68,13 @@
method = "smc";
};
+ /* External CAN clock - to be overridden by boards that provide it */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
/* External SCIF clock - to be overridden by boards that provide it */
scif_clk: scif {
compatible = "fixed-clock";
@@ -381,6 +388,31 @@
status = "disabled";
};
+ canfd: can at e66c0000 {
+ compatible = "renesas,r8a77970-canfd",
+ "renesas,rcar-gen3-canfd";
+ reg = <0 0xe66c0000 0 0x8000>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 914>,
+ <&cpg CPG_CORE R8A77970_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "fck", "canfd", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A77970_CLK_CANFD>;
+ assigned-clock-rates = <40000000>;
+ power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+ resets = <&cpg 914>;
+ status = "disabled";
+
+ channel0 {
+ status = "disabled";
+ };
+
+ channel1 {
+ status = "disabled";
+ };
+ };
+
avb: ethernet at e6800000 {
compatible = "renesas,etheravb-r8a77970",
"renesas,etheravb-rcar-gen3";
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 070/102] arm64: dts: renesas: eagle: add CAN-FD support
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (68 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 069/102] arm64: dts: renesas: r8a77970: add CAN-FD support Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 071/102] arm64: dts: renesas: r8a77980: " Simon Horman
` (32 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Define the Eagle board dependent part of the CAN-FD device node.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970-eagle.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
index b800a119753b..21f9cf5c6e84 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
@@ -95,6 +95,16 @@
};
};
+&canfd {
+ pinctrl-0 = <&canfd0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ channel0 {
+ status = "okay";
+ };
+};
+
&extal_clk {
clock-frequency = <16666666>;
};
@@ -156,6 +166,11 @@
function = "avb0";
};
+ canfd0_pins: canfd0 {
+ groups = "canfd0_data_a";
+ function = "canfd0";
+ };
+
i2c0_pins: i2c0 {
groups = "i2c0";
function = "i2c0";
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 071/102] arm64: dts: renesas: r8a77980: add CAN-FD support
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (69 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 070/102] arm64: dts: renesas: eagle: " Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 072/102] arm64: dts: renesas: condor: " Simon Horman
` (31 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Define the generic R8A77980 part of the CAN-FD device node.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
[simon: consistently use tabs for indentation]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
index 5c865fcd3986..3a127643d1dc 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -38,6 +38,13 @@
};
};
+ /* External CAN clock - to be overridden by boards that provide it */
+ can_clk: can {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
extal_clk: extal {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -170,6 +177,30 @@
status = "disabled";
};
+ canfd: can at e66c0000 {
+ compatible = "renesas,r8a77980-canfd",
+ "renesas,rcar-gen3-canfd";
+ reg = <0 0xe66c0000 0 0x8000>;
+ interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 914>,
+ <&cpg CPG_CORE R8A77980_CLK_CANFD>,
+ <&can_clk>;
+ clock-names = "fck", "canfd", "can_clk";
+ assigned-clocks = <&cpg CPG_CORE R8A77980_CLK_CANFD>;
+ assigned-clock-rates = <40000000>;
+ power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+ status = "disabled";
+
+ channel0 {
+ status = "disabled";
+ };
+
+ channel1 {
+ status = "disabled";
+ };
+ };
+
avb: ethernet at e6800000 {
compatible = "renesas,etheravb-r8a77980",
"renesas,etheravb-rcar-gen3";
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 072/102] arm64: dts: renesas: condor: add CAN-FD support
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (70 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 071/102] arm64: dts: renesas: r8a77980: " Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 073/102] arm64: dts: renesas: salvator-common: add eeprom Simon Horman
` (30 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Define the Condor board dependent part of the CAN-FD device node.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77980-condor.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77980-condor.dts b/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
index b8df7604dece..0b93a7d76585 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
@@ -62,6 +62,16 @@
};
};
+&canfd {
+ pinctrl-0 = <&canfd0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+
+ channel0 {
+ status = "okay";
+ };
+};
+
&extal_clk {
clock-frequency = <16666666>;
};
@@ -89,6 +99,11 @@
function = "avb";
};
+ canfd0_pins: canfd0 {
+ groups = "canfd0_data_a";
+ function = "canfd0";
+ };
+
mmc_pins: mmc {
groups = "mmc_data8", "mmc_ctrl", "mmc_ds";
function = "mmc";
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 073/102] arm64: dts: renesas: salvator-common: add eeprom
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (71 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 072/102] arm64: dts: renesas: condor: " Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 074/102] arm64: dts: renesas: r8a7795: salvator-xs: enable usb2_phy3 node Simon Horman
` (29 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
Add the EEPROM found on Salvator-X and -XS boards for H3, M3-W, and M3-N
on the IIC_DVFS bus.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/salvator-common.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
index 9116f4caa3c6..803220a02f50 100644
--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
@@ -385,6 +385,12 @@
};
};
};
+
+ eeprom at 50 {
+ compatible = "rohm,br24t01", "atmel,24c01";
+ reg = <0x50>;
+ pagesize = <8>;
+ };
};
&ohci0 {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 074/102] arm64: dts: renesas: r8a7795: salvator-xs: enable usb2_phy3 node
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (72 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 073/102] arm64: dts: renesas: salvator-common: add eeprom Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 075/102] arm64: dts: renesas: r8a7795: salvator-xs: enable hsusb channel 3 node Simon Horman
` (28 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch enables usb2_phy3 node for r8a7795 with Salvator-XS.
You must change the SW31 to OFF-OFF-ON-ON-ON-ON on the board.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
.../arm64/boot/dts/renesas/r8a7795-salvator-xs.dts | 24 ++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts
index 83676684c6b4..622b2a22ab0f 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts
@@ -145,6 +145,23 @@
groups = "usb2";
function = "usb2";
};
+
+ /*
+ * - On Salvator-X[S], GP6_3[01] are connected to ADV7482 as irq pins
+ * (when SW31 is the default setting on Salvator-XS).
+ * - If SW31 is the default setting, you cannot use USB2.0 ch3 on
+ * r8a7795 with Salvator-XS.
+ * Hence the SW31 setting must be changed like 2) below.
+ * 1) Default setting of SW31: ON-ON-OFF-OFF-OFF-OFF:
+ * - Connect GP6_3[01] to ADV7842.
+ * 2) Changed setting of SW31: OFF-OFF-ON-ON-ON-ON:
+ * - Connect GP6_3[01] to BD082065 (USB2.0 ch3's host power).
+ * - Connect GP6_{04,21} to ADV7842.
+ */
+ usb2_ch3_pins: usb2_ch3 {
+ groups = "usb2_ch3";
+ function = "usb2_ch3";
+ };
};
&usb2_phy2 {
@@ -153,3 +170,10 @@
status = "okay";
};
+
+&usb2_phy3 {
+ pinctrl-0 = <&usb2_ch3_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 075/102] arm64: dts: renesas: r8a7795: salvator-xs: enable hsusb channel 3 node
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (73 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 074/102] arm64: dts: renesas: r8a7795: salvator-xs: enable usb2_phy3 node Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 076/102] arm64: dts: renesas: r8a7795: salvator-xs: enable USB2.0 host channel 3 Simon Horman
` (27 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch enables HS-USB channel3 node for r8a7795 with Salvator-XS.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts
index 622b2a22ab0f..bbf5a8812b70 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts
@@ -56,6 +56,11 @@
status = "okay";
};
+&hsusb3 {
+ dr_mode = "otg";
+ status = "okay";
+};
+
&sound_card {
dais = <&rsnd_port0 /* ak4613 */
&rsnd_port1 /* HDMI0 */
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 076/102] arm64: dts: renesas: r8a7795: salvator-xs: enable USB2.0 host channel 3
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (74 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 075/102] arm64: dts: renesas: r8a7795: salvator-xs: enable hsusb channel 3 node Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 077/102] arm64: dts: renesas: r8a7795: Correct whitespace Simon Horman
` (26 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch enables USB2.0 host channel 3 for r8a7795 with Salvator-XS.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts
index bbf5a8812b70..e231b5a7cbab 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-xs.dts
@@ -56,6 +56,11 @@
status = "okay";
};
+&ehci3 {
+ dr_mode = "otg";
+ status = "okay";
+};
+
&hsusb3 {
dr_mode = "otg";
status = "okay";
@@ -117,6 +122,11 @@
status = "okay";
};
+&ohci3 {
+ dr_mode = "otg";
+ status = "okay";
+};
+
&rcar_sound {
ports {
/* rsnd_port0 is on salvator-common */
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 077/102] arm64: dts: renesas: r8a7795: Correct whitespace
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (75 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 076/102] arm64: dts: renesas: r8a7795: salvator-xs: enable USB2.0 host channel 3 Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 078/102] arm64: dts: renesas: r8a7796: " Simon Horman
` (25 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Add missing spaces after commas.
Replace 8 consecutive spaces by a TAB.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 9b080a864ea1..91486b4910ce 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -132,7 +132,7 @@
};
a57_1: cpu at 1 {
- compatible = "arm,cortex-a57","arm,armv8";
+ compatible = "arm,cortex-a57", "arm,armv8";
reg = <0x1>;
device_type = "cpu";
power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
@@ -144,7 +144,7 @@
};
a57_2: cpu at 2 {
- compatible = "arm,cortex-a57","arm,armv8";
+ compatible = "arm,cortex-a57", "arm,armv8";
reg = <0x2>;
device_type = "cpu";
power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
@@ -156,7 +156,7 @@
};
a57_3: cpu at 3 {
- compatible = "arm,cortex-a57","arm,armv8";
+ compatible = "arm,cortex-a57", "arm,armv8";
reg = <0x3>;
device_type = "cpu";
power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
@@ -179,7 +179,7 @@
};
a53_1: cpu at 101 {
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x101>;
device_type = "cpu";
power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
@@ -190,7 +190,7 @@
};
a53_2: cpu at 102 {
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x102>;
device_type = "cpu";
power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
@@ -201,7 +201,7 @@
};
a53_3: cpu at 103 {
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x103>;
device_type = "cpu";
power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
@@ -262,7 +262,7 @@
pmu_a57 {
compatible = "arm,cortex-a57-pmu";
interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
- <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&a57_0>,
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 078/102] arm64: dts: renesas: r8a7796: Correct whitespace
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (76 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 077/102] arm64: dts: renesas: r8a7795: Correct whitespace Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 079/102] arm64: dts: renesas: r8a77965: " Simon Horman
` (24 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Add missing spaces after commas.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 3fbd86590fb0..6ffab2da07cb 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -143,7 +143,7 @@
};
a57_1: cpu at 1 {
- compatible = "arm,cortex-a57","arm,armv8";
+ compatible = "arm,cortex-a57", "arm,armv8";
reg = <0x1>;
device_type = "cpu";
power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
@@ -166,7 +166,7 @@
};
a53_1: cpu at 101 {
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x101>;
device_type = "cpu";
power-domains = <&sysc R8A7796_PD_CA53_CPU1>;
@@ -177,7 +177,7 @@
};
a53_2: cpu at 102 {
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x102>;
device_type = "cpu";
power-domains = <&sysc R8A7796_PD_CA53_CPU2>;
@@ -188,7 +188,7 @@
};
a53_3: cpu at 103 {
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53", "arm,armv8";
reg = <0x103>;
device_type = "cpu";
power-domains = <&sysc R8A7796_PD_CA53_CPU3>;
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 079/102] arm64: dts: renesas: r8a77965: Correct whitespace
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (77 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 078/102] arm64: dts: renesas: r8a7796: " Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 080/102] arm64: dts: renesas: ulcb: Add BD9571 PMIC Simon Horman
` (23 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Add missing space after comma.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index b93281affd63..ba0edda431a5 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -67,7 +67,7 @@
};
a57_1: cpu at 1 {
- compatible = "arm,cortex-a57","arm,armv8";
+ compatible = "arm,cortex-a57", "arm,armv8";
reg = <0x1>;
device_type = "cpu";
power-domains = <&sysc R8A77965_PD_CA57_CPU1>;
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 080/102] arm64: dts: renesas: ulcb: Add BD9571 PMIC
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (78 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 079/102] arm64: dts: renesas: r8a77965: " Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 081/102] arm64: dts: renesas: salvator-common: Add PMIC DDR Backup Power config Simon Horman
` (22 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Add a device node for the ROHM BD9571MWV PMIC.
This was based on the example in the DT binding documentation, but using
IRQ0 instead of a GPIO interrupt, as that matches the schematics, and
because INTC-EX is a simpler block.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/ulcb.dtsi | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
index 93402783d52f..ee4249287fbd 100644
--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
@@ -243,6 +243,30 @@
&i2c_dvfs {
status = "okay";
+
+ pmic: pmic at 30 {
+ pinctrl-0 = <&irq0_pins>;
+ pinctrl-names = "default";
+
+ compatible = "rohm,bd9571mwv";
+ reg = <0x30>;
+ interrupt-parent = <&intc_ex>;
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ regulators {
+ dvfs: dvfs {
+ regulator-name = "dvfs";
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <1030000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ };
+ };
};
&ohci1 {
@@ -276,6 +300,11 @@
function = "i2c2";
};
+ irq0_pins: irq0 {
+ groups = "intc_ex_irq0";
+ function = "intc_ex";
+ };
+
scif2_pins: scif2 {
groups = "scif2_data_a";
function = "scif2";
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 081/102] arm64: dts: renesas: salvator-common: Add PMIC DDR Backup Power config
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (79 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 080/102] arm64: dts: renesas: ulcb: Add BD9571 PMIC Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 082/102] arm64: dts: renesas: ulcb: " Simon Horman
` (21 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
On Salvator-X(S), all of the DDR0, DDR1, DDR0C, and DDR1C power rails
need to be kept powered when backup mode is enabled. Reflect this in
the "rohm,ddr-backup-power" property for the BD9571MWV PMIC node.
The accessory power switch (SW23) is a toggle switch, hence specify
"rohm,rstbmode-level".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/salvator-common.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
index 803220a02f50..96b51e572666 100644
--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
@@ -374,6 +374,8 @@
#interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
+ rohm,ddr-backup-power = <0xf>;
+ rohm,rstbmode-level;
regulators {
dvfs: dvfs {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 082/102] arm64: dts: renesas: ulcb: Add PMIC DDR Backup Power config
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (80 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 081/102] arm64: dts: renesas: salvator-common: Add PMIC DDR Backup Power config Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 083/102] arm64: dts: renesas: r8a77965: Add SDHI device nodes Simon Horman
` (20 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
On the R-Car Starter Kit Premier/Pro, all of the DDR0, DDR1, DDR0C, and
DDR1C power rails need to be kept powered when backup mode is enabled.
Reflect this in the "rohm,ddr-backup-power" property for the BD9571MWV
PMIC node.
The accessory power switch (SW8) is a momentary switch, hense specify
"rohm,rstbmode-pulse".
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/ulcb.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi
index ee4249287fbd..0edb16e6b372 100644
--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
@@ -256,6 +256,8 @@
#interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
+ rohm,ddr-backup-power = <0xf>;
+ rohm,rstbmode-pulse;
regulators {
dvfs: dvfs {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 083/102] arm64: dts: renesas: r8a77965: Add SDHI device nodes
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (81 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 082/102] arm64: dts: renesas: ulcb: " Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 084/102] arm64: dts: renesas: r8a77970: Add secondary CA53 CPU core Simon Horman
` (19 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Add SDHI nodes to the DT of the r8a77965 SoC.
Based on several similar patches of the R8A7796 device tree
by Simon Horman <horms+renesas@verge.net.au>.
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 36 +++++++++++++++++++++++++++----
1 file changed, 32 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index ba0edda431a5..f51c1b2cbae4 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -978,23 +978,51 @@
};
sdhi0: sd at ee100000 {
+ compatible = "renesas,sdhi-r8a77965",
+ "renesas,rcar-gen3-sdhi";
reg = <0 0xee100000 0 0x2000>;
- /* placeholder */
+ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 314>;
+ max-frequency = <200000000>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 314>;
+ status = "disabled";
};
sdhi1: sd at ee120000 {
+ compatible = "renesas,sdhi-r8a77965",
+ "renesas,rcar-gen3-sdhi";
reg = <0 0xee120000 0 0x2000>;
- /* placeholder */
+ interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 313>;
+ max-frequency = <200000000>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 313>;
+ status = "disabled";
};
sdhi2: sd at ee140000 {
+ compatible = "renesas,sdhi-r8a77965",
+ "renesas,rcar-gen3-sdhi";
reg = <0 0xee140000 0 0x2000>;
- /* placeholder */
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 312>;
+ max-frequency = <200000000>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 312>;
+ status = "disabled";
};
sdhi3: sd at ee160000 {
+ compatible = "renesas,sdhi-r8a77965",
+ "renesas,rcar-gen3-sdhi";
reg = <0 0xee160000 0 0x2000>;
- /* placeholder */
+ interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 311>;
+ max-frequency = <200000000>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 311>;
+ status = "disabled";
};
gic: interrupt-controller at f1010000 {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 084/102] arm64: dts: renesas: r8a77970: Add secondary CA53 CPU core
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (82 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 083/102] arm64: dts: renesas: r8a77965: Add SDHI device nodes Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 085/102] arm64: dts: renesas: r8a77970: Add Cortex-A53 PMU node Simon Horman
` (18 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Add a device node for the second Cortex-A53 CPU core on the Renesas
R-Car V3M (r8a77970) SoC, and adjust the interrupt delivery masks for
ARM Generic Interrupt Controller and Architectured Timer.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 20 +++++++++++++++-----
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index 37b843c0677a..1efaad71804d 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -41,6 +41,16 @@
enable-method = "psci";
};
+ a53_1: cpu at 1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a53", "arm,armv8";
+ reg = <1>;
+ clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
+ power-domains = <&sysc R8A77970_PD_CA53_CPU1>;
+ next-level-cache = <&L2_CA53>;
+ enable-method = "psci";
+ };
+
L2_CA53: cache-controller {
compatible = "cache";
power-domains = <&sysc R8A77970_PD_CA53_SCU>;
@@ -635,7 +645,7 @@
<0 0xf1020000 0 0x20000>,
<0 0xf1040000 0 0x20000>,
<0 0xf1060000 0 0x20000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) |
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
@@ -726,9 +736,9 @@
timer {
compatible = "arm,armv8-timer";
- interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
- <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>;
+ interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 085/102] arm64: dts: renesas: r8a77970: Add Cortex-A53 PMU node
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (83 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 084/102] arm64: dts: renesas: r8a77970: Add secondary CA53 CPU core Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 086/102] arm64: dts: renesas: r8a77980: add resets property to CAN-FD node Simon Horman
` (17 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Geert Uytterhoeven <geert+renesas@glider.be>
Enable the performance monitor unit for the Cortex-A53 cores on the
R-Car V3M (r8a77970) SoC.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index 1efaad71804d..50046405d348 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -73,6 +73,13 @@
clock-frequency = <0>;
};
+ pmu_a53 {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+ <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&a53_0>, <&a53_1>;
+ };
+
psci {
compatible = "arm,psci-1.0", "arm,psci-0.2";
method = "smc";
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 086/102] arm64: dts: renesas: r8a77980: add resets property to CAN-FD node
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (84 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 085/102] arm64: dts: renesas: r8a77970: Add Cortex-A53 PMU node Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 087/102] arm64: dts: renesas: r8a77995: Add VIN4 Simon Horman
` (16 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
Add resets property to CAN-FD node to describe it in the reset topology of
on-SoC devices. This allows to reset the CAN-FD device using the Reset
Controller API.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
index 3a127643d1dc..32db26f2c8b5 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -190,6 +190,7 @@
assigned-clocks = <&cpg CPG_CORE R8A77980_CLK_CANFD>;
assigned-clock-rates = <40000000>;
power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+ resets = <&cpg 914>;
status = "disabled";
channel0 {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 087/102] arm64: dts: renesas: r8a77995: Add VIN4
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (85 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 086/102] arm64: dts: renesas: r8a77980: add resets property to CAN-FD node Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 088/102] arm64: dts: renesas: r8a77970: disable EtherAVB Simon Horman
` (15 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Jacopo Mondi <jacopo+renesas@jmondi.org>
Describe VIN4 interface for R-Car D3 R8A77995 SoC.
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Acked-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
[simon: sorted node by bus address]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
index ba98865b0c9b..2506f46293e8 100644
--- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
@@ -610,6 +610,17 @@
status = "disabled";
};
+ vin4: video at e6ef4000 {
+ compatible = "renesas,vin-r8a77995";
+ reg = <0 0xe6ef4000 0 0x1000>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 807>;
+ power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 807>;
+ renesas,id = <4>;
+ status = "disabled";
+ };
+
ohci0: usb at ee080000 {
compatible = "generic-ohci";
reg = <0 0xee080000 0 0x100>;
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 088/102] arm64: dts: renesas: r8a77970: disable EtherAVB
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (86 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 087/102] arm64: dts: renesas: r8a77995: Add VIN4 Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 089/102] arm64: dts: renesas: r8a77980: " Simon Horman
` (14 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
When adding the R8A77970 EtherAVB device I failed to notice that it does
not have the usual "status" property disabling the described devices in
anticipation that the board device trees enable the devices according to
their needs. This causes the EtherAVB driver to successfully probe despite
e.g. the needed pins not having been configured -- luckily, "eth<n>" device
can't be opened anyway...
Fixes: bea2ab136eaa ("arm64: dts: renesas: r8a77970: add EtherAVB support")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index 50046405d348..c8464d1ef1b2 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -473,6 +473,7 @@
iommus = <&ipmmu_rt 3>;
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
scif0: serial at e6e60000 {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 089/102] arm64: dts: renesas: r8a77980: disable EtherAVB
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (87 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 088/102] arm64: dts: renesas: r8a77970: disable EtherAVB Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 090/102] arm64: dts: renesas: initial V3HSK board device tree Simon Horman
` (13 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
When adding the R8A77980 EtherAVB device I failed to notice that it does
not have the usual "status" property disabling the described devices in
anticipation that the board device trees enable the devices according to
their needs. This causes the EtherAVB driver to successfully probe despite
e.g. the needed pins not having been configured -- luckily, "eth<n>" device
can't be opened anyway...
Fixes: bf6f90832f81 ("arm64: dts: renesas: r8a77980: add EtherAVB support")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
index 32db26f2c8b5..4c40f9f0ebc9 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -244,6 +244,7 @@
phy-mode = "rgmii";
#address-cells = <1>;
#size-cells = <0>;
+ status = "disabled";
};
scif0: serial at e6e60000 {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 090/102] arm64: dts: renesas: initial V3HSK board device tree
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (88 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 089/102] arm64: dts: renesas: r8a77980: " Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 091/102] arm64: dts: renesas: r8a77990: Add PFC device node Simon Horman
` (12 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Add the initial device tree for the V3H Starter Kit board.
The board has 1 debug serial port (SCIF0); include support for it,
so that the serial console can work.
Based on the original (and large) patch by Vladimir Barinov.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/Makefile | 2 +-
arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts | 60 ++++++++++++++++++++++++++
2 files changed, 61 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts
diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile
index a235961c6532..9e2394bc3c62 100644
--- a/arch/arm64/boot/dts/renesas/Makefile
+++ b/arch/arm64/boot/dts/renesas/Makefile
@@ -9,6 +9,6 @@ dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-m3ulcb-kf.dtb
dtb-$(CONFIG_ARCH_R8A7796) += r8a7796-salvator-xs.dtb
dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-salvator-x.dtb r8a77965-salvator-xs.dtb
dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb r8a77970-v3msk.dtb
-dtb-$(CONFIG_ARCH_R8A77980) += r8a77980-condor.dtb
+dtb-$(CONFIG_ARCH_R8A77980) += r8a77980-condor.dtb r8a77980-v3hsk.dtb
dtb-$(CONFIG_ARCH_R8A77990) += r8a77990-ebisu.dtb
dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb
diff --git a/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts b/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts
new file mode 100644
index 000000000000..c9680994555d
--- /dev/null
+++ b/arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts
@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the V3H Starter Kit board
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ * Copyright (C) 2018 Cogent Embedded, Inc.
+ */
+
+/dts-v1/;
+#include "r8a77980.dtsi"
+
+/ {
+ model = "Renesas V3H Starter Kit board";
+ compatible = "renesas,v3hsk", "renesas,r8a77980";
+
+ aliases {
+ serial0 = &scif0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory at 48000000 {
+ device_type = "memory";
+ /* first 128MB is reserved for secure area. */
+ reg = <0 0x48000000 0 0x78000000>;
+ };
+};
+
+&extal_clk {
+ clock-frequency = <16666666>;
+};
+
+&extalr_clk {
+ clock-frequency = <32768>;
+};
+
+&pfc {
+ scif0_pins: scif0 {
+ groups = "scif0_data";
+ function = "scif0";
+ };
+
+ scif_clk_pins: scif_clk {
+ groups = "scif_clk_b";
+ function = "scif_clk";
+ };
+};
+
+&scif0 {
+ pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&scif_clk {
+ clock-frequency = <14745600>;
+};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 091/102] arm64: dts: renesas: r8a77990: Add PFC device node
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (89 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 090/102] arm64: dts: renesas: initial V3HSK board device tree Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 092/102] arm64: dts: renesas: r8a77990: Add GPIO device nodes Simon Horman
` (11 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds PFC device node for r8a77990 (R-Car E3).
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index 46580290b7fb..efc3c0ba36c2 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -60,6 +60,11 @@
#size-cells = <2>;
ranges;
+ pfc: pin-controller at e6060000 {
+ compatible = "renesas,pfc-r8a77990";
+ reg = <0 0xe6060000 0 0x508>;
+ };
+
cpg: clock-controller at e6150000 {
compatible = "renesas,r8a77990-cpg-mssr";
reg = <0 0xe6150000 0 0x1000>;
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 092/102] arm64: dts: renesas: r8a77990: Add GPIO device nodes
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (90 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 091/102] arm64: dts: renesas: r8a77990: Add PFC device node Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 093/102] arm64: dts: renesas: r8a77990: Add EthernetAVB " Simon Horman
` (10 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds GPIO nodes for r8a77990 (R-Car E3).
Based on a patch from Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
[simon: dropped use of deprecated "renesas,gpio-rcar"]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 105 ++++++++++++++++++++++++++++++
1 file changed, 105 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index efc3c0ba36c2..bbc3db50bc01 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -60,6 +60,111 @@
#size-cells = <2>;
ranges;
+ gpio0: gpio at e6050000 {
+ compatible = "renesas,gpio-r8a77990",
+ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6050000 0 0x50>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 18>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 912>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 912>;
+ };
+
+ gpio1: gpio at e6051000 {
+ compatible = "renesas,gpio-r8a77990",
+ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6051000 0 0x50>;
+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 23>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 911>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 911>;
+ };
+
+ gpio2: gpio at e6052000 {
+ compatible = "renesas,gpio-r8a77990",
+ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6052000 0 0x50>;
+ interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 26>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 910>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 910>;
+ };
+
+ gpio3: gpio at e6053000 {
+ compatible = "renesas,gpio-r8a77990",
+ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6053000 0 0x50>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 16>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 909>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 909>;
+ };
+
+ gpio4: gpio at e6054000 {
+ compatible = "renesas,gpio-r8a77990",
+ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6054000 0 0x50>;
+ interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 11>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 908>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 908>;
+ };
+
+ gpio5: gpio at e6055000 {
+ compatible = "renesas,gpio-r8a77990",
+ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6055000 0 0x50>;
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 160 20>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 907>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 907>;
+ };
+
+ gpio6: gpio at e6055400 {
+ compatible = "renesas,gpio-r8a77990",
+ "renesas,rcar-gen3-gpio";
+ reg = <0 0xe6055400 0 0x50>;
+ interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 192 18>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ clocks = <&cpg CPG_MOD 906>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 906>;
+ };
+
pfc: pin-controller at e6060000 {
compatible = "renesas,pfc-r8a77990";
reg = <0 0xe6060000 0 0x508>;
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 093/102] arm64: dts: renesas: r8a77990: Add EthernetAVB device nodes
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (91 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 092/102] arm64: dts: renesas: r8a77990: Add GPIO device nodes Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 094/102] arm64: dts: renesas: r8a77990: ebisu: Enable EthernetAVB Simon Horman
` (9 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch adds EthernetAVB node for r8a77990 (R-Car E3).
Based on a patch from Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 45 +++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
index bbc3db50bc01..be4f519711a1 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi
@@ -191,6 +191,51 @@
#power-domain-cells = <1>;
};
+ avb: ethernet at e6800000 {
+ compatible = "renesas,etheravb-r8a77990",
+ "renesas,etheravb-rcar-gen3";
+ reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ch0", "ch1", "ch2", "ch3",
+ "ch4", "ch5", "ch6", "ch7",
+ "ch8", "ch9", "ch10", "ch11",
+ "ch12", "ch13", "ch14", "ch15",
+ "ch16", "ch17", "ch18", "ch19",
+ "ch20", "ch21", "ch22", "ch23",
+ "ch24";
+ clocks = <&cpg CPG_MOD 812>;
+ power-domains = <&sysc 32>;
+ resets = <&cpg 812>;
+ phy-mode = "rgmii";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
scif2: serial at e6e88000 {
compatible = "renesas,scif-r8a77990",
"renesas,rcar-gen3-scif", "renesas,scif";
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 094/102] arm64: dts: renesas: r8a77990: ebisu: Enable EthernetAVB
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (92 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 093/102] arm64: dts: renesas: r8a77990: Add EthernetAVB " Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 095/102] arm64: dts: renesas: r8a77965: add I2C support Simon Horman
` (8 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
This patch enables EthernetAVB for r8a77990 Ebisu board.
Based on a patch from Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts | 28 ++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
index 63ee1347bb19..7a09d0524f9b 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
@@ -7,6 +7,7 @@
/dts-v1/;
#include "r8a77990.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "Renesas Ebisu board based on r8a77990";
@@ -14,6 +15,7 @@
aliases {
serial0 = &scif2;
+ ethernet0 = &avb;
};
chosen {
@@ -28,10 +30,36 @@
};
};
+&avb {
+ pinctrl-0 = <&avb_pins>;
+ pinctrl-names = "default";
+ renesas,no-ether-link;
+ phy-handle = <&phy0>;
+ phy-mode = "rgmii-txid";
+ status = "okay";
+
+ phy0: ethernet-phy at 0 {
+ rxc-skew-ps = <1500>;
+ reg = <0>;
+ interrupt-parent = <&gpio2>;
+ interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
+ reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
+ };
+};
+
&extal_clk {
clock-frequency = <48000000>;
};
+&pfc {
+ avb_pins: avb {
+ mux {
+ groups = "avb_link", "avb_mii";
+ function = "avb";
+ };
+ };
+};
+
&scif2 {
status = "okay";
};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 095/102] arm64: dts: renesas: r8a77965: add I2C support
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (93 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 094/102] arm64: dts: renesas: r8a77990: ebisu: Enable EthernetAVB Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 096/102] arm64: dts: renesas: r8a7795: add VIN and CSI-2 nodes Simon Horman
` (7 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 99 ++++++++++++++++++++++++++++---
1 file changed, 90 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index f51c1b2cbae4..1f67aea49305 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -20,6 +20,13 @@
#size-cells = <2>;
aliases {
+ i2c0 = &i2c0;
+ i2c1 = &i2c1;
+ i2c2 = &i2c2;
+ i2c3 = &i2c3;
+ i2c4 = &i2c4;
+ i2c5 = &i2c5;
+ i2c6 = &i2c6;
i2c7 = &i2c_dvfs;
};
@@ -314,44 +321,118 @@
};
i2c0: i2c at e6500000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a77965",
+ "renesas,rcar-gen3-i2c";
reg = <0 0xe6500000 0 0x40>;
- /* placeholder */
+ interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 931>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 931>;
+ dmas = <&dmac1 0x91>, <&dmac1 0x90>,
+ <&dmac2 0x91>, <&dmac2 0x90>;
+ dma-names = "tx", "rx", "tx", "rx";
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
};
i2c1: i2c at e6508000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a77965",
+ "renesas,rcar-gen3-i2c";
reg = <0 0xe6508000 0 0x40>;
- /* placeholder */
+ interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 930>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 930>;
+ dmas = <&dmac1 0x93>, <&dmac1 0x92>,
+ <&dmac2 0x93>, <&dmac2 0x92>;
+ dma-names = "tx", "rx", "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
};
i2c2: i2c at e6510000 {
#address-cells = <1>;
#size-cells = <0>;
-
+ compatible = "renesas,i2c-r8a77965",
+ "renesas,rcar-gen3-i2c";
reg = <0 0xe6510000 0 0x40>;
- /* placeholder */
+ interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 929>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 929>;
+ dmas = <&dmac1 0x95>, <&dmac1 0x94>,
+ <&dmac2 0x95>, <&dmac2 0x94>;
+ dma-names = "tx", "rx", "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
};
i2c3: i2c at e66d0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a77965",
+ "renesas,rcar-gen3-i2c";
reg = <0 0xe66d0000 0 0x40>;
- /* placeholder */
+ interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 928>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 928>;
+ dmas = <&dmac0 0x97>, <&dmac0 0x96>;
+ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
};
i2c4: i2c at e66d8000 {
#address-cells = <1>;
#size-cells = <0>;
-
+ compatible = "renesas,i2c-r8a77965",
+ "renesas,rcar-gen3-i2c";
reg = <0 0xe66d8000 0 0x40>;
- /* placeholder */
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 927>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 927>;
+ dmas = <&dmac0 0x99>, <&dmac0 0x98>;
+ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
};
i2c5: i2c at e66e0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a77965",
+ "renesas,rcar-gen3-i2c";
reg = <0 0xe66e0000 0 0x40>;
- /* placeholder */
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 919>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 919>;
+ dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
+ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <110>;
+ status = "disabled";
};
i2c6: i2c at e66e8000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "renesas,i2c-r8a77965",
+ "renesas,rcar-gen3-i2c";
reg = <0 0xe66e8000 0 0x40>;
- /* placeholder */
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 918>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 918>;
+ dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
+ dma-names = "tx", "rx";
+ i2c-scl-internal-delay-ns = <6>;
+ status = "disabled";
};
i2c_dvfs: i2c at e60b0000 {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 096/102] arm64: dts: renesas: r8a7795: add VIN and CSI-2 nodes
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (94 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 095/102] arm64: dts: renesas: r8a77965: add I2C support Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:15 ` [PATCH 097/102] arm64: dts: renesas: r8a7795-es1: add CSI-2 node Simon Horman
` (6 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 389 +++++++++++++++++++++++++++++++
1 file changed, 389 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 91486b4910ce..d842940b2f43 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1397,6 +1397,262 @@
status = "disabled";
};
+ vin0: video at e6ef0000 {
+ compatible = "renesas,vin-r8a7795";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
+ renesas,id = <0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin0csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin0>;
+ };
+ vin0csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin0>;
+ };
+ };
+ };
+ };
+
+ vin1: video at e6ef1000 {
+ compatible = "renesas,vin-r8a7795";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
+ renesas,id = <1>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin1csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin1>;
+ };
+ vin1csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin1>;
+ };
+ };
+ };
+ };
+
+ vin2: video at e6ef2000 {
+ compatible = "renesas,vin-r8a7795";
+ reg = <0 0xe6ef2000 0 0x1000>;
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 809>;
+ renesas,id = <2>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin2csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin2>;
+ };
+ vin2csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin2>;
+ };
+ };
+ };
+ };
+
+ vin3: video at e6ef3000 {
+ compatible = "renesas,vin-r8a7795";
+ reg = <0 0xe6ef3000 0 0x1000>;
+ interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 808>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 808>;
+ renesas,id = <3>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin3csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin3>;
+ };
+ vin3csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin3>;
+ };
+ };
+ };
+ };
+
+ vin4: video at e6ef4000 {
+ compatible = "renesas,vin-r8a7795";
+ reg = <0 0xe6ef4000 0 0x1000>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 807>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 807>;
+ renesas,id = <4>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin4csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin4>;
+ };
+ vin4csi41: endpoint at 3 {
+ reg = <3>;
+ remote-endpoint= <&csi41vin4>;
+ };
+ };
+ };
+ };
+
+ vin5: video at e6ef5000 {
+ compatible = "renesas,vin-r8a7795";
+ reg = <0 0xe6ef5000 0 0x1000>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 806>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 806>;
+ renesas,id = <5>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin5csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin5>;
+ };
+ vin5csi41: endpoint at 3 {
+ reg = <3>;
+ remote-endpoint= <&csi41vin5>;
+ };
+ };
+ };
+ };
+
+ vin6: video at e6ef6000 {
+ compatible = "renesas,vin-r8a7795";
+ reg = <0 0xe6ef6000 0 0x1000>;
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 805>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 805>;
+ renesas,id = <6>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin6csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin6>;
+ };
+ vin6csi41: endpoint at 3 {
+ reg = <3>;
+ remote-endpoint= <&csi41vin6>;
+ };
+ };
+ };
+ };
+
+ vin7: video at e6ef7000 {
+ compatible = "renesas,vin-r8a7795";
+ reg = <0 0xe6ef7000 0 0x1000>;
+ interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 804>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 804>;
+ renesas,id = <7>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin7csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin7>;
+ };
+ vin7csi41: endpoint at 3 {
+ reg = <3>;
+ remote-endpoint= <&csi41vin7>;
+ };
+ };
+ };
+ };
+
drif00: rif at e6f40000 {
compatible = "renesas,r8a7795-drif",
"renesas,rcar-gen3-drif";
@@ -2327,6 +2583,139 @@
renesas,fcp = <&fcpvi1>;
};
+ csi20: csi2 at fea80000 {
+ compatible = "renesas,r8a7795-csi2";
+ reg = <0 0xfea80000 0 0x10000>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 714>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 714>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ csi20vin0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&vin0csi20>;
+ };
+ csi20vin1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&vin1csi20>;
+ };
+ csi20vin2: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint = <&vin2csi20>;
+ };
+ csi20vin3: endpoint at 3 {
+ reg = <3>;
+ remote-endpoint = <&vin3csi20>;
+ };
+ csi20vin4: endpoint at 4 {
+ reg = <4>;
+ remote-endpoint = <&vin4csi20>;
+ };
+ csi20vin5: endpoint at 5 {
+ reg = <5>;
+ remote-endpoint = <&vin5csi20>;
+ };
+ csi20vin6: endpoint at 6 {
+ reg = <6>;
+ remote-endpoint = <&vin6csi20>;
+ };
+ csi20vin7: endpoint at 7 {
+ reg = <7>;
+ remote-endpoint = <&vin7csi20>;
+ };
+ };
+ };
+ };
+
+ csi40: csi2 at feaa0000 {
+ compatible = "renesas,r8a7795-csi2";
+ reg = <0 0xfeaa0000 0 0x10000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 716>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 716>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ csi40vin0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&vin0csi40>;
+ };
+ csi40vin1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&vin1csi40>;
+ };
+ csi40vin2: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint = <&vin2csi40>;
+ };
+ csi40vin3: endpoint at 3 {
+ reg = <3>;
+ remote-endpoint = <&vin3csi40>;
+ };
+ };
+ };
+ };
+
+ csi41: csi2 at feab0000 {
+ compatible = "renesas,r8a7795-csi2";
+ reg = <0 0xfeab0000 0 0x10000>;
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 715>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 715>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ csi41vin4: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&vin4csi41>;
+ };
+ csi41vin5: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&vin5csi41>;
+ };
+ csi41vin6: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint = <&vin6csi41>;
+ };
+ csi41vin7: endpoint at 3 {
+ reg = <3>;
+ remote-endpoint = <&vin7csi41>;
+ };
+ };
+ };
+ };
+
hdmi0: hdmi at fead0000 {
compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
reg = <0 0xfead0000 0 0x10000>;
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 097/102] arm64: dts: renesas: r8a7795-es1: add CSI-2 node
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (95 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 096/102] arm64: dts: renesas: r8a7795: add VIN and CSI-2 nodes Simon Horman
@ 2018-05-18 11:15 ` Simon Horman
2018-05-18 11:16 ` [PATCH 098/102] arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes Simon Horman
` (5 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:15 UTC (permalink / raw)
To: linux-arm-kernel
From: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Renesas H3 ES1.0 have one extra CSI-2 node, CSI21 which is not present
for later ES versions of H3.
Signed-off-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 143 +++++++++++++++++++++++++++
1 file changed, 143 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
index 0177f5e60e5a..e19dcd6cb767 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi
@@ -107,6 +107,61 @@
resets = <&cpg 117>;
renesas,fcp = <&fcpf2>;
};
+
+ csi21: csi2 at fea90000 {
+ compatible = "renesas,r8a7795-csi2";
+ reg = <0 0xfea90000 0 0x10000>;
+ interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 713>;
+ power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+ resets = <&cpg 713>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ csi21vin0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&vin0csi21>;
+ };
+ csi21vin1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&vin1csi21>;
+ };
+ csi21vin2: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint = <&vin2csi21>;
+ };
+ csi21vin3: endpoint at 3 {
+ reg = <3>;
+ remote-endpoint = <&vin3csi21>;
+ };
+ csi21vin4: endpoint at 4 {
+ reg = <4>;
+ remote-endpoint = <&vin4csi21>;
+ };
+ csi21vin5: endpoint at 5 {
+ reg = <5>;
+ remote-endpoint = <&vin5csi21>;
+ };
+ csi21vin6: endpoint at 6 {
+ reg = <6>;
+ remote-endpoint = <&vin6csi21>;
+ };
+ csi21vin7: endpoint at 7 {
+ reg = <7>;
+ remote-endpoint = <&vin7csi21>;
+ };
+ };
+ };
+ };
};
&gpio1 {
@@ -174,3 +229,91 @@
&du {
vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
};
+
+&vin0 {
+ ports {
+ port at 1 {
+ vin0csi21: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint= <&csi21vin0>;
+ };
+ };
+ };
+};
+
+&vin1 {
+ ports {
+ port at 1 {
+ vin1csi21: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint= <&csi21vin1>;
+ };
+ };
+ };
+};
+
+&vin2 {
+ ports {
+ port at 1 {
+ vin2csi21: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint= <&csi21vin2>;
+ };
+ };
+ };
+};
+
+&vin3 {
+ ports {
+ port at 1 {
+ vin3csi21: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint= <&csi21vin3>;
+ };
+ };
+ };
+};
+
+&vin4 {
+ ports {
+ port at 1 {
+ vin4csi21: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint= <&csi21vin4>;
+ };
+ };
+ };
+};
+
+&vin5 {
+ ports {
+ port at 1 {
+ vin5csi21: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint= <&csi21vin5>;
+ };
+ };
+ };
+};
+
+&vin6 {
+ ports {
+ port at 1 {
+ vin6csi21: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint= <&csi21vin6>;
+ };
+ };
+ };
+};
+
+&vin7 {
+ ports {
+ port at 1 {
+ vin7csi21: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint= <&csi21vin7>;
+ };
+ };
+ };
+};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 098/102] arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (96 preceding siblings ...)
2018-05-18 11:15 ` [PATCH 097/102] arm64: dts: renesas: r8a7795-es1: add CSI-2 node Simon Horman
@ 2018-05-18 11:16 ` Simon Horman
2018-05-18 11:16 ` [PATCH 099/102] arm64: dts: renesas: r8a77965: " Simon Horman
` (4 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:16 UTC (permalink / raw)
To: linux-arm-kernel
From: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 367 +++++++++++++++++++++++++++++++
1 file changed, 367 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 6ffab2da07cb..7c25be6b5af3 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -1280,6 +1280,262 @@
status = "disabled";
};
+ vin0: video at e6ef0000 {
+ compatible = "renesas,vin-r8a7796";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
+ renesas,id = <0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin0csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin0>;
+ };
+ vin0csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin0>;
+ };
+ };
+ };
+ };
+
+ vin1: video at e6ef1000 {
+ compatible = "renesas,vin-r8a7796";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
+ renesas,id = <1>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin1csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin1>;
+ };
+ vin1csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin1>;
+ };
+ };
+ };
+ };
+
+ vin2: video at e6ef2000 {
+ compatible = "renesas,vin-r8a7796";
+ reg = <0 0xe6ef2000 0 0x1000>;
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 809>;
+ renesas,id = <2>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin2csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin2>;
+ };
+ vin2csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin2>;
+ };
+ };
+ };
+ };
+
+ vin3: video at e6ef3000 {
+ compatible = "renesas,vin-r8a7796";
+ reg = <0 0xe6ef3000 0 0x1000>;
+ interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 808>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 808>;
+ renesas,id = <3>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin3csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin3>;
+ };
+ vin3csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin3>;
+ };
+ };
+ };
+ };
+
+ vin4: video at e6ef4000 {
+ compatible = "renesas,vin-r8a7796";
+ reg = <0 0xe6ef4000 0 0x1000>;
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 807>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 807>;
+ renesas,id = <4>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin4csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin4>;
+ };
+ vin4csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin4>;
+ };
+ };
+ };
+ };
+
+ vin5: video at e6ef5000 {
+ compatible = "renesas,vin-r8a7796";
+ reg = <0 0xe6ef5000 0 0x1000>;
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 806>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 806>;
+ renesas,id = <5>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin5csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin5>;
+ };
+ vin5csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin5>;
+ };
+ };
+ };
+ };
+
+ vin6: video at e6ef6000 {
+ compatible = "renesas,vin-r8a7796";
+ reg = <0 0xe6ef6000 0 0x1000>;
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 805>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 805>;
+ renesas,id = <6>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin6csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin6>;
+ };
+ vin6csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin6>;
+ };
+ };
+ };
+ };
+
+ vin7: video at e6ef7000 {
+ compatible = "renesas,vin-r8a7796";
+ reg = <0 0xe6ef7000 0 0x1000>;
+ interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 804>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 804>;
+ renesas,id = <7>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin7csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin7>;
+ };
+ vin7csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin7>;
+ };
+ };
+ };
+ };
+
drif00: rif at e6f40000 {
compatible = "renesas,r8a7796-drif",
"renesas,rcar-gen3-drif";
@@ -1998,6 +2254,117 @@
renesas,fcp = <&fcpvi0>;
};
+ csi20: csi2 at fea80000 {
+ compatible = "renesas,r8a7796-csi2";
+ reg = <0 0xfea80000 0 0x10000>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 714>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 714>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ csi20vin0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&vin0csi20>;
+ };
+ csi20vin1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&vin1csi20>;
+ };
+ csi20vin2: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint = <&vin2csi20>;
+ };
+ csi20vin3: endpoint at 3 {
+ reg = <3>;
+ remote-endpoint = <&vin3csi20>;
+ };
+ csi20vin4: endpoint at 4 {
+ reg = <4>;
+ remote-endpoint = <&vin4csi20>;
+ };
+ csi20vin5: endpoint at 5 {
+ reg = <5>;
+ remote-endpoint = <&vin5csi20>;
+ };
+ csi20vin6: endpoint at 6 {
+ reg = <6>;
+ remote-endpoint = <&vin6csi20>;
+ };
+ csi20vin7: endpoint at 7 {
+ reg = <7>;
+ remote-endpoint = <&vin7csi20>;
+ };
+ };
+ };
+ };
+
+ csi40: csi2 at feaa0000 {
+ compatible = "renesas,r8a7796-csi2";
+ reg = <0 0xfeaa0000 0 0x10000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 716>;
+ power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
+ resets = <&cpg 716>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ csi40vin0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&vin0csi40>;
+ };
+ csi40vin1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&vin1csi40>;
+ };
+ csi40vin2: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint = <&vin2csi40>;
+ };
+ csi40vin3: endpoint at 3 {
+ reg = <3>;
+ remote-endpoint = <&vin3csi40>;
+ };
+ csi40vin4: endpoint at 4 {
+ reg = <4>;
+ remote-endpoint = <&vin4csi40>;
+ };
+ csi40vin5: endpoint at 5 {
+ reg = <5>;
+ remote-endpoint = <&vin5csi40>;
+ };
+ csi40vin6: endpoint at 6 {
+ reg = <6>;
+ remote-endpoint = <&vin6csi40>;
+ };
+ csi40vin7: endpoint at 7 {
+ reg = <7>;
+ remote-endpoint = <&vin7csi40>;
+ };
+ };
+
+ };
+ };
+
hdmi0: hdmi at fead0000 {
compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi";
reg = <0 0xfead0000 0 0x10000>;
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18
@ 2018-05-18 11:16 Simon Horman
2018-05-18 11:14 ` [PATCH 001/102] arm64: dts: renesas: r8a77965: add usb2_phy nodes Simon Horman
` (102 more replies)
0 siblings, 103 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:16 UTC (permalink / raw)
To: linux-arm-kernel
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these Renesas ARM64 based SoC DT updates for v4.18.
The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
are available in the git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-arm64-dt-for-v4.18
for you to fetch changes up to 908001d778eba06ee1d832863d4e9a1e2cfd4746:
arm64: dts: renesas: salvator-common: Add ADV7482 support (2018-05-18 11:52:03 +0200)
----------------------------------------------------------------
Renesas ARM64 Based SoC DT Updates for v4.18
* Cleanups:
- Corresct whitespace
- sort subnodes of the root and soc nodes
* R-Car M3-N (r8a77965) SoC
- Describe MSIOF SPI, PWM, SDHI and I2C devices in DT
- Add thermal support
* R-Car H3 (r8a7795) and R-Car M3-W (r8a7796) SoCs
- Decrease temperature hysteresis
Niklas S?derlund says "... decrease the hysteresis from 2C to 1C for
the two boards we have described upstream. They have no dependencies
and are ready to be accepted if the review is in favor of them."
* R-Car H3 (r8a7795), M3-W (r8a7796) and M3-N (r8a77965) SoCs
- Add address properties to rcar_sound port nodes
The rcar_sound port nodes have unit names and thus should have register
properties.
* R-Car H3 (r8a7795), M3-W (r8a7796) V3M (r8a77970) and D3 (r8a77995) SoCs
- Enable IPMMU devices
Magnus Damm says "Following the policy of using DT to describe the
hardware and not software support state, this series makes sure all
IPMMU devices are enabled in DT for SoCs such as r8a7795, r8a7796,
r8a77970 and r8a77995."
* R-Car M3-N (r8a77965) and V3H (r8a77980) SoCs
- Use sysc binding macros
These can be used now that they are present in Linus's tree.
This is a simple replacement of numeric values with symbolic ones.
- Describe USB2 and USB3 devices in DT
* R-Car V3M (r8a77970) SoC
- Add SMP Support
Geert Uytterhoeven says "This patch series enables SMP support on the
R-Car V3M SoC, by adding the second Cortex-A53 CPU core. It also adds
the performance monitor unit, and links it to both CPU cores."
- Correct IPMMU DS1 bit number
Magnus Damm says "Judging by "R-Car-Gen3-rev0.80" IPMMU IMSSTR register
documentation for [R-Car V3M] the DS1 bit field should be bit 0."
* R-Car V3H (r8a77980) SoC
- Use CPG clock binding macros
These can be used now that they are present in Linus's tree.
This is a simple replacement of numeric values with symbolic ones.
* R-Car V3H (r8a77980) and V3M (r8a77970) SoCs
- Disable EtherAVB
Sergei Shtylov says "I'm fixing the issue in the EtherAVB device nodes
in the R8A779{7|8}0 device trees that missed the "status" prop, usually
disabling the SoC devices in anticipation that the board device trees
enable the devices according to their needs. There should be no issues
with the current R8A779{7|8}0 board device trees, as all of them use
EtherAVB anyway, so I'm sending the patches generated against the
'devel' branch..."
* R-Car D3 (r8a77995) SoC
- Describe VIN4 in DT
* Ebisu board with R-Car E3 (r8a77990) SoC
- Initial support:
+ PSCI
+ CPU (single)
+ Cache controller
+ Main clocks and controller
+ Interrupt controller
+ Timer
+ PMU
+ Reset controller
+ Product register
+ System controller
+ UART for console
* Salvator-XS boards with R-Car H3 (r8a7795) SoC
- Enable USB2.0 channel 3
* Salvator-X and Salvator-XS boards with M3-N (r8a77965) SoC
- Enable DU
Kieran Bingham "This series enables the DU for the M3-N R8A77965 SoC,
and provides output on the VGA and HDMI connectors.
LVDS is not yet supported or tested."
* Salvator-X and Salvator-XS boards with
R-Car H3 (r8a7795), M3-W (r8a7796) and M3-N (r8a77965) SoCs
- Enable nable VIN, CSI-2 and ADV7482
Niklas S?derlund says "This series enable capture for H3, M3-W, M3-N
Salvator-X and Salvator-XS boards. It also adds the VIN and CSI-2 nodes
for V3M, but as the ADV7482 is on the V3M expansion boards I have
chosen not include that enablement in this series."
- Add PMIC DDR Backup Power config
Geert Uytterhoeven says " The ROHM BD9571MWV PMIC on the Renesas
Salvator-X(S) and ULCB development boards supports DDR Backup Power,
which means that the DDR power rails can be kept powered while the main
SoC is powered down.
For this to function correctly, the DDR Backup Power configuration
must be described in DT, which is the topic of this series:
- The first patch adds the missing device node for the BD9571 PMIC on
the ULCB boards,
- The last two patches add DDR Backup Mode configuration for
Salvator-X(S) and ULCB."
- Add EEPROM
Wolfram Sang says "Add the EEPROM found on Salvator-X and -XS boards
for H3, M3-W, and M3-N on the IIC_DVFS bus."
- Enable HDMI Sound
* Salvator-X and Salvator-XS boards with
R-Car H3 (r8a7795), M3-W (r8a7796) and M3-N (r8a77965) SoCs, and
Draak board with R-Car D3 (r8a77995) SoC
- Consistently name EtherAVB mdio pin group
Geert Uytterhoeven says "When initial support was added for R-Car H3,
the MDIO pin was forgotten, and the MDC pin got its own group named
"mdc". During the addition of support for R-Car M3-W, this mistake was
noticed. But as R-Car H3 and M3-W are pin compatible, and can be
mounted on the same boards, the decision was made to just add the MDIO
pin to the existing "mdc" group. Later this was extended to R-Car H3
ES2.0, and M3-N, because of pin compatibility, and to R-Car D3, in the
name of consistency among R-Car Gen3 SoCs.
However, this decision keeps on being questioned when adding new SoC
support. Hence bite the bullet and admit our mistake, and rename the
pin group from "mdc" to "mdio", like on R-Car Gen2 SoCs."
* Ebisu board with R-Car E3 (r8a77990) SoC
- Initial support: Memory, Main crystal, Serial console
- Enable Ethernet
- Revise PSCI node
Yoshihiro Shimoda says "The basic support patch 2d2dbadba421 ("arm64:
dts: renesas: Add Renesas R8A77990 SoC support") lacks the compatible
"arm,psci-1.0" in the psci node."
- Revise cache controller node
Yoshihiro Shimoda says "The cache controller node should not have
unit-addresses and reg properties."
* V3HSK board with R-Car V3H (r8a77980) SoC
- Initial board device tree
Sergei Shtylov says "Add the initial device tree for the V3H Starter
Kit board. The board has 1 debug serial port (SCIF0); include support
for it, so that the serial console can work."
- Enable PFC support and use for EtherAVB
* V3MSK board with R-Car V3M (r8a77970) SoC
- Add DU/LVDS/HDMI support
Sergei Shtylyov says "Define the V3M Starter Kit board dependent part
of the DU and LVDS device nodes. Also add the device nodes for Thine
THC63LVD1024 LVDS decoder and Analog Devices ADV7511W HDMI
transmitter..."
- Enable PFC for EtherAVB
* Condor board with R-Car V3H (r8a77980) SoC
- Enable eMMC
Sergei Shtylyov says "We're adding the R8A77980 MMC (SDHI)
device nodes and then enable eMMC support on the Condor board."
- Enable PFC support and use for EtherAVB and SCIF0
* Eagle board with R-Car V3M (r8a77970) SoC
- Enable HDMI output
* Eagle board with R-Car V3M (r8a77970) SoC and
Condor board with R-Car V3H (r8a77980) SoC
- Enable CAN-FD
Adds the CAN-FD device nodes so the DT SoC files and enables
single channel CAN-FD support in DT board files.
----------------------------------------------------------------
Geert Uytterhoeven (11):
arm64: dts: renesas: draak: Rename EtherAVB "mdc" pin group to "mdio"
arm64: dts: renesas: salvator-common: Rename EtherAVB "mdc" pin group to "mdio"
arm64: dts: renesas: ulcb: Rename EtherAVB "mdc" pin group to "mdio"
arm64: dts: renesas: r8a7795: Correct whitespace
arm64: dts: renesas: r8a7796: Correct whitespace
arm64: dts: renesas: r8a77965: Correct whitespace
arm64: dts: renesas: ulcb: Add BD9571 PMIC
arm64: dts: renesas: salvator-common: Add PMIC DDR Backup Power config
arm64: dts: renesas: ulcb: Add PMIC DDR Backup Power config
arm64: dts: renesas: r8a77970: Add secondary CA53 CPU core
arm64: dts: renesas: r8a77970: Add Cortex-A53 PMU node
Jacopo Mondi (2):
arm64: dts: renesas: eagle: Enable HDMI output
arm64: dts: renesas: r8a77995: Add VIN4
Kieran Bingham (7):
arm64: dts: renesas: r8a77965: Add FCPF and FCPV instances
arm64: dts: renesas: r8a77965: Add VSP instances
arm64: dts: renesas: r8a77965: Populate the DU instance placeholder
arm64: dts: renesas: r8a77965: Add HDMI encoder instance
arm64: dts: renesas: r8a77965-salvator-x: Enable DU external clocks and HDMI
arm64: dts: renesas: r8a77965-salvator-xs: Enable DU external clocks and HDMI
arm64: dts: renesas: salvator-common: Add ADV7482 support
Kuninori Morimoto (8):
arm64: dts: renesas: r8a7795: add HDMI sound support
arm64: dts: renesas: r8a7796: add HDMI sound support
arm64: dts: renesas: salvator-common: use audio-graph-card for Sound
arm64: dts: renesas: r8a7795-es1-salvator-x: enable HDMI sound
arm64: dts: renesas: r8a7795-salvator-xs: enable HDMI sound
arm64: dts: renesas: r8a7796-salvator-xs: enable HDMI sound
arm64: dts: renesas: r8a7795-salvator-x: enable HDMI sound
arm64: dts: renesas: r8a7796-salvator-x: enable HDMI sound
Magnus Damm (5):
arm64: dts: renesas: r8a77970: Update IPMMU DS1 bit number
arm64: dts: renesas: r8a7795: Enable IPMMU devices
arm64: dts: renesas: r8a7796: Enable IPMMU devices
arm64: dts: renesas: r8a77970: Enable IPMMU devices
arm64: dts: renesas: r8a77995: Enable IPMMU devices
Niklas S?derlund (11):
arm64: dts: renesas: r8a7795: decrease temperature hysteresis
arm64: dts: renesas: r8a7796: decrease temperature hysteresis
arm64: dts: renesas: r8a77965: use r8a77965-sysc binding definitions
arm64: dts: renesas: r8a77965: Add R-Car Gen3 thermal support
arm64: dts: renesas: r8a77965: add I2C support
arm64: dts: renesas: r8a7795: add VIN and CSI-2 nodes
arm64: dts: renesas: r8a7795-es1: add CSI-2 node
arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes
arm64: dts: renesas: r8a77965: add VIN and CSI-2 nodes
arm64: dts: renesas: r8a77970: add VIN and CSI-2 nodes
arm64: dts: renesas: salvator-common: enable VIN
Sergei Shtylyov (21):
arm64: dts: renesas: r8a77970: add FCPVD support
arm64: dts: renesas: r8a77970: add VSPD support
arm64: dts: renesas: r8a77970: add DU support
arm64: dts: renesas: r8a77970: add LVDS support
arm64: dts: renesas: eagle: add EtherAVB pins
arm64: dts: renesas: v3msk: add EtherAVB pins
arm64: dts: renesas: r8a77980: add PFC support
arm64: dts: renesas: condor: add SCIF0 pins
arm64: dts: renesas: condor: add EtherAVB pins
arm64: dts: renesas: r8a77980: add MMC support
arm64: dts: renesas: condor: add eMMC support
arm64: dts: renesas: v3msk: add DU/LVDS/HDMI support
arm64: dts: renesas: r8a77980: use CPG core clock macros
arm64: dts: renesas: r8a77980: use SYSC power domain macros
arm64: dts: renesas: r8a77970: add CAN-FD support
arm64: dts: renesas: eagle: add CAN-FD support
arm64: dts: renesas: r8a77980: add CAN-FD support
arm64: dts: renesas: condor: add CAN-FD support
arm64: dts: renesas: r8a77970: disable EtherAVB
arm64: dts: renesas: r8a77980: disable EtherAVB
arm64: dts: renesas: initial V3HSK board device tree
Simon Horman (9):
arm64: dts: renesas: r8a7796: sort subnodes of the root node
arm64: dts: renesas: r8a7796: sort subnodes of the soc node
arm64: dts: renesas: r8a7795: sort subnodes of the root node
arm64: dts: renesas: r8a7795: sort subnodes of the soc node
arm64: dts: renesas: r8a7795-es1: Enable IPMMU devices
arm64: dts: renesas: r8a7795: Add address properties to rcar_sound port nodes
arm64: dts: renesas: r8a7796: Add address properties to rcar_sound port nodes
arm64: dts: renesas: r8a77965: Add address properties to rcar_sound port nodes
arm64: dts: renesas: r8a77980: add resets property to CAN-FD node
Takeshi Kihara (3):
arm64: dts: renesas: r8a77965: Add all MSIOF device nodes
arm64: dts: renesas: Add Renesas Ebisu board support
arm64: dts: renesas: r8a77965: Add SDHI device nodes
Wolfram Sang (1):
arm64: dts: renesas: salvator-common: add eeprom
Yoshihiro Kaneko (5):
arm64: dts: renesas: r8a77995: sort subnodes of the root node
arm64: dts: renesas: r8a77995: sort subnodes of the soc node
arm64: dts: renesas: r8a77965: sort subnodes of the root node
arm64: dts: renesas: r8a77965: sort subnodes of the soc node
arm64: dts: renesas: r8a77970: sort subnodes of the soc node
Yoshihiro Shimoda (19):
arm64: dts: renesas: r8a77965: add usb2_phy nodes
arm64: dts: renesas: r8a77965: add usb3_phy node
arm64: dts: renesas: r8a77965: add USB 2.0 host nodes
arm64: dts: renesas: r8a77965: add usb_dmac nodes
arm64: dts: renesas: r8a77965: add HS-USB node
arm64: dts: renesas: r8a77965: add USB 3.0 host node
arm64: dts: renesas: r8a77965: add USB 3.0 peripheral node
arm64: dts: renesas: r8a77965: Add PWM device nodes
arm64: dts: renesas: Add Renesas R8A77990 Kconfig support
arm64: dts: renesas: Add Renesas R8A77990 SoC support
arm64: dts: renesas: r8a77990: Revise the psci node
arm64: dts: renesas: r8a77990: Revise the cache controller node
arm64: dts: renesas: r8a7795: salvator-xs: enable usb2_phy3 node
arm64: dts: renesas: r8a7795: salvator-xs: enable hsusb channel 3 node
arm64: dts: renesas: r8a7795: salvator-xs: enable USB2.0 host channel 3
arm64: dts: renesas: r8a77990: Add PFC device node
arm64: dts: renesas: r8a77990: Add GPIO device nodes
arm64: dts: renesas: r8a77990: Add EthernetAVB device nodes
arm64: dts: renesas: r8a77990: ebisu: Enable EthernetAVB
arch/arm64/Kconfig.platforms | 6 +
arch/arm64/boot/dts/renesas/Makefile | 3 +-
.../boot/dts/renesas/r8a7795-es1-salvator-x.dts | 46 +
arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 144 +-
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 46 +
.../arm64/boot/dts/renesas/r8a7795-salvator-xs.dts | 85 +
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2499 +++++++++++---------
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 28 +
.../arm64/boot/dts/renesas/r8a7796-salvator-xs.dts | 28 +
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 2395 +++++++++++--------
.../arm64/boot/dts/renesas/r8a77965-salvator-x.dts | 28 +
.../boot/dts/renesas/r8a77965-salvator-xs.dts | 28 +
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 1601 +++++++++----
arch/arm64/boot/dts/renesas/r8a77970-eagle.dts | 116 +
arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts | 137 ++
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 661 ++++--
arch/arm64/boot/dts/renesas/r8a77980-condor.dts | 81 +
arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts | 60 +
arch/arm64/boot/dts/renesas/r8a77980.dtsi | 99 +-
arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts | 65 +
arch/arm64/boot/dts/renesas/r8a77990.dtsi | 281 +++
arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 2 +-
arch/arm64/boot/dts/renesas/r8a77995.dtsi | 730 +++---
arch/arm64/boot/dts/renesas/salvator-common.dtsi | 187 +-
arch/arm64/boot/dts/renesas/ulcb.dtsi | 37 +-
25 files changed, 6324 insertions(+), 3069 deletions(-)
create mode 100644 arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
create mode 100644 arch/arm64/boot/dts/renesas/r8a77990.dtsi
^ permalink raw reply [flat|nested] 107+ messages in thread
* [PATCH 099/102] arm64: dts: renesas: r8a77965: add VIN and CSI-2 nodes
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (97 preceding siblings ...)
2018-05-18 11:16 ` [PATCH 098/102] arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes Simon Horman
@ 2018-05-18 11:16 ` Simon Horman
2018-05-18 11:16 ` [PATCH 100/102] arm64: dts: renesas: r8a77970: " Simon Horman
` (3 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:16 UTC (permalink / raw)
To: linux-arm-kernel
From: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77965.dtsi | 326 +++++++++++++++++++++++++++++-
1 file changed, 316 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
index 1f67aea49305..486aecacb22a 100644
--- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi
@@ -886,43 +886,259 @@
};
vin0: video at e6ef0000 {
+ compatible = "renesas,vin-r8a77965";
reg = <0 0xe6ef0000 0 0x1000>;
- /* placeholder */
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
+ renesas,id = <0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin0csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin0>;
+ };
+ vin0csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin0>;
+ };
+ };
+ };
};
vin1: video at e6ef1000 {
+ compatible = "renesas,vin-r8a77965";
reg = <0 0xe6ef1000 0 0x1000>;
- /* placeholder */
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
+ renesas,id = <1>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin1csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin1>;
+ };
+ vin1csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin1>;
+ };
+ };
+ };
};
vin2: video at e6ef2000 {
+ compatible = "renesas,vin-r8a77965";
reg = <0 0xe6ef2000 0 0x1000>;
- /* placeholder */
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 809>;
+ renesas,id = <2>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin2csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin2>;
+ };
+ vin2csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin2>;
+ };
+ };
+ };
};
vin3: video at e6ef3000 {
+ compatible = "renesas,vin-r8a77965";
reg = <0 0xe6ef3000 0 0x1000>;
- /* placeholder */
+ interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 808>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 808>;
+ renesas,id = <3>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin3csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin3>;
+ };
+ vin3csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin3>;
+ };
+ };
+ };
};
vin4: video at e6ef4000 {
+ compatible = "renesas,vin-r8a77965";
reg = <0 0xe6ef4000 0 0x1000>;
- /* placeholder */
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 807>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 807>;
+ renesas,id = <4>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin4csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin4>;
+ };
+ vin4csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin4>;
+ };
+ };
+ };
};
vin5: video at e6ef5000 {
+ compatible = "renesas,vin-r8a77965";
reg = <0 0xe6ef5000 0 0x1000>;
- /* placeholder */
+ interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 806>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 806>;
+ renesas,id = <5>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin5csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin5>;
+ };
+ vin5csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin5>;
+ };
+ };
+ };
};
vin6: video at e6ef6000 {
+ compatible = "renesas,vin-r8a77965";
reg = <0 0xe6ef6000 0 0x1000>;
- /* placeholder */
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 805>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 805>;
+ renesas,id = <6>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin6csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin6>;
+ };
+ vin6csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin6>;
+ };
+ };
+ };
};
vin7: video at e6ef7000 {
+ compatible = "renesas,vin-r8a77965";
reg = <0 0xe6ef7000 0 0x1000>;
- /* placeholder */
+ interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 804>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 804>;
+ renesas,id = <7>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin7csi20: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint= <&csi20vin7>;
+ };
+ vin7csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin7>;
+ };
+ };
+ };
};
rcar_sound: sound at ec500000 {
@@ -1218,22 +1434,112 @@
};
csi20: csi2 at fea80000 {
+ compatible = "renesas,r8a77965-csi2";
reg = <0 0xfea80000 0 0x10000>;
- /* placeholder */
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 714>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 714>;
+ status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ csi20vin0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&vin0csi20>;
+ };
+ csi20vin1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&vin1csi20>;
+ };
+ csi20vin2: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint = <&vin2csi20>;
+ };
+ csi20vin3: endpoint at 3 {
+ reg = <3>;
+ remote-endpoint = <&vin3csi20>;
+ };
+ csi20vin4: endpoint at 4 {
+ reg = <4>;
+ remote-endpoint = <&vin4csi20>;
+ };
+ csi20vin5: endpoint at 5 {
+ reg = <5>;
+ remote-endpoint = <&vin5csi20>;
+ };
+ csi20vin6: endpoint at 6 {
+ reg = <6>;
+ remote-endpoint = <&vin6csi20>;
+ };
+ csi20vin7: endpoint at 7 {
+ reg = <7>;
+ remote-endpoint = <&vin7csi20>;
+ };
+ };
};
};
csi40: csi2 at feaa0000 {
+ compatible = "renesas,r8a77965-csi2";
reg = <0 0xfeaa0000 0 0x10000>;
- /* placeholder */
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 716>;
+ power-domains = <&sysc R8A77965_PD_ALWAYS_ON>;
+ resets = <&cpg 716>;
+ status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ csi40vin0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&vin0csi40>;
+ };
+ csi40vin1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&vin1csi40>;
+ };
+ csi40vin2: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint = <&vin2csi40>;
+ };
+ csi40vin3: endpoint at 3 {
+ reg = <3>;
+ remote-endpoint = <&vin3csi40>;
+ };
+ csi40vin4: endpoint at 4 {
+ reg = <4>;
+ remote-endpoint = <&vin4csi40>;
+ };
+ csi40vin5: endpoint at 5 {
+ reg = <5>;
+ remote-endpoint = <&vin5csi40>;
+ };
+ csi40vin6: endpoint at 6 {
+ reg = <6>;
+ remote-endpoint = <&vin6csi40>;
+ };
+ csi40vin7: endpoint at 7 {
+ reg = <7>;
+ remote-endpoint = <&vin7csi40>;
+ };
+ };
};
};
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 100/102] arm64: dts: renesas: r8a77970: add VIN and CSI-2 nodes
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (98 preceding siblings ...)
2018-05-18 11:16 ` [PATCH 099/102] arm64: dts: renesas: r8a77965: " Simon Horman
@ 2018-05-18 11:16 ` Simon Horman
2018-05-18 11:16 ` [PATCH 101/102] arm64: dts: renesas: salvator-common: enable VIN Simon Horman
` (2 subsequent siblings)
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:16 UTC (permalink / raw)
To: linux-arm-kernel
From: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 152 ++++++++++++++++++++++++++++++
1 file changed, 152 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index c8464d1ef1b2..98a2317a16c4 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -547,6 +547,119 @@
status = "disabled";
};
+
+ vin0: video at e6ef0000 {
+ compatible = "renesas,vin-r8a77970";
+ reg = <0 0xe6ef0000 0 0x1000>;
+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 811>;
+ power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+ resets = <&cpg 811>;
+ renesas,id = <0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin0csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin0>;
+ };
+ };
+ };
+ };
+
+ vin1: video at e6ef1000 {
+ compatible = "renesas,vin-r8a77970";
+ reg = <0 0xe6ef1000 0 0x1000>;
+ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 810>;
+ power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+ resets = <&cpg 810>;
+ renesas,id = <1>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin1csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin1>;
+ };
+ };
+ };
+ };
+
+ vin2: video at e6ef2000 {
+ compatible = "renesas,vin-r8a77970";
+ reg = <0 0xe6ef2000 0 0x1000>;
+ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 809>;
+ power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+ resets = <&cpg 809>;
+ renesas,id = <2>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin2csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin2>;
+ };
+ };
+ };
+ };
+
+ vin3: video at e6ef3000 {
+ compatible = "renesas,vin-r8a77970";
+ reg = <0 0xe6ef3000 0 0x1000>;
+ interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 808>;
+ power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+ resets = <&cpg 808>;
+ renesas,id = <3>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ vin3csi40: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint= <&csi40vin3>;
+ };
+ };
+ };
+ };
+
dmac1: dma-controller at e7300000 {
compatible = "renesas,dmac-r8a77970",
"renesas,rcar-dmac";
@@ -679,6 +792,45 @@
resets = <&cpg 603>;
};
+ csi40: csi2 at feaa0000 {
+ compatible = "renesas,r8a77970-csi2";
+ reg = <0 0xfeaa0000 0 0x10000>;
+ interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 716>;
+ power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
+ resets = <&cpg 716>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <1>;
+
+ csi40vin0: endpoint at 0 {
+ reg = <0>;
+ remote-endpoint = <&vin0csi40>;
+ };
+ csi40vin1: endpoint at 1 {
+ reg = <1>;
+ remote-endpoint = <&vin1csi40>;
+ };
+ csi40vin2: endpoint at 2 {
+ reg = <2>;
+ remote-endpoint = <&vin2csi40>;
+ };
+ csi40vin3: endpoint at 3 {
+ reg = <3>;
+ remote-endpoint = <&vin3csi40>;
+ };
+ };
+ };
+ };
+
du: display at feb00000 {
compatible = "renesas,du-r8a77970";
reg = <0 0xfeb00000 0 0x80000>;
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 101/102] arm64: dts: renesas: salvator-common: enable VIN
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (99 preceding siblings ...)
2018-05-18 11:16 ` [PATCH 100/102] arm64: dts: renesas: r8a77970: " Simon Horman
@ 2018-05-18 11:16 ` Simon Horman
2018-05-18 11:16 ` [PATCH 102/102] arm64: dts: renesas: salvator-common: Add ADV7482 support Simon Horman
2018-05-26 21:14 ` [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Olof Johansson
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:16 UTC (permalink / raw)
To: linux-arm-kernel
From: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/salvator-common.dtsi | 32 ++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
index 96b51e572666..263e5787270e 100644
--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
@@ -703,6 +703,38 @@
clock-frequency = <100000000>;
};
+&vin0 {
+ status = "okay";
+};
+
+&vin1 {
+ status = "okay";
+};
+
+&vin2 {
+ status = "okay";
+};
+
+&vin3 {
+ status = "okay";
+};
+
+&vin4 {
+ status = "okay";
+};
+
+&vin5 {
+ status = "okay";
+};
+
+&vin6 {
+ status = "okay";
+};
+
+&vin7 {
+ status = "okay";
+};
+
&wdt0 {
timeout-sec = <60>;
status = "okay";
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [PATCH 102/102] arm64: dts: renesas: salvator-common: Add ADV7482 support
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (100 preceding siblings ...)
2018-05-18 11:16 ` [PATCH 101/102] arm64: dts: renesas: salvator-common: enable VIN Simon Horman
@ 2018-05-18 11:16 ` Simon Horman
2018-05-26 21:14 ` [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Olof Johansson
102 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-05-18 11:16 UTC (permalink / raw)
To: linux-arm-kernel
From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
The Salvator boards use an ADV7482 receiver for HDMI and CVBS inputs.
Provide ADV7482 node on the i2c4 bus, along with connectors for the
hdmi and cvbs inputs, and link to the csi20 and csi40 nodes as outputs.
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Niklas S?derlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/salvator-common.dtsi | 103 +++++++++++++++++++++++
1 file changed, 103 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/salvator-common.dtsi b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
index 263e5787270e..9256fbaaab7f 100644
--- a/arch/arm64/boot/dts/renesas/salvator-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/salvator-common.dtsi
@@ -66,6 +66,29 @@
enable-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
};
+ cvbs-in {
+ compatible = "composite-video-connector";
+ label = "CVBS IN";
+
+ port {
+ cvbs_con: endpoint {
+ remote-endpoint = <&adv7482_ain7>;
+ };
+ };
+ };
+
+ hdmi-in {
+ compatible = "hdmi-connector";
+ label = "HDMI IN";
+ type = "a";
+
+ port {
+ hdmi_in_con: endpoint {
+ remote-endpoint = <&adv7482_hdmi>;
+ };
+ };
+ };
+
reg_1p8v: regulator0 {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
@@ -260,6 +283,37 @@
};
};
+&csi20 {
+ status = "okay";
+
+ ports {
+ port at 0 {
+ reg = <0>;
+ csi20_in: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1>;
+ remote-endpoint = <&adv7482_txb>;
+ };
+ };
+ };
+};
+
+&csi40 {
+ status = "okay";
+
+ ports {
+ port at 0 {
+ reg = <0>;
+
+ csi40_in: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ remote-endpoint = <&adv7482_txa>;
+ };
+ };
+ };
+};
+
&du {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
@@ -357,6 +411,55 @@
shunt-resistor-micro-ohms = <5000>;
};
+
+ video-receiver at 70 {
+ compatible = "adi,adv7482";
+ reg = <0x70>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ interrupt-parent = <&gpio6>;
+ interrupt-names = "intrq1", "intrq2";
+ interrupts = <30 IRQ_TYPE_LEVEL_LOW>,
+ <31 IRQ_TYPE_LEVEL_LOW>;
+
+ port at 7 {
+ reg = <7>;
+
+ adv7482_ain7: endpoint {
+ remote-endpoint = <&cvbs_con>;
+ };
+ };
+
+ port at 8 {
+ reg = <8>;
+
+ adv7482_hdmi: endpoint {
+ remote-endpoint = <&hdmi_in_con>;
+ };
+ };
+
+ port at 10 {
+ reg = <10>;
+
+ adv7482_txa: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1 2 3 4>;
+ remote-endpoint = <&csi40_in>;
+ };
+ };
+
+ port at 11 {
+ reg = <11>;
+
+ adv7482_txb: endpoint {
+ clock-lanes = <0>;
+ data-lanes = <1>;
+ remote-endpoint = <&csi20_in>;
+ };
+ };
+ };
};
&i2c_dvfs {
--
2.11.0
^ permalink raw reply related [flat|nested] 107+ messages in thread
* [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18
2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
` (101 preceding siblings ...)
2018-05-18 11:16 ` [PATCH 102/102] arm64: dts: renesas: salvator-common: Add ADV7482 support Simon Horman
@ 2018-05-26 21:14 ` Olof Johansson
2018-05-28 7:44 ` Simon Horman
102 siblings, 1 reply; 107+ messages in thread
From: Olof Johansson @ 2018-05-26 21:14 UTC (permalink / raw)
To: linux-arm-kernel
Hi Simon,
On Fri, May 18, 2018 at 01:16:00PM +0200, Simon Horman wrote:
> Hi Olof, Hi Kevin, Hi Arnd,
>
> Please consider these Renesas ARM64 based SoC DT updates for v4.18.
>
>
> The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
>
> Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
>
> are available in the git repository at:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-arm64-dt-for-v4.18
>
> for you to fetch changes up to 908001d778eba06ee1d832863d4e9a1e2cfd4746:
>
> arm64: dts: renesas: salvator-common: Add ADV7482 support (2018-05-18 11:52:03 +0200)
This pull request is really, really hard for us to digest. The tag
description is very large, and it repeats several SoCs several times,
making it hard to get an overview of what is in it. The verbosity of "<x>
says.." makes it harder on this size of a pull request as well.
For example:
> * Condor board with R-Car V3H (r8a77980) SoC
> - Enable eMMC
>
> Sergei Shtylyov says "We're adding the R8A77980 MMC (SDHI)
> device nodes and then enable eMMC support on the Condor board."
The "Enable eMMC" line is just fine here.
> ----------------------------------------------------------------
> Geert Uytterhoeven (11):
> arm64: dts: renesas: draak: Rename EtherAVB "mdc" pin group to "mdio"
> arm64: dts: renesas: salvator-common: Rename EtherAVB "mdc" pin group to "mdio"
> arm64: dts: renesas: ulcb: Rename EtherAVB "mdc" pin group to "mdio"
Why can't these be done in one commit?
> arm64: dts: renesas: r8a7795: Correct whitespace
> arm64: dts: renesas: r8a7796: Correct whitespace
> arm64: dts: renesas: r8a77965: Correct whitespace
Do these really need to be three commits to fix some whitespace?
> arm64: dts: renesas: ulcb: Add BD9571 PMIC
> arm64: dts: renesas: salvator-common: Add PMIC DDR Backup Power config
> arm64: dts: renesas: ulcb: Add PMIC DDR Backup Power config
> arm64: dts: renesas: r8a77970: Add secondary CA53 CPU core
> arm64: dts: renesas: r8a77970: Add Cortex-A53 PMU node
Why can't these be done in the same commit?
> Kieran Bingham (7):
> arm64: dts: renesas: r8a77965: Add FCPF and FCPV instances
> arm64: dts: renesas: r8a77965: Add VSP instances
> arm64: dts: renesas: r8a77965: Populate the DU instance placeholder
> arm64: dts: renesas: r8a77965: Add HDMI encoder instance
> arm64: dts: renesas: r8a77965-salvator-x: Enable DU external clocks and HDMI
> arm64: dts: renesas: r8a77965-salvator-xs: Enable DU external clocks and HDMI
These two can probably be in one commit as well.
> arm64: dts: renesas: salvator-common: Add ADV7482 support
>
> Kuninori Morimoto (8):
> arm64: dts: renesas: r8a7795: add HDMI sound support
> arm64: dts: renesas: r8a7796: add HDMI sound support
... starting to see a trend?
> arm64: dts: renesas: salvator-common: use audio-graph-card for Sound
> arm64: dts: renesas: r8a7795-es1-salvator-x: enable HDMI sound
> arm64: dts: renesas: r8a7795-salvator-xs: enable HDMI sound
> arm64: dts: renesas: r8a7796-salvator-xs: enable HDMI sound
> arm64: dts: renesas: r8a7795-salvator-x: enable HDMI sound
> arm64: dts: renesas: r8a7796-salvator-x: enable HDMI sound
... and more.
>
> Magnus Damm (5):
> arm64: dts: renesas: r8a77970: Update IPMMU DS1 bit number
> arm64: dts: renesas: r8a7795: Enable IPMMU devices
> arm64: dts: renesas: r8a7796: Enable IPMMU devices
> arm64: dts: renesas: r8a77970: Enable IPMMU devices
> arm64: dts: renesas: r8a77995: Enable IPMMU devices
I think these 4 could be in one commit too.
>
> Niklas S?derlund (11):
> arm64: dts: renesas: r8a7795: decrease temperature hysteresis
> arm64: dts: renesas: r8a7796: decrease temperature hysteresis
> arm64: dts: renesas: r8a77965: use r8a77965-sysc binding definitions
> arm64: dts: renesas: r8a77965: Add R-Car Gen3 thermal support
> arm64: dts: renesas: r8a77965: add I2C support
> arm64: dts: renesas: r8a7795: add VIN and CSI-2 nodes
> arm64: dts: renesas: r8a7795-es1: add CSI-2 node
> arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes
> arm64: dts: renesas: r8a77965: add VIN and CSI-2 nodes
> arm64: dts: renesas: r8a77970: add VIN and CSI-2 nodes
.... etc, etc. I'll stop here.
I haven't merged this branch yet, will need to set aside more time to review
the contents. I can't guarantee that it'll make v4.18 but I'll try.
-Olof
^ permalink raw reply [flat|nested] 107+ messages in thread
* [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18
2018-05-26 21:14 ` [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Olof Johansson
@ 2018-05-28 7:44 ` Simon Horman
2018-06-02 8:32 ` Olof Johansson
0 siblings, 1 reply; 107+ messages in thread
From: Simon Horman @ 2018-05-28 7:44 UTC (permalink / raw)
To: linux-arm-kernel
Hi Olof,
On Sat, May 26, 2018 at 02:14:20PM -0700, Olof Johansson wrote:
> Hi Simon,
>
> On Fri, May 18, 2018 at 01:16:00PM +0200, Simon Horman wrote:
> > Hi Olof, Hi Kevin, Hi Arnd,
> >
> > Please consider these Renesas ARM64 based SoC DT updates for v4.18.
> >
> >
> > The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
> >
> > Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
> >
> > are available in the git repository at:
> >
> > https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-arm64-dt-for-v4.18
> >
> > for you to fetch changes up to 908001d778eba06ee1d832863d4e9a1e2cfd4746:
> >
> > arm64: dts: renesas: salvator-common: Add ADV7482 support (2018-05-18 11:52:03 +0200)
>
> This pull request is really, really hard for us to digest. The tag
> description is very large, and it repeats several SoCs several times,
> making it hard to get an overview of what is in it. The verbosity of "<x>
> says.." makes it harder on this size of a pull request as well.
I appologise that this pull-request has turned out to be hard to digest.
I think that one reason for this is that there are an unusally large number
of commits. It seems that the team has been a little more productive than
usual and I might have been better to send a smaller pull-request earlier
in the development cycle and then follow-up with a second batch. I'll try
to pay more attention to this aspect of things going forwards.
Regarding your specific comments:
* Repetition of SoCs. I do try to group things in a logical manner,
but clearly I failed in this case. I'll try to make that a bit clearer
in future.
* Verbosity: There as a request a few development cycles for me
to include more information in the commit logs. It seems that
I may have gone a bit too far. I'll try to find a better balance next
time around.
* Patches for the same change split up for different SoCs/boards.
Featurs broken out into incremental patches. And so on.
This has been a long-standing practice for Renesas SoC development.
We find that in general it aids review. It also works well
with the way we develop patches. But I do see your point that
it may be a little excessive - f.e. multiple patches for the same
whitespace fixes. Again, we'll try to find a better balance.
>
> For example:
>
> > * Condor board with R-Car V3H (r8a77980) SoC
> > - Enable eMMC
> >
> > Sergei Shtylyov says "We're adding the R8A77980 MMC (SDHI)
> > device nodes and then enable eMMC support on the Condor board."
>
> The "Enable eMMC" line is just fine here.
>
> > ----------------------------------------------------------------
> > Geert Uytterhoeven (11):
> > arm64: dts: renesas: draak: Rename EtherAVB "mdc" pin group to "mdio"
> > arm64: dts: renesas: salvator-common: Rename EtherAVB "mdc" pin group to "mdio"
> > arm64: dts: renesas: ulcb: Rename EtherAVB "mdc" pin group to "mdio"
>
> Why can't these be done in one commit?
>
> > arm64: dts: renesas: r8a7795: Correct whitespace
> > arm64: dts: renesas: r8a7796: Correct whitespace
> > arm64: dts: renesas: r8a77965: Correct whitespace
>
> Do these really need to be three commits to fix some whitespace?
>
> > arm64: dts: renesas: ulcb: Add BD9571 PMIC
> > arm64: dts: renesas: salvator-common: Add PMIC DDR Backup Power config
> > arm64: dts: renesas: ulcb: Add PMIC DDR Backup Power config
> > arm64: dts: renesas: r8a77970: Add secondary CA53 CPU core
> > arm64: dts: renesas: r8a77970: Add Cortex-A53 PMU node
>
> Why can't these be done in the same commit?
>
> > Kieran Bingham (7):
> > arm64: dts: renesas: r8a77965: Add FCPF and FCPV instances
> > arm64: dts: renesas: r8a77965: Add VSP instances
> > arm64: dts: renesas: r8a77965: Populate the DU instance placeholder
> > arm64: dts: renesas: r8a77965: Add HDMI encoder instance
> > arm64: dts: renesas: r8a77965-salvator-x: Enable DU external clocks and HDMI
> > arm64: dts: renesas: r8a77965-salvator-xs: Enable DU external clocks and HDMI
>
> These two can probably be in one commit as well.
>
> > arm64: dts: renesas: salvator-common: Add ADV7482 support
> >
> > Kuninori Morimoto (8):
> > arm64: dts: renesas: r8a7795: add HDMI sound support
> > arm64: dts: renesas: r8a7796: add HDMI sound support
>
> ... starting to see a trend?
>
> > arm64: dts: renesas: salvator-common: use audio-graph-card for Sound
> > arm64: dts: renesas: r8a7795-es1-salvator-x: enable HDMI sound
> > arm64: dts: renesas: r8a7795-salvator-xs: enable HDMI sound
> > arm64: dts: renesas: r8a7796-salvator-xs: enable HDMI sound
> > arm64: dts: renesas: r8a7795-salvator-x: enable HDMI sound
> > arm64: dts: renesas: r8a7796-salvator-x: enable HDMI sound
>
> ... and more.
>
> >
> > Magnus Damm (5):
> > arm64: dts: renesas: r8a77970: Update IPMMU DS1 bit number
> > arm64: dts: renesas: r8a7795: Enable IPMMU devices
> > arm64: dts: renesas: r8a7796: Enable IPMMU devices
> > arm64: dts: renesas: r8a77970: Enable IPMMU devices
> > arm64: dts: renesas: r8a77995: Enable IPMMU devices
>
> I think these 4 could be in one commit too.
>
> >
> > Niklas S?derlund (11):
> > arm64: dts: renesas: r8a7795: decrease temperature hysteresis
> > arm64: dts: renesas: r8a7796: decrease temperature hysteresis
> > arm64: dts: renesas: r8a77965: use r8a77965-sysc binding definitions
> > arm64: dts: renesas: r8a77965: Add R-Car Gen3 thermal support
> > arm64: dts: renesas: r8a77965: add I2C support
> > arm64: dts: renesas: r8a7795: add VIN and CSI-2 nodes
> > arm64: dts: renesas: r8a7795-es1: add CSI-2 node
> > arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes
> > arm64: dts: renesas: r8a77965: add VIN and CSI-2 nodes
> > arm64: dts: renesas: r8a77970: add VIN and CSI-2 nodes
>
>
> .... etc, etc. I'll stop here.
>
>
> I haven't merged this branch yet, will need to set aside more time to review
> the contents. I can't guarantee that it'll make v4.18 but I'll try.
Please let me know if there is anything I can do to help make this happen.
This work is very important to Renesas.
^ permalink raw reply [flat|nested] 107+ messages in thread
* [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18
2018-05-28 7:44 ` Simon Horman
@ 2018-06-02 8:32 ` Olof Johansson
2018-06-04 9:10 ` Simon Horman
0 siblings, 1 reply; 107+ messages in thread
From: Olof Johansson @ 2018-06-02 8:32 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, May 28, 2018 at 09:44:41AM +0200, Simon Horman wrote:
> Hi Olof,
>
> On Sat, May 26, 2018 at 02:14:20PM -0700, Olof Johansson wrote:
> > Hi Simon,
> >
> > On Fri, May 18, 2018 at 01:16:00PM +0200, Simon Horman wrote:
> > > Hi Olof, Hi Kevin, Hi Arnd,
> > >
> > > Please consider these Renesas ARM64 based SoC DT updates for v4.18.
> > >
> > >
> > > The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
> > >
> > > Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
> > >
> > > are available in the git repository at:
> > >
> > > https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-arm64-dt-for-v4.18
> > >
> > > for you to fetch changes up to 908001d778eba06ee1d832863d4e9a1e2cfd4746:
> > >
> > > arm64: dts: renesas: salvator-common: Add ADV7482 support (2018-05-18 11:52:03 +0200)
> >
> > This pull request is really, really hard for us to digest. The tag
> > description is very large, and it repeats several SoCs several times,
> > making it hard to get an overview of what is in it. The verbosity of "<x>
> > says.." makes it harder on this size of a pull request as well.
>
> I appologise that this pull-request has turned out to be hard to digest.
>
> I think that one reason for this is that there are an unusally large number
> of commits. It seems that the team has been a little more productive than
> usual and I might have been better to send a smaller pull-request earlier
> in the development cycle and then follow-up with a second batch. I'll try
> to pay more attention to this aspect of things going forwards.
>
> Regarding your specific comments:
>
> * Repetition of SoCs. I do try to group things in a logical manner,
> but clearly I failed in this case. I'll try to make that a bit clearer
> in future.
I don't think you're helped by the fact that Renesas product names seem
to have little rhyme or reason to them, and mumbles families and product
names and numbers seemingly random. :(
> * Verbosity: There as a request a few development cycles for me
> to include more information in the commit logs. It seems that
> I may have gone a bit too far. I'll try to find a better balance next
> time around.
There's a balance to be found here. You chose to describe some very small
changes with 3 lines of description, and as a result it's hard to get an
overview of what's in the pull request.
As a maintainer, you should strive to be the editor that makes sure that things
are easy to understand, and arranged in a manner that makes sense for both your
developers and the rest of the community (and the upstream maintainers).
> * Patches for the same change split up for different SoCs/boards.
> Featurs broken out into incremental patches. And so on.
>
> This has been a long-standing practice for Renesas SoC development.
> We find that in general it aids review. It also works well
> with the way we develop patches. But I do see your point that
> it may be a little excessive - f.e. multiple patches for the same
> whitespace fixes. Again, we'll try to find a better balance.
I can understand where the policy comes from, but it seems to me that at least
in this case it's one that's no longer scaling to the number of SoCs you're
supporting, and the number of (each small) additions that you're doing.
Grouping in some of the simpler dtsi additions into one per SoC, or one per IP
block across all SoCs, seems like something to attempt here.
> > For example:
> >
> > > * Condor board with R-Car V3H (r8a77980) SoC
> > > - Enable eMMC
> > >
> > > Sergei Shtylyov says "We're adding the R8A77980 MMC (SDHI)
> > > device nodes and then enable eMMC support on the Condor board."
> >
> > The "Enable eMMC" line is just fine here.
> >
> > > ----------------------------------------------------------------
> > > Geert Uytterhoeven (11):
> > > arm64: dts: renesas: draak: Rename EtherAVB "mdc" pin group to "mdio"
> > > arm64: dts: renesas: salvator-common: Rename EtherAVB "mdc" pin group to "mdio"
> > > arm64: dts: renesas: ulcb: Rename EtherAVB "mdc" pin group to "mdio"
> >
> > Why can't these be done in one commit?
> >
> > > arm64: dts: renesas: r8a7795: Correct whitespace
> > > arm64: dts: renesas: r8a7796: Correct whitespace
> > > arm64: dts: renesas: r8a77965: Correct whitespace
> >
> > Do these really need to be three commits to fix some whitespace?
> >
> > > arm64: dts: renesas: ulcb: Add BD9571 PMIC
> > > arm64: dts: renesas: salvator-common: Add PMIC DDR Backup Power config
> > > arm64: dts: renesas: ulcb: Add PMIC DDR Backup Power config
> > > arm64: dts: renesas: r8a77970: Add secondary CA53 CPU core
> > > arm64: dts: renesas: r8a77970: Add Cortex-A53 PMU node
> >
> > Why can't these be done in the same commit?
> >
> > > Kieran Bingham (7):
> > > arm64: dts: renesas: r8a77965: Add FCPF and FCPV instances
> > > arm64: dts: renesas: r8a77965: Add VSP instances
> > > arm64: dts: renesas: r8a77965: Populate the DU instance placeholder
> > > arm64: dts: renesas: r8a77965: Add HDMI encoder instance
> > > arm64: dts: renesas: r8a77965-salvator-x: Enable DU external clocks and HDMI
> > > arm64: dts: renesas: r8a77965-salvator-xs: Enable DU external clocks and HDMI
> >
> > These two can probably be in one commit as well.
> >
> > > arm64: dts: renesas: salvator-common: Add ADV7482 support
> > >
> > > Kuninori Morimoto (8):
> > > arm64: dts: renesas: r8a7795: add HDMI sound support
> > > arm64: dts: renesas: r8a7796: add HDMI sound support
> >
> > ... starting to see a trend?
> >
> > > arm64: dts: renesas: salvator-common: use audio-graph-card for Sound
> > > arm64: dts: renesas: r8a7795-es1-salvator-x: enable HDMI sound
> > > arm64: dts: renesas: r8a7795-salvator-xs: enable HDMI sound
> > > arm64: dts: renesas: r8a7796-salvator-xs: enable HDMI sound
> > > arm64: dts: renesas: r8a7795-salvator-x: enable HDMI sound
> > > arm64: dts: renesas: r8a7796-salvator-x: enable HDMI sound
> >
> > ... and more.
> >
> > >
> > > Magnus Damm (5):
> > > arm64: dts: renesas: r8a77970: Update IPMMU DS1 bit number
> > > arm64: dts: renesas: r8a7795: Enable IPMMU devices
> > > arm64: dts: renesas: r8a7796: Enable IPMMU devices
> > > arm64: dts: renesas: r8a77970: Enable IPMMU devices
> > > arm64: dts: renesas: r8a77995: Enable IPMMU devices
> >
> > I think these 4 could be in one commit too.
> >
> > >
> > > Niklas S?derlund (11):
> > > arm64: dts: renesas: r8a7795: decrease temperature hysteresis
> > > arm64: dts: renesas: r8a7796: decrease temperature hysteresis
> > > arm64: dts: renesas: r8a77965: use r8a77965-sysc binding definitions
> > > arm64: dts: renesas: r8a77965: Add R-Car Gen3 thermal support
> > > arm64: dts: renesas: r8a77965: add I2C support
> > > arm64: dts: renesas: r8a7795: add VIN and CSI-2 nodes
> > > arm64: dts: renesas: r8a7795-es1: add CSI-2 node
> > > arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes
> > > arm64: dts: renesas: r8a77965: add VIN and CSI-2 nodes
> > > arm64: dts: renesas: r8a77970: add VIN and CSI-2 nodes
> >
> >
> > .... etc, etc. I'll stop here.
> >
> >
> > I haven't merged this branch yet, will need to set aside more time to review
> > the contents. I can't guarantee that it'll make v4.18 but I'll try.
>
> Please let me know if there is anything I can do to help make this happen.
> This work is very important to Renesas.
I've queued this and the SoC branch up in a next/late branch now. I'm planning
on sending it in unless it's a messy or hard merge window for some reason.
-Olof
^ permalink raw reply [flat|nested] 107+ messages in thread
* [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18
2018-06-02 8:32 ` Olof Johansson
@ 2018-06-04 9:10 ` Simon Horman
0 siblings, 0 replies; 107+ messages in thread
From: Simon Horman @ 2018-06-04 9:10 UTC (permalink / raw)
To: linux-arm-kernel
On Sat, Jun 02, 2018 at 01:32:20AM -0700, Olof Johansson wrote:
> On Mon, May 28, 2018 at 09:44:41AM +0200, Simon Horman wrote:
> > Hi Olof,
> >
> > On Sat, May 26, 2018 at 02:14:20PM -0700, Olof Johansson wrote:
> > > Hi Simon,
> > >
> > > On Fri, May 18, 2018 at 01:16:00PM +0200, Simon Horman wrote:
> > > > Hi Olof, Hi Kevin, Hi Arnd,
> > > >
> > > > Please consider these Renesas ARM64 based SoC DT updates for v4.18.
> > > >
> > > >
> > > > The following changes since commit 60cc43fc888428bb2f18f08997432d426a243338:
> > > >
> > > > Linux 4.17-rc1 (2018-04-15 18:24:20 -0700)
> > > >
> > > > are available in the git repository at:
> > > >
> > > > https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-arm64-dt-for-v4.18
> > > >
> > > > for you to fetch changes up to 908001d778eba06ee1d832863d4e9a1e2cfd4746:
> > > >
> > > > arm64: dts: renesas: salvator-common: Add ADV7482 support (2018-05-18 11:52:03 +0200)
> > >
> > > This pull request is really, really hard for us to digest. The tag
> > > description is very large, and it repeats several SoCs several times,
> > > making it hard to get an overview of what is in it. The verbosity of "<x>
> > > says.." makes it harder on this size of a pull request as well.
> >
> > I appologise that this pull-request has turned out to be hard to digest.
> >
> > I think that one reason for this is that there are an unusally large number
> > of commits. It seems that the team has been a little more productive than
> > usual and I might have been better to send a smaller pull-request earlier
> > in the development cycle and then follow-up with a second batch. I'll try
> > to pay more attention to this aspect of things going forwards.
> >
> > Regarding your specific comments:
> >
> > * Repetition of SoCs. I do try to group things in a logical manner,
> > but clearly I failed in this case. I'll try to make that a bit clearer
> > in future.
>
> I don't think you're helped by the fact that Renesas product names seem
> to have little rhyme or reason to them, and mumbles families and product
> names and numbers seemingly random. :(
>
> > * Verbosity: There as a request a few development cycles for me
> > to include more information in the commit logs. It seems that
> > I may have gone a bit too far. I'll try to find a better balance next
> > time around.
>
> There's a balance to be found here. You chose to describe some very small
> changes with 3 lines of description, and as a result it's hard to get an
> overview of what's in the pull request.
>
> As a maintainer, you should strive to be the editor that makes sure that
> things are easy to understand, and arranged in a manner that makes sense
> for both your developers and the rest of the community (and the upstream
> maintainers).
Understood. I'll work on making things easier to digest for all concerned.
> > * Patches for the same change split up for different SoCs/boards.
> > Featurs broken out into incremental patches. And so on.
> >
> > This has been a long-standing practice for Renesas SoC development.
> > We find that in general it aids review. It also works well
> > with the way we develop patches. But I do see your point that
> > it may be a little excessive - f.e. multiple patches for the same
> > whitespace fixes. Again, we'll try to find a better balance.
>
> I can understand where the policy comes from, but it seems to me that at least
> in this case it's one that's no longer scaling to the number of SoCs you're
> supporting, and the number of (each small) additions that you're doing.
> Grouping in some of the simpler dtsi additions into one per SoC, or one per IP
> block across all SoCs, seems like something to attempt here.
I think your point about scaling is well made. We'll start tweaking our
processes to see if we can find a better way.
> > > For example:
> > >
> > > > * Condor board with R-Car V3H (r8a77980) SoC
> > > > - Enable eMMC
> > > >
> > > > Sergei Shtylyov says "We're adding the R8A77980 MMC (SDHI)
> > > > device nodes and then enable eMMC support on the Condor board."
> > >
> > > The "Enable eMMC" line is just fine here.
> > >
> > > > ----------------------------------------------------------------
> > > > Geert Uytterhoeven (11):
> > > > arm64: dts: renesas: draak: Rename EtherAVB "mdc" pin group to "mdio"
> > > > arm64: dts: renesas: salvator-common: Rename EtherAVB "mdc" pin group to "mdio"
> > > > arm64: dts: renesas: ulcb: Rename EtherAVB "mdc" pin group to "mdio"
> > >
> > > Why can't these be done in one commit?
> > >
> > > > arm64: dts: renesas: r8a7795: Correct whitespace
> > > > arm64: dts: renesas: r8a7796: Correct whitespace
> > > > arm64: dts: renesas: r8a77965: Correct whitespace
> > >
> > > Do these really need to be three commits to fix some whitespace?
> > >
> > > > arm64: dts: renesas: ulcb: Add BD9571 PMIC
> > > > arm64: dts: renesas: salvator-common: Add PMIC DDR Backup Power config
> > > > arm64: dts: renesas: ulcb: Add PMIC DDR Backup Power config
> > > > arm64: dts: renesas: r8a77970: Add secondary CA53 CPU core
> > > > arm64: dts: renesas: r8a77970: Add Cortex-A53 PMU node
> > >
> > > Why can't these be done in the same commit?
> > >
> > > > Kieran Bingham (7):
> > > > arm64: dts: renesas: r8a77965: Add FCPF and FCPV instances
> > > > arm64: dts: renesas: r8a77965: Add VSP instances
> > > > arm64: dts: renesas: r8a77965: Populate the DU instance placeholder
> > > > arm64: dts: renesas: r8a77965: Add HDMI encoder instance
> > > > arm64: dts: renesas: r8a77965-salvator-x: Enable DU external clocks and HDMI
> > > > arm64: dts: renesas: r8a77965-salvator-xs: Enable DU external clocks and HDMI
> > >
> > > These two can probably be in one commit as well.
> > >
> > > > arm64: dts: renesas: salvator-common: Add ADV7482 support
> > > >
> > > > Kuninori Morimoto (8):
> > > > arm64: dts: renesas: r8a7795: add HDMI sound support
> > > > arm64: dts: renesas: r8a7796: add HDMI sound support
> > >
> > > ... starting to see a trend?
> > >
> > > > arm64: dts: renesas: salvator-common: use audio-graph-card for Sound
> > > > arm64: dts: renesas: r8a7795-es1-salvator-x: enable HDMI sound
> > > > arm64: dts: renesas: r8a7795-salvator-xs: enable HDMI sound
> > > > arm64: dts: renesas: r8a7796-salvator-xs: enable HDMI sound
> > > > arm64: dts: renesas: r8a7795-salvator-x: enable HDMI sound
> > > > arm64: dts: renesas: r8a7796-salvator-x: enable HDMI sound
> > >
> > > ... and more.
> > >
> > > >
> > > > Magnus Damm (5):
> > > > arm64: dts: renesas: r8a77970: Update IPMMU DS1 bit number
> > > > arm64: dts: renesas: r8a7795: Enable IPMMU devices
> > > > arm64: dts: renesas: r8a7796: Enable IPMMU devices
> > > > arm64: dts: renesas: r8a77970: Enable IPMMU devices
> > > > arm64: dts: renesas: r8a77995: Enable IPMMU devices
> > >
> > > I think these 4 could be in one commit too.
> > >
> > > >
> > > > Niklas S?derlund (11):
> > > > arm64: dts: renesas: r8a7795: decrease temperature hysteresis
> > > > arm64: dts: renesas: r8a7796: decrease temperature hysteresis
> > > > arm64: dts: renesas: r8a77965: use r8a77965-sysc binding definitions
> > > > arm64: dts: renesas: r8a77965: Add R-Car Gen3 thermal support
> > > > arm64: dts: renesas: r8a77965: add I2C support
> > > > arm64: dts: renesas: r8a7795: add VIN and CSI-2 nodes
> > > > arm64: dts: renesas: r8a7795-es1: add CSI-2 node
> > > > arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes
> > > > arm64: dts: renesas: r8a77965: add VIN and CSI-2 nodes
> > > > arm64: dts: renesas: r8a77970: add VIN and CSI-2 nodes
> > >
> > >
> > > .... etc, etc. I'll stop here.
> > >
> > >
> > > I haven't merged this branch yet, will need to set aside more time to review
> > > the contents. I can't guarantee that it'll make v4.18 but I'll try.
> >
> > Please let me know if there is anything I can do to help make this happen.
> > This work is very important to Renesas.
>
> I've queued this and the SoC branch up in a next/late branch now. I'm planning
> on sending it in unless it's a messy or hard merge window for some reason.
Thanks, much appreciated.
^ permalink raw reply [flat|nested] 107+ messages in thread
end of thread, other threads:[~2018-06-04 9:10 UTC | newest]
Thread overview: 107+ messages (download: mbox.gz follow: Atom feed
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2018-05-18 11:16 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Simon Horman
2018-05-18 11:14 ` [PATCH 001/102] arm64: dts: renesas: r8a77965: add usb2_phy nodes Simon Horman
2018-05-18 11:14 ` [PATCH 002/102] arm64: dts: renesas: r8a77965: add usb3_phy node Simon Horman
2018-05-18 11:14 ` [PATCH 003/102] arm64: dts: renesas: r8a77965: add USB 2.0 host nodes Simon Horman
2018-05-18 11:14 ` [PATCH 004/102] arm64: dts: renesas: r8a77965: add usb_dmac nodes Simon Horman
2018-05-18 11:14 ` [PATCH 005/102] arm64: dts: renesas: r8a77965: add HS-USB node Simon Horman
2018-05-18 11:14 ` [PATCH 006/102] arm64: dts: renesas: r8a77965: add USB 3.0 host node Simon Horman
2018-05-18 11:14 ` [PATCH 007/102] arm64: dts: renesas: r8a77965: add USB 3.0 peripheral node Simon Horman
2018-05-18 11:14 ` [PATCH 008/102] arm64: dts: renesas: r8a77970: Update IPMMU DS1 bit number Simon Horman
2018-05-18 11:14 ` [PATCH 009/102] arm64: dts: renesas: r8a7796: sort subnodes of the root node Simon Horman
2018-05-18 11:14 ` [PATCH 010/102] arm64: dts: renesas: r8a7796: sort subnodes of the soc node Simon Horman
2018-05-18 11:14 ` [PATCH 011/102] arm64: dts: renesas: r8a7795: sort subnodes of the root node Simon Horman
2018-05-18 11:14 ` [PATCH 012/102] arm64: dts: renesas: r8a7795: sort subnodes of the soc node Simon Horman
2018-05-18 11:14 ` [PATCH 013/102] arm64: dts: renesas: r8a77965: Add all MSIOF device nodes Simon Horman
2018-05-18 11:14 ` [PATCH 014/102] arm64: dts: renesas: r8a77965: Add PWM " Simon Horman
2018-05-18 11:14 ` [PATCH 015/102] arm64: dts: renesas: r8a77970: add FCPVD support Simon Horman
2018-05-18 11:14 ` [PATCH 016/102] arm64: dts: renesas: Add Renesas R8A77990 Kconfig support Simon Horman
2018-05-18 11:14 ` [PATCH 017/102] arm64: dts: renesas: r8a7795: decrease temperature hysteresis Simon Horman
2018-05-18 11:14 ` [PATCH 018/102] arm64: dts: renesas: r8a7796: " Simon Horman
2018-05-18 11:14 ` [PATCH 019/102] arm64: dts: renesas: r8a77970: add VSPD support Simon Horman
2018-05-18 11:14 ` [PATCH 020/102] arm64: dts: renesas: r8a77970: add DU support Simon Horman
2018-05-18 11:14 ` [PATCH 021/102] arm64: dts: renesas: r8a77970: add LVDS support Simon Horman
2018-05-18 11:14 ` [PATCH 022/102] arm64: dts: renesas: eagle: Enable HDMI output Simon Horman
2018-05-18 11:14 ` [PATCH 023/102] arm64: dts: renesas: r8a77995: sort subnodes of the root node Simon Horman
2018-05-18 11:14 ` [PATCH 024/102] arm64: dts: renesas: r8a77995: sort subnodes of the soc node Simon Horman
2018-05-18 11:14 ` [PATCH 025/102] arm64: dts: renesas: r8a77965: sort subnodes of the root node Simon Horman
2018-05-18 11:14 ` [PATCH 026/102] arm64: dts: renesas: r8a77965: sort subnodes of the soc node Simon Horman
2018-05-18 11:14 ` [PATCH 027/102] arm64: dts: renesas: r8a77970: " Simon Horman
2018-05-18 11:14 ` [PATCH 028/102] arm64: dts: renesas: Add Renesas R8A77990 SoC support Simon Horman
2018-05-18 11:14 ` [PATCH 029/102] arm64: dts: renesas: Add Renesas Ebisu board support Simon Horman
2018-05-18 11:14 ` [PATCH 030/102] arm64: dts: renesas: r8a7795: Enable IPMMU devices Simon Horman
2018-05-18 11:14 ` [PATCH 031/102] arm64: dts: renesas: r8a7796: " Simon Horman
2018-05-18 11:14 ` [PATCH 032/102] arm64: dts: renesas: r8a77970: " Simon Horman
2018-05-18 11:14 ` [PATCH 033/102] arm64: dts: renesas: r8a77995: " Simon Horman
2018-05-18 11:14 ` [PATCH 034/102] arm64: dts: renesas: draak: Rename EtherAVB "mdc" pin group to "mdio" Simon Horman
2018-05-18 11:14 ` [PATCH 035/102] arm64: dts: renesas: salvator-common: " Simon Horman
2018-05-18 11:14 ` [PATCH 036/102] arm64: dts: renesas: ulcb: " Simon Horman
2018-05-18 11:14 ` [PATCH 037/102] arm64: dts: renesas: eagle: add EtherAVB pins Simon Horman
2018-05-18 11:15 ` [PATCH 038/102] arm64: dts: renesas: v3msk: " Simon Horman
2018-05-18 11:15 ` [PATCH 039/102] arm64: dts: renesas: r8a77980: add PFC support Simon Horman
2018-05-18 11:15 ` [PATCH 040/102] arm64: dts: renesas: condor: add SCIF0 pins Simon Horman
2018-05-18 11:15 ` [PATCH 041/102] arm64: dts: renesas: condor: add EtherAVB pins Simon Horman
2018-05-18 11:15 ` [PATCH 042/102] arm64: dts: renesas: r8a77980: add MMC support Simon Horman
2018-05-18 11:15 ` [PATCH 043/102] arm64: dts: renesas: r8a7795: add HDMI sound support Simon Horman
2018-05-18 11:15 ` [PATCH 044/102] arm64: dts: renesas: r8a7796: " Simon Horman
2018-05-18 11:15 ` [PATCH 045/102] arm64: dts: renesas: salvator-common: use audio-graph-card for Sound Simon Horman
2018-05-18 11:15 ` [PATCH 046/102] arm64: dts: renesas: r8a7795-es1-salvator-x: enable HDMI sound Simon Horman
2018-05-18 11:15 ` [PATCH 047/102] arm64: dts: renesas: r8a7795-salvator-xs: " Simon Horman
2018-05-18 11:15 ` [PATCH 048/102] arm64: dts: renesas: r8a7796-salvator-xs: " Simon Horman
2018-05-18 11:15 ` [PATCH 049/102] arm64: dts: renesas: r8a7795-salvator-x: " Simon Horman
2018-05-18 11:15 ` [PATCH 050/102] arm64: dts: renesas: r8a7796-salvator-x: " Simon Horman
2018-05-18 11:15 ` [PATCH 051/102] arm64: dts: renesas: r8a7795-es1: Enable IPMMU devices Simon Horman
2018-05-18 11:15 ` [PATCH 052/102] arm64: dts: renesas: r8a77990: Revise the psci node Simon Horman
2018-05-18 11:15 ` [PATCH 053/102] arm64: dts: renesas: r8a77990: Revise the cache controller node Simon Horman
2018-05-18 11:15 ` [PATCH 054/102] arm64: dts: renesas: r8a77965: Add FCPF and FCPV instances Simon Horman
2018-05-18 11:15 ` [PATCH 055/102] arm64: dts: renesas: r8a77965: Add VSP instances Simon Horman
2018-05-18 11:15 ` [PATCH 056/102] arm64: dts: renesas: r8a77965: Populate the DU instance placeholder Simon Horman
2018-05-18 11:15 ` [PATCH 057/102] arm64: dts: renesas: r8a77965: Add HDMI encoder instance Simon Horman
2018-05-18 11:15 ` [PATCH 058/102] arm64: dts: renesas: r8a77965-salvator-x: Enable DU external clocks and HDMI Simon Horman
2018-05-18 11:15 ` [PATCH 059/102] arm64: dts: renesas: r8a77965-salvator-xs: " Simon Horman
2018-05-18 11:15 ` [PATCH 060/102] arm64: dts: renesas: condor: add eMMC support Simon Horman
2018-05-18 11:15 ` [PATCH 061/102] arm64: dts: renesas: v3msk: add DU/LVDS/HDMI support Simon Horman
2018-05-18 11:15 ` [PATCH 062/102] arm64: dts: renesas: r8a7795: Add address properties to rcar_sound port nodes Simon Horman
2018-05-18 11:15 ` [PATCH 063/102] arm64: dts: renesas: r8a7796: " Simon Horman
2018-05-18 11:15 ` [PATCH 064/102] arm64: dts: renesas: r8a77965: " Simon Horman
2018-05-18 11:15 ` [PATCH 065/102] arm64: dts: renesas: r8a77980: use CPG core clock macros Simon Horman
2018-05-18 11:15 ` [PATCH 066/102] arm64: dts: renesas: r8a77980: use SYSC power domain macros Simon Horman
2018-05-18 11:15 ` [PATCH 067/102] arm64: dts: renesas: r8a77965: use r8a77965-sysc binding definitions Simon Horman
2018-05-18 11:15 ` [PATCH 068/102] arm64: dts: renesas: r8a77965: Add R-Car Gen3 thermal support Simon Horman
2018-05-18 11:15 ` [PATCH 069/102] arm64: dts: renesas: r8a77970: add CAN-FD support Simon Horman
2018-05-18 11:15 ` [PATCH 070/102] arm64: dts: renesas: eagle: " Simon Horman
2018-05-18 11:15 ` [PATCH 071/102] arm64: dts: renesas: r8a77980: " Simon Horman
2018-05-18 11:15 ` [PATCH 072/102] arm64: dts: renesas: condor: " Simon Horman
2018-05-18 11:15 ` [PATCH 073/102] arm64: dts: renesas: salvator-common: add eeprom Simon Horman
2018-05-18 11:15 ` [PATCH 074/102] arm64: dts: renesas: r8a7795: salvator-xs: enable usb2_phy3 node Simon Horman
2018-05-18 11:15 ` [PATCH 075/102] arm64: dts: renesas: r8a7795: salvator-xs: enable hsusb channel 3 node Simon Horman
2018-05-18 11:15 ` [PATCH 076/102] arm64: dts: renesas: r8a7795: salvator-xs: enable USB2.0 host channel 3 Simon Horman
2018-05-18 11:15 ` [PATCH 077/102] arm64: dts: renesas: r8a7795: Correct whitespace Simon Horman
2018-05-18 11:15 ` [PATCH 078/102] arm64: dts: renesas: r8a7796: " Simon Horman
2018-05-18 11:15 ` [PATCH 079/102] arm64: dts: renesas: r8a77965: " Simon Horman
2018-05-18 11:15 ` [PATCH 080/102] arm64: dts: renesas: ulcb: Add BD9571 PMIC Simon Horman
2018-05-18 11:15 ` [PATCH 081/102] arm64: dts: renesas: salvator-common: Add PMIC DDR Backup Power config Simon Horman
2018-05-18 11:15 ` [PATCH 082/102] arm64: dts: renesas: ulcb: " Simon Horman
2018-05-18 11:15 ` [PATCH 083/102] arm64: dts: renesas: r8a77965: Add SDHI device nodes Simon Horman
2018-05-18 11:15 ` [PATCH 084/102] arm64: dts: renesas: r8a77970: Add secondary CA53 CPU core Simon Horman
2018-05-18 11:15 ` [PATCH 085/102] arm64: dts: renesas: r8a77970: Add Cortex-A53 PMU node Simon Horman
2018-05-18 11:15 ` [PATCH 086/102] arm64: dts: renesas: r8a77980: add resets property to CAN-FD node Simon Horman
2018-05-18 11:15 ` [PATCH 087/102] arm64: dts: renesas: r8a77995: Add VIN4 Simon Horman
2018-05-18 11:15 ` [PATCH 088/102] arm64: dts: renesas: r8a77970: disable EtherAVB Simon Horman
2018-05-18 11:15 ` [PATCH 089/102] arm64: dts: renesas: r8a77980: " Simon Horman
2018-05-18 11:15 ` [PATCH 090/102] arm64: dts: renesas: initial V3HSK board device tree Simon Horman
2018-05-18 11:15 ` [PATCH 091/102] arm64: dts: renesas: r8a77990: Add PFC device node Simon Horman
2018-05-18 11:15 ` [PATCH 092/102] arm64: dts: renesas: r8a77990: Add GPIO device nodes Simon Horman
2018-05-18 11:15 ` [PATCH 093/102] arm64: dts: renesas: r8a77990: Add EthernetAVB " Simon Horman
2018-05-18 11:15 ` [PATCH 094/102] arm64: dts: renesas: r8a77990: ebisu: Enable EthernetAVB Simon Horman
2018-05-18 11:15 ` [PATCH 095/102] arm64: dts: renesas: r8a77965: add I2C support Simon Horman
2018-05-18 11:15 ` [PATCH 096/102] arm64: dts: renesas: r8a7795: add VIN and CSI-2 nodes Simon Horman
2018-05-18 11:15 ` [PATCH 097/102] arm64: dts: renesas: r8a7795-es1: add CSI-2 node Simon Horman
2018-05-18 11:16 ` [PATCH 098/102] arm64: dts: renesas: r8a7796: add VIN and CSI-2 nodes Simon Horman
2018-05-18 11:16 ` [PATCH 099/102] arm64: dts: renesas: r8a77965: " Simon Horman
2018-05-18 11:16 ` [PATCH 100/102] arm64: dts: renesas: r8a77970: " Simon Horman
2018-05-18 11:16 ` [PATCH 101/102] arm64: dts: renesas: salvator-common: enable VIN Simon Horman
2018-05-18 11:16 ` [PATCH 102/102] arm64: dts: renesas: salvator-common: Add ADV7482 support Simon Horman
2018-05-26 21:14 ` [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.18 Olof Johansson
2018-05-28 7:44 ` Simon Horman
2018-06-02 8:32 ` Olof Johansson
2018-06-04 9:10 ` Simon Horman
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