* [PATCH 0/3] arm64 CPU DT binding updates
@ 2020-02-21 16:04 Robin Murphy
2020-02-21 16:04 ` [PATCH 1/3] dt-bindings: ARM: Add recent Cortex/Neoverse CPUs Robin Murphy
` (2 more replies)
0 siblings, 3 replies; 10+ messages in thread
From: Robin Murphy @ 2020-02-21 16:04 UTC (permalink / raw)
To: will, catalin.marinas, mark.rutland; +Cc: devicetree, linux-arm-kernel
Hi all,
Since A55 and others are now starting to show up in upstream
DT postings, it seems high time to get these updated.
I haven't yet found the chance to sit down and go through the
time-consuming part of cross-referencing TRMs to fill out the
event maps, but it seems worth getting the fundamental definitions
in sooner rather than later to at least un-block DT authors.
Thanks,
Robin.
Robin Murphy (3):
dt-bindings: ARM: Add recent Cortex/Neoverse CPUs
dt-bindings: ARM: Add recent Cortex/Neoverse PMUs
arm64: perf: Support new DT compatibles
Documentation/devicetree/bindings/arm/cpus.yaml | 9 +++++++++
Documentation/devicetree/bindings/arm/pmu.yaml | 9 +++++++++
arch/arm64/kernel/perf_event.c | 8 ++++++++
3 files changed, 26 insertions(+)
--
2.23.0.dirty
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^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 1/3] dt-bindings: ARM: Add recent Cortex/Neoverse CPUs 2020-02-21 16:04 [PATCH 0/3] arm64 CPU DT binding updates Robin Murphy @ 2020-02-21 16:04 ` Robin Murphy 2020-02-21 16:04 ` [PATCH 2/3] dt-bindings: ARM: Add recent Cortex/Neoverse PMUs Robin Murphy 2020-02-21 16:04 ` [PATCH 3/3] arm64: perf: Support new DT compatibles Robin Murphy 2 siblings, 0 replies; 10+ messages in thread From: Robin Murphy @ 2020-02-21 16:04 UTC (permalink / raw) To: will, catalin.marinas, mark.rutland; +Cc: devicetree, linux-arm-kernel The CPU group has been busy since we last updated these bindings... Add definitions for all the new Cortex-A and Neoverse cores now available. Signed-off-by: Robin Murphy <robin.murphy@arm.com> --- Documentation/devicetree/bindings/arm/cpus.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 7a9c3ce2dbef..41e22b5320da 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -123,11 +123,18 @@ properties: - arm,cortex-a12 - arm,cortex-a15 - arm,cortex-a17 + - arm,cortex-a32 + - arm,cortex-a34 + - arm,cortex-a35 - arm,cortex-a53 - arm,cortex-a55 - arm,cortex-a57 + - arm,cortex-a65 - arm,cortex-a72 - arm,cortex-a73 + - arm,cortex-a75 + - arm,cortex-a76 + - arm,cortex-a77 - arm,cortex-m0 - arm,cortex-m0+ - arm,cortex-m1 @@ -136,6 +143,8 @@ properties: - arm,cortex-r4 - arm,cortex-r5 - arm,cortex-r7 + - arm,neoverse-e1 + - arm,neoverse-n1 - brcm,brahma-b15 - brcm,brahma-b53 - brcm,vulcan -- 2.23.0.dirty _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/3] dt-bindings: ARM: Add recent Cortex/Neoverse PMUs 2020-02-21 16:04 [PATCH 0/3] arm64 CPU DT binding updates Robin Murphy 2020-02-21 16:04 ` [PATCH 1/3] dt-bindings: ARM: Add recent Cortex/Neoverse CPUs Robin Murphy @ 2020-02-21 16:04 ` Robin Murphy 2020-02-21 16:26 ` Rob Herring 2020-02-21 16:04 ` [PATCH 3/3] arm64: perf: Support new DT compatibles Robin Murphy 2 siblings, 1 reply; 10+ messages in thread From: Robin Murphy @ 2020-02-21 16:04 UTC (permalink / raw) To: will, catalin.marinas, mark.rutland; +Cc: devicetree, linux-arm-kernel Add new PMU definitions to correspond with the CPU bindings. Signed-off-by: Robin Murphy <robin.murphy@arm.com> --- Documentation/devicetree/bindings/arm/pmu.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/pmu.yaml b/Documentation/devicetree/bindings/arm/pmu.yaml index 52ae094ce330..cc52195d0e9e 100644 --- a/Documentation/devicetree/bindings/arm/pmu.yaml +++ b/Documentation/devicetree/bindings/arm/pmu.yaml @@ -21,11 +21,20 @@ properties: - enum: - apm,potenza-pmu - arm,armv8-pmuv3 + - arm,neoverse-n1-pmu + - arm,neoverse-e1-pmu + - arm,cortex-a77-pmu + - arm,cortex-a76-pmu + - arm,cortex-a75-pmu - arm,cortex-a73-pmu - arm,cortex-a72-pmu + - arm,cortex-a65-pmu - arm,cortex-a57-pmu + - arm,cortex-a55-pmu - arm,cortex-a53-pmu - arm,cortex-a35-pmu + - arm,cortex-a34-pmu + - arm,cortex-a32-pmu - arm,cortex-a17-pmu - arm,cortex-a15-pmu - arm,cortex-a12-pmu -- 2.23.0.dirty _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 2/3] dt-bindings: ARM: Add recent Cortex/Neoverse PMUs 2020-02-21 16:04 ` [PATCH 2/3] dt-bindings: ARM: Add recent Cortex/Neoverse PMUs Robin Murphy @ 2020-02-21 16:26 ` Rob Herring 2020-02-21 16:30 ` Robin Murphy 0 siblings, 1 reply; 10+ messages in thread From: Rob Herring @ 2020-02-21 16:26 UTC (permalink / raw) To: Robin Murphy Cc: Mark Rutland, Catalin Marinas, Will Deacon, moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE, devicetree On Fri, Feb 21, 2020 at 10:05 AM Robin Murphy <robin.murphy@arm.com> wrote: > > Add new PMU definitions to correspond with the CPU bindings. > > Signed-off-by: Robin Murphy <robin.murphy@arm.com> > --- > Documentation/devicetree/bindings/arm/pmu.yaml | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/pmu.yaml b/Documentation/devicetree/bindings/arm/pmu.yaml > index 52ae094ce330..cc52195d0e9e 100644 > --- a/Documentation/devicetree/bindings/arm/pmu.yaml > +++ b/Documentation/devicetree/bindings/arm/pmu.yaml > @@ -21,11 +21,20 @@ properties: > - enum: > - apm,potenza-pmu > - arm,armv8-pmuv3 > + - arm,neoverse-n1-pmu > + - arm,neoverse-e1-pmu We've managed to do some interesting sorting here. Oh well. I'll take patches 1 and 2. > + - arm,cortex-a77-pmu > + - arm,cortex-a76-pmu > + - arm,cortex-a75-pmu > - arm,cortex-a73-pmu > - arm,cortex-a72-pmu > + - arm,cortex-a65-pmu > - arm,cortex-a57-pmu > + - arm,cortex-a55-pmu > - arm,cortex-a53-pmu > - arm,cortex-a35-pmu > + - arm,cortex-a34-pmu > + - arm,cortex-a32-pmu > - arm,cortex-a17-pmu > - arm,cortex-a15-pmu > - arm,cortex-a12-pmu > -- > 2.23.0.dirty > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 2/3] dt-bindings: ARM: Add recent Cortex/Neoverse PMUs 2020-02-21 16:26 ` Rob Herring @ 2020-02-21 16:30 ` Robin Murphy 0 siblings, 0 replies; 10+ messages in thread From: Robin Murphy @ 2020-02-21 16:30 UTC (permalink / raw) To: Rob Herring Cc: Mark Rutland, Catalin Marinas, Will Deacon, moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE, devicetree On 21/02/2020 4:26 pm, Rob Herring wrote: > On Fri, Feb 21, 2020 at 10:05 AM Robin Murphy <robin.murphy@arm.com> wrote: >> >> Add new PMU definitions to correspond with the CPU bindings. >> >> Signed-off-by: Robin Murphy <robin.murphy@arm.com> >> --- >> Documentation/devicetree/bindings/arm/pmu.yaml | 9 +++++++++ >> 1 file changed, 9 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/arm/pmu.yaml b/Documentation/devicetree/bindings/arm/pmu.yaml >> index 52ae094ce330..cc52195d0e9e 100644 >> --- a/Documentation/devicetree/bindings/arm/pmu.yaml >> +++ b/Documentation/devicetree/bindings/arm/pmu.yaml >> @@ -21,11 +21,20 @@ properties: >> - enum: >> - apm,potenza-pmu >> - arm,armv8-pmuv3 >> + - arm,neoverse-n1-pmu >> + - arm,neoverse-e1-pmu > > We've managed to do some interesting sorting here. Oh well. Indeed; it appeared to be some sort of overlap between reverse-alpha and "big-to-little", so I just picked that up and ran with it :) Thanks, Robin. > I'll take patches 1 and 2. > >> + - arm,cortex-a77-pmu >> + - arm,cortex-a76-pmu >> + - arm,cortex-a75-pmu >> - arm,cortex-a73-pmu >> - arm,cortex-a72-pmu >> + - arm,cortex-a65-pmu >> - arm,cortex-a57-pmu >> + - arm,cortex-a55-pmu >> - arm,cortex-a53-pmu >> - arm,cortex-a35-pmu >> + - arm,cortex-a34-pmu >> + - arm,cortex-a32-pmu >> - arm,cortex-a17-pmu >> - arm,cortex-a15-pmu >> - arm,cortex-a12-pmu >> -- >> 2.23.0.dirty >> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 3/3] arm64: perf: Support new DT compatibles 2020-02-21 16:04 [PATCH 0/3] arm64 CPU DT binding updates Robin Murphy 2020-02-21 16:04 ` [PATCH 1/3] dt-bindings: ARM: Add recent Cortex/Neoverse CPUs Robin Murphy 2020-02-21 16:04 ` [PATCH 2/3] dt-bindings: ARM: Add recent Cortex/Neoverse PMUs Robin Murphy @ 2020-02-21 16:04 ` Robin Murphy 2020-02-21 17:15 ` Mark Rutland 2020-02-21 17:38 ` Andre Przywara 2 siblings, 2 replies; 10+ messages in thread From: Robin Murphy @ 2020-02-21 16:04 UTC (permalink / raw) To: will, catalin.marinas, mark.rutland; +Cc: devicetree, linux-arm-kernel Add support for matching the new PMUs. For now, this just wires them up as generic PMUv3 such that people writing DTs for new SoCs can do the right thing, and at least have architectural and raw events be usable. We can come back and fill in event maps for sysfs and/or perf tools at a later date. Signed-off-by: Robin Murphy <robin.murphy@arm.com> --- arch/arm64/kernel/perf_event.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index e40b65645c86..28ce582e049e 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -1105,11 +1105,19 @@ static int armv8_vulcan_pmu_init(struct arm_pmu *cpu_pmu) static const struct of_device_id armv8_pmu_of_device_ids[] = { {.compatible = "arm,armv8-pmuv3", .data = armv8_pmuv3_init}, + {.compatible = "arm,cortex-a34-pmu", .data = armv8_pmuv3_init}, {.compatible = "arm,cortex-a35-pmu", .data = armv8_a35_pmu_init}, {.compatible = "arm,cortex-a53-pmu", .data = armv8_a53_pmu_init}, + {.compatible = "arm,cortex-a55-pmu", .data = armv8_pmuv3_init}, {.compatible = "arm,cortex-a57-pmu", .data = armv8_a57_pmu_init}, + {.compatible = "arm,cortex-a65-pmu", .data = armv8_pmuv3_init}, {.compatible = "arm,cortex-a72-pmu", .data = armv8_a72_pmu_init}, {.compatible = "arm,cortex-a73-pmu", .data = armv8_a73_pmu_init}, + {.compatible = "arm,cortex-a75-pmu", .data = armv8_pmuv3_init}, + {.compatible = "arm,cortex-a76-pmu", .data = armv8_pmuv3_init}, + {.compatible = "arm,cortex-a77-pmu", .data = armv8_pmuv3_init}, + {.compatible = "arm,neoverse-e1-pmu", .data = armv8_pmuv3_init}, + {.compatible = "arm,neoverse-n1-pmu", .data = armv8_pmuv3_init}, {.compatible = "cavium,thunder-pmu", .data = armv8_thunder_pmu_init}, {.compatible = "brcm,vulcan-pmu", .data = armv8_vulcan_pmu_init}, {}, -- 2.23.0.dirty _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 3/3] arm64: perf: Support new DT compatibles 2020-02-21 16:04 ` [PATCH 3/3] arm64: perf: Support new DT compatibles Robin Murphy @ 2020-02-21 17:15 ` Mark Rutland 2020-02-21 17:49 ` Mark Rutland 2020-02-21 17:38 ` Andre Przywara 1 sibling, 1 reply; 10+ messages in thread From: Mark Rutland @ 2020-02-21 17:15 UTC (permalink / raw) To: Robin Murphy; +Cc: catalin.marinas, will, linux-arm-kernel, devicetree On Fri, Feb 21, 2020 at 04:04:58PM +0000, Robin Murphy wrote: > Add support for matching the new PMUs. For now, this just wires them up > as generic PMUv3 such that people writing DTs for new SoCs can do the > right thing, and at least have architectural and raw events be usable. > We can come back and fill in event maps for sysfs and/or perf tools at > a later date. > > Signed-off-by: Robin Murphy <robin.murphy@arm.com> Thanks for this, it looks fine to me: Acked-by: Mark Rutland <mark.rutland@arm.com> Mark. > --- > arch/arm64/kernel/perf_event.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c > index e40b65645c86..28ce582e049e 100644 > --- a/arch/arm64/kernel/perf_event.c > +++ b/arch/arm64/kernel/perf_event.c > @@ -1105,11 +1105,19 @@ static int armv8_vulcan_pmu_init(struct arm_pmu *cpu_pmu) > > static const struct of_device_id armv8_pmu_of_device_ids[] = { > {.compatible = "arm,armv8-pmuv3", .data = armv8_pmuv3_init}, > + {.compatible = "arm,cortex-a34-pmu", .data = armv8_pmuv3_init}, > {.compatible = "arm,cortex-a35-pmu", .data = armv8_a35_pmu_init}, > {.compatible = "arm,cortex-a53-pmu", .data = armv8_a53_pmu_init}, > + {.compatible = "arm,cortex-a55-pmu", .data = armv8_pmuv3_init}, > {.compatible = "arm,cortex-a57-pmu", .data = armv8_a57_pmu_init}, > + {.compatible = "arm,cortex-a65-pmu", .data = armv8_pmuv3_init}, > {.compatible = "arm,cortex-a72-pmu", .data = armv8_a72_pmu_init}, > {.compatible = "arm,cortex-a73-pmu", .data = armv8_a73_pmu_init}, > + {.compatible = "arm,cortex-a75-pmu", .data = armv8_pmuv3_init}, > + {.compatible = "arm,cortex-a76-pmu", .data = armv8_pmuv3_init}, > + {.compatible = "arm,cortex-a77-pmu", .data = armv8_pmuv3_init}, > + {.compatible = "arm,neoverse-e1-pmu", .data = armv8_pmuv3_init}, > + {.compatible = "arm,neoverse-n1-pmu", .data = armv8_pmuv3_init}, > {.compatible = "cavium,thunder-pmu", .data = armv8_thunder_pmu_init}, > {.compatible = "brcm,vulcan-pmu", .data = armv8_vulcan_pmu_init}, > {}, > -- > 2.23.0.dirty > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 3/3] arm64: perf: Support new DT compatibles 2020-02-21 17:15 ` Mark Rutland @ 2020-02-21 17:49 ` Mark Rutland 0 siblings, 0 replies; 10+ messages in thread From: Mark Rutland @ 2020-02-21 17:49 UTC (permalink / raw) To: Robin Murphy; +Cc: catalin.marinas, will, linux-arm-kernel, devicetree On Fri, Feb 21, 2020 at 05:15:59PM +0000, Mark Rutland wrote: > On Fri, Feb 21, 2020 at 04:04:58PM +0000, Robin Murphy wrote: > > Add support for matching the new PMUs. For now, this just wires them up > > as generic PMUv3 such that people writing DTs for new SoCs can do the > > right thing, and at least have architectural and raw events be usable. > > We can come back and fill in event maps for sysfs and/or perf tools at > > a later date. > > > > Signed-off-by: Robin Murphy <robin.murphy@arm.com> > > Thanks for this, it looks fine to me: > > Acked-by: Mark Rutland <mark.rutland@arm.com> Argh, this isn't quite right, sorry. :/ > > --- > > arch/arm64/kernel/perf_event.c | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c > > index e40b65645c86..28ce582e049e 100644 > > --- a/arch/arm64/kernel/perf_event.c > > +++ b/arch/arm64/kernel/perf_event.c > > @@ -1105,11 +1105,19 @@ static int armv8_vulcan_pmu_init(struct arm_pmu *cpu_pmu) > > > > static const struct of_device_id armv8_pmu_of_device_ids[] = { > > {.compatible = "arm,armv8-pmuv3", .data = armv8_pmuv3_init}, > > + {.compatible = "arm,cortex-a34-pmu", .data = armv8_pmuv3_init}, Unfortunately, these need their own .data so that they can be given appropriate names under sysfs. We're stuck doing that forever for DT, though at least we learned for ACPI... Mark. > > {.compatible = "arm,cortex-a35-pmu", .data = armv8_a35_pmu_init}, > > {.compatible = "arm,cortex-a53-pmu", .data = armv8_a53_pmu_init}, > > + {.compatible = "arm,cortex-a55-pmu", .data = armv8_pmuv3_init}, > > {.compatible = "arm,cortex-a57-pmu", .data = armv8_a57_pmu_init}, > > + {.compatible = "arm,cortex-a65-pmu", .data = armv8_pmuv3_init}, > > {.compatible = "arm,cortex-a72-pmu", .data = armv8_a72_pmu_init}, > > {.compatible = "arm,cortex-a73-pmu", .data = armv8_a73_pmu_init}, > > + {.compatible = "arm,cortex-a75-pmu", .data = armv8_pmuv3_init}, > > + {.compatible = "arm,cortex-a76-pmu", .data = armv8_pmuv3_init}, > > + {.compatible = "arm,cortex-a77-pmu", .data = armv8_pmuv3_init}, > > + {.compatible = "arm,neoverse-e1-pmu", .data = armv8_pmuv3_init}, > > + {.compatible = "arm,neoverse-n1-pmu", .data = armv8_pmuv3_init}, > > {.compatible = "cavium,thunder-pmu", .data = armv8_thunder_pmu_init}, > > {.compatible = "brcm,vulcan-pmu", .data = armv8_vulcan_pmu_init}, > > {}, > > -- > > 2.23.0.dirty > > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 3/3] arm64: perf: Support new DT compatibles 2020-02-21 16:04 ` [PATCH 3/3] arm64: perf: Support new DT compatibles Robin Murphy 2020-02-21 17:15 ` Mark Rutland @ 2020-02-21 17:38 ` Andre Przywara 2020-02-21 17:51 ` Mark Rutland 1 sibling, 1 reply; 10+ messages in thread From: Andre Przywara @ 2020-02-21 17:38 UTC (permalink / raw) To: Robin Murphy Cc: mark.rutland, catalin.marinas, will, linux-arm-kernel, devicetree On Fri, 21 Feb 2020 16:04:58 +0000 Robin Murphy <robin.murphy@arm.com> wrote: Hi, > Add support for matching the new PMUs. For now, this just wires them up > as generic PMUv3 such that people writing DTs for new SoCs can do the > right thing, and at least have architectural and raw events be usable. > We can come back and fill in event maps for sysfs and/or perf tools at > a later date. as mentioned already in a reply to another patch: Is that really the right way? Isn't that calling for the intended usage of a compatible fall-back string? So that a machine can just ship DTBs with for instance: "arm,neoverse-n1-pmu", "arm,armv8-pmuv3"; and that would magically work with all older and newer kernels already, without any patch? As it stands right now (with a single compatible), only newer kernels could use the PMU on those SoCs (ignoring tedious backports not reaching every user). All that would be needed for that is to officially allow two compatible strings in the binding. Cheers, Andre. P.S. Still thinking about dropping those compatible strings at all and using the MIDR somehow, because then also ACPI users would benefit from core specific events. > Signed-off-by: Robin Murphy <robin.murphy@arm.com> > --- > arch/arm64/kernel/perf_event.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c > index e40b65645c86..28ce582e049e 100644 > --- a/arch/arm64/kernel/perf_event.c > +++ b/arch/arm64/kernel/perf_event.c > @@ -1105,11 +1105,19 @@ static int armv8_vulcan_pmu_init(struct arm_pmu *cpu_pmu) > > static const struct of_device_id armv8_pmu_of_device_ids[] = { > {.compatible = "arm,armv8-pmuv3", .data = armv8_pmuv3_init}, > + {.compatible = "arm,cortex-a34-pmu", .data = armv8_pmuv3_init}, > {.compatible = "arm,cortex-a35-pmu", .data = armv8_a35_pmu_init}, > {.compatible = "arm,cortex-a53-pmu", .data = armv8_a53_pmu_init}, > + {.compatible = "arm,cortex-a55-pmu", .data = armv8_pmuv3_init}, > {.compatible = "arm,cortex-a57-pmu", .data = armv8_a57_pmu_init}, > + {.compatible = "arm,cortex-a65-pmu", .data = armv8_pmuv3_init}, > {.compatible = "arm,cortex-a72-pmu", .data = armv8_a72_pmu_init}, > {.compatible = "arm,cortex-a73-pmu", .data = armv8_a73_pmu_init}, > + {.compatible = "arm,cortex-a75-pmu", .data = armv8_pmuv3_init}, > + {.compatible = "arm,cortex-a76-pmu", .data = armv8_pmuv3_init}, > + {.compatible = "arm,cortex-a77-pmu", .data = armv8_pmuv3_init}, > + {.compatible = "arm,neoverse-e1-pmu", .data = armv8_pmuv3_init}, > + {.compatible = "arm,neoverse-n1-pmu", .data = armv8_pmuv3_init}, > {.compatible = "cavium,thunder-pmu", .data = armv8_thunder_pmu_init}, > {.compatible = "brcm,vulcan-pmu", .data = armv8_vulcan_pmu_init}, > {}, _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 3/3] arm64: perf: Support new DT compatibles 2020-02-21 17:38 ` Andre Przywara @ 2020-02-21 17:51 ` Mark Rutland 0 siblings, 0 replies; 10+ messages in thread From: Mark Rutland @ 2020-02-21 17:51 UTC (permalink / raw) To: Andre Przywara Cc: will, devicetree, Robin Murphy, linux-arm-kernel, catalin.marinas On Fri, Feb 21, 2020 at 05:38:47PM +0000, Andre Przywara wrote: > On Fri, 21 Feb 2020 16:04:58 +0000 > Robin Murphy <robin.murphy@arm.com> wrote: > > Hi, > > > Add support for matching the new PMUs. For now, this just wires them up > > as generic PMUv3 such that people writing DTs for new SoCs can do the > > right thing, and at least have architectural and raw events be usable. > > We can come back and fill in event maps for sysfs and/or perf tools at > > a later date. > > as mentioned already in a reply to another patch: > > Is that really the right way? Isn't that calling for the intended usage of a compatible fall-back string? > So that a machine can just ship DTBs with for instance: > "arm,neoverse-n1-pmu", "arm,armv8-pmuv3"; > and that would magically work with all older and newer kernels already, without any patch? > > As it stands right now (with a single compatible), only newer kernels could use the PMU on those SoCs (ignoring tedious backports not reaching every user). > > All that would be needed for that is to officially allow two compatible strings in the binding. > > Cheers, > Andre. > > P.S. Still thinking about dropping those compatible strings at all and using the MIDR somehow, because then also ACPI users would benefit from core specific events. For ACPI we've said that the way forward is the userspace mappings, so that's already solved (and to a much greater degree than we could do within the kernel). The names for DT are an unfortunate legacy thing that we simply have to carry on with going forward in for the UAPI under sysfs. I don't want to go mapping MIDRs to names, and open other worm cans. Thanksm Mark. > > > Signed-off-by: Robin Murphy <robin.murphy@arm.com> > > --- > > arch/arm64/kernel/perf_event.c | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c > > index e40b65645c86..28ce582e049e 100644 > > --- a/arch/arm64/kernel/perf_event.c > > +++ b/arch/arm64/kernel/perf_event.c > > @@ -1105,11 +1105,19 @@ static int armv8_vulcan_pmu_init(struct arm_pmu *cpu_pmu) > > > > static const struct of_device_id armv8_pmu_of_device_ids[] = { > > {.compatible = "arm,armv8-pmuv3", .data = armv8_pmuv3_init}, > > + {.compatible = "arm,cortex-a34-pmu", .data = armv8_pmuv3_init}, > > {.compatible = "arm,cortex-a35-pmu", .data = armv8_a35_pmu_init}, > > {.compatible = "arm,cortex-a53-pmu", .data = armv8_a53_pmu_init}, > > + {.compatible = "arm,cortex-a55-pmu", .data = armv8_pmuv3_init}, > > {.compatible = "arm,cortex-a57-pmu", .data = armv8_a57_pmu_init}, > > + {.compatible = "arm,cortex-a65-pmu", .data = armv8_pmuv3_init}, > > {.compatible = "arm,cortex-a72-pmu", .data = armv8_a72_pmu_init}, > > {.compatible = "arm,cortex-a73-pmu", .data = armv8_a73_pmu_init}, > > + {.compatible = "arm,cortex-a75-pmu", .data = armv8_pmuv3_init}, > > + {.compatible = "arm,cortex-a76-pmu", .data = armv8_pmuv3_init}, > > + {.compatible = "arm,cortex-a77-pmu", .data = armv8_pmuv3_init}, > > + {.compatible = "arm,neoverse-e1-pmu", .data = armv8_pmuv3_init}, > > + {.compatible = "arm,neoverse-n1-pmu", .data = armv8_pmuv3_init}, > > {.compatible = "cavium,thunder-pmu", .data = armv8_thunder_pmu_init}, > > {.compatible = "brcm,vulcan-pmu", .data = armv8_vulcan_pmu_init}, > > {}, > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2020-02-21 17:51 UTC | newest] Thread overview: 10+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2020-02-21 16:04 [PATCH 0/3] arm64 CPU DT binding updates Robin Murphy 2020-02-21 16:04 ` [PATCH 1/3] dt-bindings: ARM: Add recent Cortex/Neoverse CPUs Robin Murphy 2020-02-21 16:04 ` [PATCH 2/3] dt-bindings: ARM: Add recent Cortex/Neoverse PMUs Robin Murphy 2020-02-21 16:26 ` Rob Herring 2020-02-21 16:30 ` Robin Murphy 2020-02-21 16:04 ` [PATCH 3/3] arm64: perf: Support new DT compatibles Robin Murphy 2020-02-21 17:15 ` Mark Rutland 2020-02-21 17:49 ` Mark Rutland 2020-02-21 17:38 ` Andre Przywara 2020-02-21 17:51 ` Mark Rutland
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