[PATCH v4 0/2] AT91 SAMA7 SoC Clock Adjustments

[PATCH v4 0/2] AT91 SAMA7 SoC Clock Adjustments

[Ryan.Wanner]

From: Ryan Wanner <Ryan.Wanner@microchip.com>

This set has clock system adjustments for the AT91 clock system for
sama7 SoC family.

The patch set updates the device tree phandle formatting for the
sama7g54 SoC. This also adds names to the xtals so the driver can
correclty find and name them in the clock tree.

Changes v1 -> v2:
- Add clk_hw struct to parent_data adjustment for the sama7g5.c driver.
- Add correction to sama7g54 dtsi main xtal phandles.

Changes v2 -> v3:
- Removed the empty line after the fixes tag.
- Correct commit messages to better explain the issue that this is
  fixing.
- Initialize parent_data index to 0.

Changes v3 -> v4:
- Add clock-output-names to the xtal nodes.
- Remove the clock driver changes since those are not needed for this
  set.
- Adjust cover letter message to reflect the changes in the v4.

Ryan Wanner (2):
  ARM: dts: microchip: sama7g5: Adjust clock xtal phandle
  ARM: dts: microchip: sama7d65: Add clock name property

 arch/arm/boot/dts/microchip/at91-sama7g5ek.dts | 18 ++++++++----------
 arch/arm/boot/dts/microchip/sama7d65.dtsi      |  2 ++
 arch/arm/boot/dts/microchip/sama7g5.dtsi       |  6 ++++--
 3 files changed, 14 insertions(+), 12 deletions(-)

-- 
2.43.0

[PATCH v4 1/2] ARM: dts: microchip: sama7g5: Adjust clock xtal phandle

[Ryan.Wanner]

From: Ryan Wanner <Ryan.Wanner@microchip.com>

Adjust clock xtal phandles to match the new xtal phandle formatting.

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
 arch/arm/boot/dts/microchip/at91-sama7g5ek.dts | 18 ++++++++----------
 arch/arm/boot/dts/microchip/sama7g5.dtsi       |  6 ++++--
 2 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts b/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts
index 2543599013b1..79bf58f8c02e 100644
--- a/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts
+++ b/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts
@@ -35,16 +35,6 @@ aliases {
 		i2c2 = &i2c9;
 	};
 
-	clocks {
-		slow_xtal {
-			clock-frequency = <32768>;
-		};
-
-		main_xtal {
-			clock-frequency = <24000000>;
-		};
-	};
-
 	gpio-keys {
 		compatible = "gpio-keys";
 
@@ -512,6 +502,10 @@ spi11: spi@400 {
 	};
 };
 
+&main_xtal {
+	clock-frequency = <24000000>;
+};
+
 &gmac0 {
 	#address-cells = <1>;
 	#size-cells = <0>;
@@ -917,3 +911,7 @@ &vddout25 {
 	vin-supply = <&vdd_3v3>;
 	status = "okay";
 };
+
+&slow_xtal {
+	clock-frequency = <32768>;
+};
diff --git a/arch/arm/boot/dts/microchip/sama7g5.dtsi b/arch/arm/boot/dts/microchip/sama7g5.dtsi
index 17bcdcf0cf4a..411db7e375a6 100644
--- a/arch/arm/boot/dts/microchip/sama7g5.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7g5.dtsi
@@ -117,13 +117,15 @@ map1 {
 	};
 
 	clocks {
-		slow_xtal: slow_xtal {
+		slow_xtal: clock-slowxtal {
 			compatible = "fixed-clock";
+			clock-output-names = "slow_xtal";
 			#clock-cells = <0>;
 		};
 
-		main_xtal: main_xtal {
+		main_xtal: clock-mainxtal {
 			compatible = "fixed-clock";
+			clock-output-names = "main_xtal";
 			#clock-cells = <0>;
 		};
 
-- 
2.43.0

Re: [PATCH v4 1/2] ARM: dts: microchip: sama7g5: Adjust clock xtal phandle

[Claudiu Beznea]

Hi, Ryan,

On 23.05.2025 23:24, Ryan.Wanner@microchip.com wrote:
> From: Ryan Wanner <Ryan.Wanner@microchip.com>
> 
> Adjust clock xtal phandles to match the new xtal phandle formatting.
> 
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
>  arch/arm/boot/dts/microchip/at91-sama7g5ek.dts | 18 ++++++++----------
>  arch/arm/boot/dts/microchip/sama7g5.dtsi       |  6 ++++--
>  2 files changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts b/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts
> index 2543599013b1..79bf58f8c02e 100644
> --- a/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts
> +++ b/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts
> @@ -35,16 +35,6 @@ aliases {
>  		i2c2 = &i2c9;
>  	};
>  
> -	clocks {
> -		slow_xtal {
> -			clock-frequency = <32768>;
> -		};
> -
> -		main_xtal {
> -			clock-frequency = <24000000>;
> -		};
> -	};
> -
>  	gpio-keys {
>  		compatible = "gpio-keys";
>  
> @@ -512,6 +502,10 @@ spi11: spi@400 {
>  	};
>  };
>  
> +&main_xtal {
> +	clock-frequency = <24000000>;
> +};
> +

Please keep it alphanumerically sorted.

>  &gmac0 {
>  	#address-cells = <1>;
>  	#size-cells = <0>;
> @@ -917,3 +911,7 @@ &vddout25 {
>  	vin-supply = <&vdd_3v3>;
>  	status = "okay";
>  };
> +
> +&slow_xtal {
> +	clock-frequency = <32768>;
> +};

Same for this one.

> diff --git a/arch/arm/boot/dts/microchip/sama7g5.dtsi b/arch/arm/boot/dts/microchip/sama7g5.dtsi
> index 17bcdcf0cf4a..411db7e375a6 100644
> --- a/arch/arm/boot/dts/microchip/sama7g5.dtsi
> +++ b/arch/arm/boot/dts/microchip/sama7g5.dtsi
> @@ -117,13 +117,15 @@ map1 {
>  	};
>  
>  	clocks {
> -		slow_xtal: slow_xtal {
> +		slow_xtal: clock-slowxtal {
>  			compatible = "fixed-clock";
> +			clock-output-names = "slow_xtal";
>  			#clock-cells = <0>;
>  		};
>  
> -		main_xtal: main_xtal {
> +		main_xtal: clock-mainxtal {
>  			compatible = "fixed-clock";
> +			clock-output-names = "main_xtal";
>  			#clock-cells = <0>;
>  		};

While at it, can you please also address usb_clk ?

Thank you,
Claudiu

[PATCH v4 2/2] ARM: dts: microchip: sama7d65: Add clock name property

[Ryan.Wanner]

From: Ryan Wanner <Ryan.Wanner@microchip.com>

Add clock-output-names to the xtal nodes, so the driver can correctly
register the main and slow xtal.

This fixes the issue of the SoC clock driver not being able to find
the main xtal and slow xtal correctly causing a bad clock tree.

Fixes: 261dcfad1b59 ("ARM: dts: microchip: add sama7d65 SoC DT")
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
 arch/arm/boot/dts/microchip/sama7d65.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
index b6710ccd4c36..7b1dd28a2cfa 100644
--- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
+++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
@@ -38,11 +38,13 @@ cpu0: cpu@0 {
 	clocks {
 		main_xtal: clock-mainxtal {
 			compatible = "fixed-clock";
+			clock-output-names = "main_xtal";
 			#clock-cells = <0>;
 		};
 
 		slow_xtal: clock-slowxtal {
 			compatible = "fixed-clock";
+			clock-output-names = "slow_xtal";
 			#clock-cells = <0>;
 		};
 	};
-- 
2.43.0

Re: [PATCH v4 2/2] ARM: dts: microchip: sama7d65: Add clock name property

[Claudiu Beznea]

Hi, Ryan,

On 23.05.2025 23:24, Ryan.Wanner@microchip.com wrote:
> From: Ryan Wanner <Ryan.Wanner@microchip.com>
> 
> Add clock-output-names to the xtal nodes, so the driver can correctly
> register the main and slow xtal.
> 
> This fixes the issue of the SoC clock driver not being able to find
> the main xtal and slow xtal correctly causing a bad clock tree.
> 
> Fixes: 261dcfad1b59 ("ARM: dts: microchip: add sama7d65 SoC DT")

Can you please prepare a similar fix for sam9x7. It is also affected by
this, right?

Thank you,
Claudiu

> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
>  arch/arm/boot/dts/microchip/sama7d65.dtsi | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
> index b6710ccd4c36..7b1dd28a2cfa 100644
> --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
> +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
> @@ -38,11 +38,13 @@ cpu0: cpu@0 {
>  	clocks {
>  		main_xtal: clock-mainxtal {
>  			compatible = "fixed-clock";
> +			clock-output-names = "main_xtal";
>  			#clock-cells = <0>;
>  		};
>  
>  		slow_xtal: clock-slowxtal {
>  			compatible = "fixed-clock";
> +			clock-output-names = "slow_xtal";
>  			#clock-cells = <0>;
>  		};
>  	};

Re: [PATCH v4 2/2] ARM: dts: microchip: sama7d65: Add clock name property

[Ryan Wanner]

On 6/7/25 04:57, Claudiu Beznea wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Hi, Ryan,
> 
> On 23.05.2025 23:24, Ryan.Wanner@microchip.com wrote:
>> From: Ryan Wanner <Ryan.Wanner@microchip.com>
>>
>> Add clock-output-names to the xtal nodes, so the driver can correctly
>> register the main and slow xtal.
>>
>> This fixes the issue of the SoC clock driver not being able to find
>> the main xtal and slow xtal correctly causing a bad clock tree.
>>
>> Fixes: 261dcfad1b59 ("ARM: dts: microchip: add sama7d65 SoC DT")
> 
> Can you please prepare a similar fix for sam9x7. It is also affected by
> this, right?
The driver looks for the xtal differently in the sam9x75 than in the
SAMA7 clock drivers, so it is not immediately affected. But I will add a
sam9x7 in the v2 of the patch since in the future it will be needed.

Thank you,
Ryan
> 
> Thank you,
> Claudiu
> 
>> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
>> ---
>>  arch/arm/boot/dts/microchip/sama7d65.dtsi | 2 ++
>>  1 file changed, 2 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi
>> index b6710ccd4c36..7b1dd28a2cfa 100644
>> --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi
>> +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi
>> @@ -38,11 +38,13 @@ cpu0: cpu@0 {
>>       clocks {
>>               main_xtal: clock-mainxtal {
>>                       compatible = "fixed-clock";
>> +                     clock-output-names = "main_xtal";
>>                       #clock-cells = <0>;
>>               };
>>
>>               slow_xtal: clock-slowxtal {
>>                       compatible = "fixed-clock";
>> +                     clock-output-names = "slow_xtal";
>>                       #clock-cells = <0>;
>>               };
>>       };
>