* [PATCH v4 00/31] clk: at91: add support for parent_data and
@ 2025-09-18 21:15 Ryan.Wanner
2025-09-18 21:15 ` [PATCH v4 01/31] clk: at91: pmc: add macros for clk_parent_data Ryan.Wanner
` (30 more replies)
0 siblings, 31 replies; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:15 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran,
Ryan Wanner
From: Ryan Wanner <Ryan.Wanner@microchip.com>
This series adds support for parent data and parent _hw on the at91
clock drivers. This also updates all the SoC specific clock drivers to
use this format as well.
This is a continuation of the V1 of this series here [1].
This has been tested on the SAMA5* SoCs, the sam9x* SoCs, and the SAMA7*
SoCs.
Changes v1 -> V2:
- Remove all the small sama7g54 SoC driver changes and put them in their
own patch.
- Add the SAMA7D65 and the SAM9X75 to this update.
- Add a patch to move all common used macros into the pmc.h file.
- Update changes from v6.6 to v6.16.
- Remove patches that where style fixes and include those in the update.
Changes v2 -> v3:
- Adjust each patch so they are fully atomic.
- Add a patch to have the SAMA7D65 systemclocks use parent_data and
parent_hw.
- Add a formatting cleanup patch for the SAM9X75.
- Adjust commit messages that no longer show invalid information.
Changes v3 -> v4:
- Adjusted the AT91_CLK_PD macros to not use the index and use the name
and HW.
- Adjust the commit message for the sam9x7 to descibe the changes
better.
- Remove the usage of clock indexes and use of_clk_get_parent_name().
- Adjust commit messages to better describe the changes.
1) https://lore.kernel.org/all/20230727053156.13587-1-claudiu.beznea@tuxon.dev/
Claudiu Beznea (28):
clk: at91: pmc: add macros for clk_parent_data
clk: at91: clk-sam9x60-pll: use clk_parent_data
clk: at91: clk-peripheral: switch to clk_parent_data
clk: at91: clk-main: switch to clk parent data
clk: at91: clk-utmi: use clk_parent_data
clk: at91: clk-master: use clk_parent_data
clk: at91: clk-programmable: use clk_parent_data
clk: at91: clk-generated: use clk_parent_data
clk: at91: clk-usb: add support for clk_parent_data
clk: at91: clk-system: use clk_parent_data
clk: at91: clk-pll: add support for parent_hw
clk: at91: clk-audio-pll: add support for parent_hw
clk: at91: clk-plldiv: add support for parent_hw
clk: at91: clk-h32mx: add support for parent_hw
clk: at91: clk-i2s-mux: add support for parent_hw
clk: at91: clk-smd: add support for clk_parent_data
clk: at91: clk-slow: add support for parent_hw
clk: at91: dt-compat: switch to parent_hw and parent_data
clk: at91: sam9x60: switch to parent_hw and parent_data
clk: at91: sama5d2: switch to parent_hw and parent_data
clk: at91: sama5d3: switch to parent_hw and parent_data
clk: at91: sama5d4: switch to parent_hw and parent_data
clk: at91: at91sam9x5: switch to parent_hw and parent_data
clk: at91: at91rm9200: switch to parent_hw and parent_data
clk: at91: at91sam9260: switch to parent_hw and parent_data
clk: at91: at91sam9g45: switch to parent_hw and parent_data
clk: at91: at91sam9n12: switch to parent_hw and parent_data
clk: at91: at91sam9rl: switch to clk_parent_data
Ryan Wanner (3):
clk: at91: pmc: Move macro to header file
clk: at91: sam9x75: switch to parent_hw and parent_data
clk: at91: sama7d65: switch to parent_hw and parent_data
drivers/clk/at91/at91rm9200.c | 79 ++++---
drivers/clk/at91/at91sam9260.c | 120 ++++++-----
drivers/clk/at91/at91sam9g45.c | 73 ++++---
drivers/clk/at91/at91sam9n12.c | 90 ++++----
drivers/clk/at91/at91sam9rl.c | 49 +++--
drivers/clk/at91/at91sam9x5.c | 108 +++++-----
drivers/clk/at91/clk-audio-pll.c | 28 ++-
drivers/clk/at91/clk-generated.c | 8 +-
drivers/clk/at91/clk-h32mx.c | 11 +-
drivers/clk/at91/clk-i2s-mux.c | 6 +-
drivers/clk/at91/clk-main.c | 16 +-
drivers/clk/at91/clk-master.c | 24 +--
drivers/clk/at91/clk-peripheral.c | 16 +-
drivers/clk/at91/clk-pll.c | 9 +-
drivers/clk/at91/clk-plldiv.c | 11 +-
drivers/clk/at91/clk-programmable.c | 8 +-
drivers/clk/at91/clk-sam9x60-pll.c | 14 +-
drivers/clk/at91/clk-slow.c | 8 +-
drivers/clk/at91/clk-smd.c | 10 +-
drivers/clk/at91/clk-system.c | 8 +-
drivers/clk/at91/clk-usb.c | 41 ++--
drivers/clk/at91/clk-utmi.c | 16 +-
drivers/clk/at91/dt-compat.c | 80 ++++---
drivers/clk/at91/pmc.h | 68 +++---
drivers/clk/at91/sam9x60.c | 101 +++++----
drivers/clk/at91/sam9x7.c | 315 ++++++++++++++++------------
drivers/clk/at91/sama5d2.c | 157 +++++++-------
drivers/clk/at91/sama5d3.c | 112 +++++-----
drivers/clk/at91/sama5d4.c | 118 ++++++-----
drivers/clk/at91/sama7d65.c | 156 +++++++-------
drivers/clk/at91/sama7g5.c | 112 +++++-----
31 files changed, 1124 insertions(+), 848 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 54+ messages in thread
* [PATCH v4 01/31] clk: at91: pmc: add macros for clk_parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
@ 2025-09-18 21:15 ` Ryan.Wanner
2025-10-20 19:40 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 02/31] clk: at91: pmc: Move macro to header file Ryan.Wanner
` (29 subsequent siblings)
30 siblings, 1 reply; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:15 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Add helpers to set parent_data objects in platform specific drivers.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
[ryan.wanner@microchip.com: enclose complex macro with parentheses.]
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/pmc.h | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index 5daa32c4cf25..4a416d227c50 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -15,6 +15,14 @@
#include <dt-bindings/clock/at91.h>
+#define AT91_CLK_PD_NAME(n) ((struct clk_parent_data){ \
+ .hw = NULL, .name = (n), .fw_name = NULL, .index = -1, \
+})
+
+#define AT91_CLK_PD_HW(h) ((struct clk_parent_data){\
+ .hw = (h), .name = NULL, .fw_name = NULL, .index = -1, \
+})
+
extern spinlock_t pmc_pcr_lock;
struct pmc_data {
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 02/31] clk: at91: pmc: Move macro to header file
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
2025-09-18 21:15 ` [PATCH v4 01/31] clk: at91: pmc: add macros for clk_parent_data Ryan.Wanner
@ 2025-09-18 21:15 ` Ryan.Wanner
2025-09-18 21:15 ` [PATCH v4 03/31] clk: at91: sam9x75: switch to parent_hw and parent_data Ryan.Wanner
` (28 subsequent siblings)
30 siblings, 0 replies; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:15 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran,
Ryan Wanner
From: Ryan Wanner <Ryan.Wanner@microchip.com>
Move this macro to the header file as it is used by more than one driver
file.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/pmc.h | 3 +++
drivers/clk/at91/sama7d65.c | 3 ---
drivers/clk/at91/sama7g5.c | 3 ---
3 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index 4a416d227c50..16c2559889aa 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -23,6 +23,9 @@
.hw = (h), .name = NULL, .fw_name = NULL, .index = -1, \
})
+/* Used to create an array entry identifying a PLL by its components. */
+#define PLL_IDS_TO_ARR_ENTRY(_id, _comp) { PLL_ID_##_id, PLL_COMPID_##_comp}
+
extern spinlock_t pmc_pcr_lock;
struct pmc_data {
diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
index 7dee2b160ffb..ec2ef1a0249a 100644
--- a/drivers/clk/at91/sama7d65.c
+++ b/drivers/clk/at91/sama7d65.c
@@ -432,9 +432,6 @@ static struct sama7d65_pll {
},
};
-/* Used to create an array entry identifying a PLL by its components. */
-#define PLL_IDS_TO_ARR_ENTRY(_id, _comp) { PLL_ID_##_id, PLL_COMPID_##_comp}
-
/*
* Master clock (MCK[0..9]) description
* @n: clock name
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index 1340c2b00619..713f5dfe7be2 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -343,9 +343,6 @@ static struct sama7g5_pll {
},
};
-/* Used to create an array entry identifying a PLL by its components. */
-#define PLL_IDS_TO_ARR_ENTRY(_id, _comp) { PLL_ID_##_id, PLL_COMPID_##_comp}
-
/*
* Master clock (MCK[1..4]) description
* @n: clock name
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 03/31] clk: at91: sam9x75: switch to parent_hw and parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
2025-09-18 21:15 ` [PATCH v4 01/31] clk: at91: pmc: add macros for clk_parent_data Ryan.Wanner
2025-09-18 21:15 ` [PATCH v4 02/31] clk: at91: pmc: Move macro to header file Ryan.Wanner
@ 2025-09-18 21:15 ` Ryan.Wanner
2025-10-20 19:38 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 04/31] clk: at91: clk-sam9x60-pll: use clk_parent_data Ryan.Wanner
` (27 subsequent siblings)
30 siblings, 1 reply; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:15 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran,
Ryan Wanner
From: Ryan Wanner <Ryan.Wanner@microchip.com>
Switch SAM9X75 clocks to use parent_hw and parent_data. Having
parent_hw instead of parent names improves to clock registration
speed and re-parenting.
The USBCLK will be updated in subsequent patches that update the clock
registration functions to use parent_hw and parent_data.
__clk_get_hw() will be removed in subsequent patches in this series.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/sam9x7.c | 308 +++++++++++++++++++++-----------------
1 file changed, 173 insertions(+), 135 deletions(-)
diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
index 89868a0aeaba..cb5849da494f 100644
--- a/drivers/clk/at91/sam9x7.c
+++ b/drivers/clk/at91/sam9x7.c
@@ -33,10 +33,22 @@ enum pll_ids {
PLL_ID_UPLL,
PLL_ID_AUDIO,
PLL_ID_LVDS,
- PLL_ID_PLLA_DIV2,
PLL_ID_MAX,
};
+/*
+ * PLL component identifier
+ * @PLL_COMPID_FRAC: Fractional PLL component identifier
+ * @PLL_COMPID_DIV0: 1st PLL divider component identifier
+ * @PLL_COMPID_DIV1: 2nd PLL divider component identifier
+ */
+enum pll_component_id {
+ PLL_COMPID_FRAC,
+ PLL_COMPID_DIV0,
+ PLL_COMPID_DIV1,
+ PLL_COMPID_MAX,
+};
+
/**
* enum pll_type - PLL type identifiers
* @PLL_TYPE_FRAC: fractional PLL identifier
@@ -185,6 +197,18 @@ static const struct clk_pll_layout pll_divio_layout = {
.endiv_shift = 30,
};
+/*
+ * SAM9X7 PLL possible parents
+ * @SAM9X7_PLL_PARENT_MAINCK: MAINCK is PLL a parent
+ * @SAM9X7_PLL_PARENT_MAIN_XTAL: MAIN XTAL is a PLL parent
+ * @SAM9X7_PLL_PARENT_FRACCK: Frac PLL is a PLL parent (for PLL dividers)
+ */
+enum sam9x7_pll_parent {
+ SAM9X7_PLL_PARENT_MAINCK,
+ SAM9X7_PLL_PARENT_MAIN_XTAL,
+ SAM9X7_PLL_PARENT_FRACCK
+};
+
/*
* PLL clocks description
* @n: clock name
@@ -192,22 +216,24 @@ static const struct clk_pll_layout pll_divio_layout = {
* @l: clock layout
* @t: clock type
* @c: pll characteristics
+ * @hw: pointer to clk_hw
* @f: clock flags
* @eid: export index in sam9x7->chws[] array
*/
-static const struct {
+static struct {
const char *n;
- const char *p;
const struct clk_pll_layout *l;
u8 t;
const struct clk_pll_characteristics *c;
+ struct clk_hw *hw;
unsigned long f;
+ enum sam9x7_pll_parent p;
u8 eid;
-} sam9x7_plls[][3] = {
+} sam9x7_plls[][PLL_COMPID_MAX] = {
[PLL_ID_PLLA] = {
- {
+ [PLL_COMPID_FRAC] = {
.n = "plla_fracck",
- .p = "mainck",
+ .p = SAM9X7_PLL_PARENT_MAINCK,
.l = &plla_frac_layout,
.t = PLL_TYPE_FRAC,
/*
@@ -218,9 +244,9 @@ static const struct {
.c = &plla_characteristics,
},
- {
+ [PLL_COMPID_DIV0] = {
.n = "plla_divpmcck",
- .p = "plla_fracck",
+ .p = SAM9X7_PLL_PARENT_FRACCK,
.l = &pll_divpmc_layout,
.t = PLL_TYPE_DIV,
/* This feeds CPU. It should not be disabled */
@@ -228,21 +254,35 @@ static const struct {
.eid = PMC_PLLACK,
.c = &plla_characteristics,
},
+
+ [PLL_COMPID_DIV1] = {
+ .n = "plla_div2pmcck",
+ .p = SAM9X7_PLL_PARENT_FRACCK,
+ .l = &plladiv2_divpmc_layout,
+ /*
+ * This may feed critical parts of the system like timers.
+ * It should not be disabled.
+ */
+ .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
+ .c = &plladiv2_characteristics,
+ .eid = PMC_PLLADIV2,
+ .t = PLL_TYPE_DIV,
+ },
},
[PLL_ID_UPLL] = {
- {
+ [PLL_COMPID_FRAC] = {
.n = "upll_fracck",
- .p = "main_osc",
+ .p = SAM9X7_PLL_PARENT_MAIN_XTAL,
.l = &pll_frac_layout,
.t = PLL_TYPE_FRAC,
.f = CLK_SET_RATE_GATE,
.c = &upll_characteristics,
},
- {
+ [PLL_COMPID_DIV0] = {
.n = "upll_divpmcck",
- .p = "upll_fracck",
+ .p = SAM9X7_PLL_PARENT_FRACCK,
.l = &pll_divpmc_layout,
.t = PLL_TYPE_DIV,
.f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
@@ -253,18 +293,18 @@ static const struct {
},
[PLL_ID_AUDIO] = {
- {
+ [PLL_COMPID_FRAC] = {
.n = "audiopll_fracck",
- .p = "main_osc",
+ .p = SAM9X7_PLL_PARENT_MAIN_XTAL,
.l = &pll_frac_layout,
.f = CLK_SET_RATE_GATE,
.c = &audiopll_characteristics,
.t = PLL_TYPE_FRAC,
},
- {
+ [PLL_COMPID_DIV0] = {
.n = "audiopll_divpmcck",
- .p = "audiopll_fracck",
+ .p = SAM9X7_PLL_PARENT_FRACCK,
.l = &pll_divpmc_layout,
.f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
CLK_SET_RATE_PARENT,
@@ -273,9 +313,9 @@ static const struct {
.t = PLL_TYPE_DIV,
},
- {
+ [PLL_COMPID_DIV1] = {
.n = "audiopll_diviock",
- .p = "audiopll_fracck",
+ .p = SAM9X7_PLL_PARENT_FRACCK,
.l = &pll_divio_layout,
.f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
CLK_SET_RATE_PARENT,
@@ -286,18 +326,18 @@ static const struct {
},
[PLL_ID_LVDS] = {
- {
+ [PLL_COMPID_FRAC] = {
.n = "lvdspll_fracck",
- .p = "main_osc",
+ .p = SAM9X7_PLL_PARENT_MAIN_XTAL,
.l = &pll_frac_layout,
.f = CLK_SET_RATE_GATE,
.c = &lvdspll_characteristics,
.t = PLL_TYPE_FRAC,
},
- {
+ [PLL_COMPID_DIV0] = {
.n = "lvdspll_divpmcck",
- .p = "lvdspll_fracck",
+ .p = SAM9X7_PLL_PARENT_FRACCK,
.l = &pll_divpmc_layout,
.f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
CLK_SET_RATE_PARENT,
@@ -306,22 +346,6 @@ static const struct {
.t = PLL_TYPE_DIV,
},
},
-
- [PLL_ID_PLLA_DIV2] = {
- {
- .n = "plla_div2pmcck",
- .p = "plla_fracck",
- .l = &plladiv2_divpmc_layout,
- /*
- * This may feed critical parts of the system like timers.
- * It should not be disabled.
- */
- .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
- .c = &plladiv2_characteristics,
- .eid = PMC_PLLADIV2,
- .t = PLL_TYPE_DIV,
- },
- },
};
static const struct clk_programmable_layout sam9x7_programmable_layout = {
@@ -339,9 +363,9 @@ static const struct clk_pcr_layout sam9x7_pcr_layout = {
.pid_mask = GENMASK(6, 0),
};
-static const struct {
+static struct {
char *n;
- char *p;
+ struct clk_hw *parent_hw;
u8 id;
unsigned long flags;
} sam9x7_systemck[] = {
@@ -349,10 +373,10 @@ static const struct {
* ddrck feeds DDR controller and is enabled by bootloader thus we need
* to keep it enabled in case there is no Linux consumer for it.
*/
- { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL },
- { .n = "uhpck", .p = "usbck", .id = 6 },
- { .n = "pck0", .p = "prog0", .id = 8 },
- { .n = "pck1", .p = "prog1", .id = 9 },
+ { .n = "ddrck", .id = 2, .flags = CLK_IS_CRITICAL },
+ { .n = "uhpck", .id = 6 },
+ { .n = "pck0", .id = 8 },
+ { .n = "pck1", .id = 9 },
};
/*
@@ -426,7 +450,8 @@ static const struct {
/*
* Generic clock description
* @n: clock name
- * @pp: PLL parents
+ * @pp: PLL parents (entry formed by PLL components identifiers
+ * (see enum pll_component_id))
* @pp_mux_table: PLL parents mux table
* @r: clock output range
* @pp_chg_id: id in parent array of changeable PLL parent
@@ -435,7 +460,10 @@ static const struct {
*/
static const struct {
const char *n;
- const char *pp[8];
+ struct {
+ int pll_id;
+ int pll_compid;
+ } pp[8];
const char pp_mux_table[8];
struct clk_range r;
int pp_chg_id;
@@ -445,7 +473,7 @@ static const struct {
{
.n = "flex0_gclk",
.id = 5,
- .pp = { "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 8, },
.pp_count = 1,
.pp_chg_id = INT_MIN,
@@ -454,7 +482,7 @@ static const struct {
{
.n = "flex1_gclk",
.id = 6,
- .pp = { "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 8, },
.pp_count = 1,
.pp_chg_id = INT_MIN,
@@ -463,7 +491,7 @@ static const struct {
{
.n = "flex2_gclk",
.id = 7,
- .pp = { "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 8, },
.pp_count = 1,
.pp_chg_id = INT_MIN,
@@ -472,7 +500,7 @@ static const struct {
{
.n = "flex3_gclk",
.id = 8,
- .pp = { "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 8, },
.pp_count = 1,
.pp_chg_id = INT_MIN,
@@ -481,7 +509,7 @@ static const struct {
{
.n = "flex6_gclk",
.id = 9,
- .pp = { "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 8, },
.pp_count = 1,
.pp_chg_id = INT_MIN,
@@ -490,7 +518,7 @@ static const struct {
{
.n = "flex7_gclk",
.id = 10,
- .pp = { "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 8, },
.pp_count = 1,
.pp_chg_id = INT_MIN,
@@ -499,7 +527,7 @@ static const struct {
{
.n = "flex8_gclk",
.id = 11,
- .pp = { "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 8, },
.pp_count = 1,
.pp_chg_id = INT_MIN,
@@ -509,7 +537,7 @@ static const struct {
.n = "sdmmc0_gclk",
.id = 12,
.r = { .max = 105000000 },
- .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 6, 8, },
.pp_count = 2,
.pp_chg_id = INT_MIN,
@@ -518,7 +546,7 @@ static const struct {
{
.n = "flex4_gclk",
.id = 13,
- .pp = { "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 8, },
.pp_count = 1,
.pp_chg_id = INT_MIN,
@@ -527,7 +555,7 @@ static const struct {
{
.n = "flex5_gclk",
.id = 14,
- .pp = { "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 8, },
.pp_count = 1,
.pp_chg_id = INT_MIN,
@@ -536,7 +564,7 @@ static const struct {
{
.n = "flex9_gclk",
.id = 15,
- .pp = { "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 8, },
.pp_count = 1,
.pp_chg_id = INT_MIN,
@@ -545,7 +573,7 @@ static const struct {
{
.n = "flex10_gclk",
.id = 16,
- .pp = { "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 8, },
.pp_count = 1,
.pp_chg_id = INT_MIN,
@@ -554,7 +582,7 @@ static const struct {
{
.n = "tcb0_gclk",
.id = 17,
- .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 6, 8, },
.pp_count = 2,
.pp_chg_id = INT_MIN,
@@ -563,7 +591,7 @@ static const struct {
{
.n = "adc_gclk",
.id = 19,
- .pp = { "upll_divpmcck", "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(UPLL, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 5, 8, },
.pp_count = 2,
.pp_chg_id = INT_MIN,
@@ -573,7 +601,7 @@ static const struct {
.n = "lcd_gclk",
.id = 25,
.r = { .max = 75000000 },
- .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 6, 8, },
.pp_count = 2,
.pp_chg_id = INT_MIN,
@@ -583,7 +611,7 @@ static const struct {
.n = "sdmmc1_gclk",
.id = 26,
.r = { .max = 105000000 },
- .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 6, 8, },
.pp_count = 2,
.pp_chg_id = INT_MIN,
@@ -593,7 +621,7 @@ static const struct {
.n = "mcan0_gclk",
.id = 29,
.r = { .max = 80000000 },
- .pp = { "upll_divpmcck", "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(UPLL, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 5, 8, },
.pp_count = 2,
.pp_chg_id = INT_MIN,
@@ -603,7 +631,7 @@ static const struct {
.n = "mcan1_gclk",
.id = 30,
.r = { .max = 80000000 },
- .pp = { "upll_divpmcck", "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(UPLL, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 5, 8, },
.pp_count = 2,
.pp_chg_id = INT_MIN,
@@ -612,7 +640,7 @@ static const struct {
{
.n = "flex11_gclk",
.id = 32,
- .pp = { "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 8, },
.pp_count = 1,
.pp_chg_id = INT_MIN,
@@ -621,7 +649,7 @@ static const struct {
{
.n = "flex12_gclk",
.id = 33,
- .pp = { "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 8, },
.pp_count = 1,
.pp_chg_id = INT_MIN,
@@ -631,7 +659,7 @@ static const struct {
.n = "i2s_gclk",
.id = 34,
.r = { .max = 100000000 },
- .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 6, 8, },
.pp_count = 2,
.pp_chg_id = INT_MIN,
@@ -641,7 +669,7 @@ static const struct {
.n = "qspi_gclk",
.id = 35,
.r = { .max = 200000000 },
- .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 6, 8, },
.pp_count = 2,
.pp_chg_id = INT_MIN,
@@ -650,7 +678,7 @@ static const struct {
{
.n = "pit64b0_gclk",
.id = 37,
- .pp = { "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 8, },
.pp_count = 1,
.pp_chg_id = INT_MIN,
@@ -660,7 +688,7 @@ static const struct {
.n = "classd_gclk",
.id = 42,
.r = { .max = 100000000 },
- .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 6, 8, },
.pp_count = 2,
.pp_chg_id = INT_MIN,
@@ -669,7 +697,7 @@ static const struct {
{
.n = "tcb1_gclk",
.id = 45,
- .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 6, 8, },
.pp_count = 2,
.pp_chg_id = INT_MIN,
@@ -678,7 +706,7 @@ static const struct {
{
.n = "dbgu_gclk",
.id = 47,
- .pp = { "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 8, },
.pp_count = 1,
.pp_chg_id = INT_MIN,
@@ -688,7 +716,7 @@ static const struct {
.n = "mipiphy_gclk",
.id = 55,
.r = { .max = 27000000 },
- .pp = { "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 8, },
.pp_count = 1,
.pp_chg_id = INT_MIN,
@@ -697,7 +725,7 @@ static const struct {
{
.n = "pit64b1_gclk",
.id = 58,
- .pp = { "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 8, },
.pp_count = 1,
.pp_chg_id = INT_MIN,
@@ -706,7 +734,7 @@ static const struct {
{
.n = "gmac_gclk",
.id = 67,
- .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
+ .pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
.pp_mux_table = { 6, 8, },
.pp_count = 2,
.pp_chg_id = INT_MIN,
@@ -716,33 +744,25 @@ static const struct {
static void __init sam9x7_pmc_setup(struct device_node *np)
{
struct clk_range range = CLK_RANGE(0, 0);
- const char *td_slck_name, *md_slck_name, *mainxtal_name;
+ const char *main_xtal_name;
struct pmc_data *sam9x7_pmc;
const char *parent_names[9];
void **clk_mux_buffer = NULL;
int clk_mux_buffer_size = 0;
- struct clk_hw *main_osc_hw;
struct regmap *regmap;
- struct clk_hw *hw;
+ struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
+ struct clk_hw *td_slck_hw, *md_slck_hw, *usbck_hw;
+ struct clk_hw *parent_hws[9];
int i, j;
- i = of_property_match_string(np, "clock-names", "td_slck");
- if (i < 0)
- return;
-
- td_slck_name = of_clk_get_parent_name(np, i);
-
- i = of_property_match_string(np, "clock-names", "md_slck");
- if (i < 0)
- return;
-
- md_slck_name = of_clk_get_parent_name(np, i);
-
+ td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "td_slck"));
+ md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "md_slck"));
i = of_property_match_string(np, "clock-names", "main_xtal");
- if (i < 0)
+
+ if (!td_slck_hw || !md_slck_hw || !i)
return;
- mainxtal_name = of_clk_get_parent_name(np, i);
+ main_xtal_name = of_clk_get_parent_name(np, i);
regmap = device_node_to_regmap(np);
if (IS_ERR(regmap))
return;
@@ -760,26 +780,25 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
if (!clk_mux_buffer)
goto err_free;
- hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
- 50000000);
- if (IS_ERR(hw))
+ main_rc_hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
+ 50000000);
+ if (IS_ERR(main_rc_hw))
goto err_free;
- hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, 0);
- if (IS_ERR(hw))
+ main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL, &AT91_CLK_PD_NAME(main_xtal_name), 0);
+ if (IS_ERR(main_osc_hw))
goto err_free;
- main_osc_hw = hw;
- parent_names[0] = "main_rc_osc";
- parent_names[1] = "main_osc";
- hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2);
+ parent_hws[0] = main_rc_hw;
+ parent_hws[1] = main_osc_hw;
+ hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_hws, 2);
if (IS_ERR(hw))
goto err_free;
sam9x7_pmc->chws[PMC_MAIN] = hw;
for (i = 0; i < PLL_ID_MAX; i++) {
- for (j = 0; j < 3; j++) {
+ for (j = 0; j < PLL_COMPID_MAX; j++) {
struct clk_hw *parent_hw;
if (!sam9x7_plls[i][j].n)
@@ -787,19 +806,23 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
switch (sam9x7_plls[i][j].t) {
case PLL_TYPE_FRAC:
- if (!strcmp(sam9x7_plls[i][j].p, "mainck"))
+ switch (sam9x7_plls[i][j].p) {
+ case SAM9X7_PLL_PARENT_MAINCK:
parent_hw = sam9x7_pmc->chws[PMC_MAIN];
- else if (!strcmp(sam9x7_plls[i][j].p, "main_osc"))
- parent_hw = main_osc_hw;
- else
- parent_hw = __clk_get_hw(of_clk_get_by_name
- (np, sam9x7_plls[i][j].p));
+ break;
+ case SAM9X7_PLL_PARENT_MAIN_XTAL:
+ parent_hw = main_xtal_hw;
+ break;
+ default:
+ /* Should not happen. */
+ parent_hw = NULL;
+ break;
+ }
hw = sam9x60_clk_register_frac_pll(regmap,
&pmc_pll_lock,
sam9x7_plls[i][j].n,
- sam9x7_plls[i][j].p,
- parent_hw, i,
+ NULL, parent_hw, i,
sam9x7_plls[i][j].c,
sam9x7_plls[i][j].l,
sam9x7_plls[i][j].f);
@@ -809,7 +832,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
hw = sam9x60_clk_register_div_pll(regmap,
&pmc_pll_lock,
sam9x7_plls[i][j].n,
- sam9x7_plls[i][j].p, NULL, i,
+ NULL, sam9x7_plls[i][0].hw, i,
sam9x7_plls[i][j].c,
sam9x7_plls[i][j].l,
sam9x7_plls[i][j].f, 0);
@@ -822,23 +845,24 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
if (IS_ERR(hw))
goto err_free;
+ sam9x7_plls[i][j].hw = hw;
if (sam9x7_plls[i][j].eid)
sam9x7_pmc->chws[sam9x7_plls[i][j].eid] = hw;
}
}
- parent_names[0] = md_slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "plla_divpmcck";
- parent_names[3] = "upll_divpmcck";
+ parent_hws[0] = md_slck_hw;
+ parent_hws[1] = sam9x7_pmc->chws[PMC_MAIN];
+ parent_hws[2] = sam9x7_plls[PLL_ID_PLLA][PLL_COMPID_DIV0].hw;
+ parent_hws[3] = sam9x7_plls[PLL_ID_UPLL][PLL_COMPID_DIV0].hw;
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
- parent_names, NULL, &sam9x7_master_layout,
+ NULL, parent_hws, &sam9x7_master_layout,
&mck_characteristics, &mck_lock);
if (IS_ERR(hw))
goto err_free;
hw = at91_clk_register_master_div(regmap, "masterck_div",
- "masterck_pres", NULL, &sam9x7_master_layout,
+ NULL, hw, &sam9x7_master_layout,
&mck_characteristics, &mck_lock,
CLK_SET_RATE_GATE, 0);
if (IS_ERR(hw))
@@ -849,24 +873,24 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
parent_names[0] = "plla_divpmcck";
parent_names[1] = "upll_divpmcck";
parent_names[2] = "main_osc";
- hw = sam9x60_clk_register_usb(regmap, "usbck", parent_names, 3);
- if (IS_ERR(hw))
+ usbck_hw = sam9x60_clk_register_usb(regmap, "usbck", parent_names, 3);
+ if (IS_ERR(usbck_hw))
goto err_free;
- parent_names[0] = md_slck_name;
- parent_names[1] = td_slck_name;
- parent_names[2] = "mainck";
- parent_names[3] = "masterck_div";
- parent_names[4] = "plla_divpmcck";
- parent_names[5] = "upll_divpmcck";
- parent_names[6] = "audiopll_divpmcck";
+ parent_hws[0] = md_slck_hw;
+ parent_hws[1] = td_slck_hw;
+ parent_hws[2] = sam9x7_pmc->chws[PMC_MAIN];
+ parent_hws[3] = sam9x7_pmc->chws[PMC_MCK];
+ parent_hws[4] = sam9x7_plls[PLL_ID_PLLA][PLL_COMPID_DIV0].hw;
+ parent_hws[5] = sam9x7_plls[PLL_ID_UPLL][PLL_COMPID_DIV0].hw;
+ parent_hws[6] = sam9x7_plls[PLL_ID_AUDIO][PLL_COMPID_DIV0].hw;
for (i = 0; i < 2; i++) {
char name[6];
snprintf(name, sizeof(name), "prog%d", i);
hw = at91_clk_register_programmable(regmap, name,
- parent_names, NULL, 7, i,
+ NULL, parent_hws, 7, i,
&sam9x7_programmable_layout,
NULL);
if (IS_ERR(hw))
@@ -875,9 +899,14 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
sam9x7_pmc->pchws[i] = hw;
}
+ /* Set systemck parent hws. */
+ sam9x7_systemck[0].parent_hw = sam9x7_pmc->chws[PMC_MCK];
+ sam9x7_systemck[1].parent_hw = usbck_hw;
+ sam9x7_systemck[2].parent_hw = sam9x7_pmc->pchws[0];
+ sam9x7_systemck[3].parent_hw = sam9x7_pmc->pchws[1];
for (i = 0; i < ARRAY_SIZE(sam9x7_systemck); i++) {
hw = at91_clk_register_system(regmap, sam9x7_systemck[i].n,
- sam9x7_systemck[i].p, NULL,
+ NULL, sam9x7_systemck[i].parent_hw,
sam9x7_systemck[i].id,
sam9x7_systemck[i].flags);
if (IS_ERR(hw))
@@ -890,7 +919,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
&sam9x7_pcr_layout,
sam9x7_periphck[i].n,
- "masterck_div", NULL,
+ NULL, sam9x7_pmc->chws[PMC_MCK],
sam9x7_periphck[i].id,
&range, INT_MIN,
sam9x7_periphck[i].f);
@@ -900,12 +929,13 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
sam9x7_pmc->phws[sam9x7_periphck[i].id] = hw;
}
- parent_names[0] = md_slck_name;
- parent_names[1] = td_slck_name;
- parent_names[2] = "mainck";
- parent_names[3] = "masterck_div";
+ parent_hws[0] = md_slck_hw;
+ parent_hws[1] = td_slck_hw;
+ parent_hws[2] = sam9x7_pmc->chws[PMC_MAIN];
+ parent_hws[3] = sam9x7_pmc->chws[PMC_MCK];
for (i = 0; i < ARRAY_SIZE(sam9x7_gck); i++) {
u8 num_parents = 4 + sam9x7_gck[i].pp_count;
+ struct clk_hw *tmp_parent_hws[6];
u32 *mux_table;
mux_table = kmalloc_array(num_parents, sizeof(*mux_table),
@@ -916,13 +946,21 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
PMC_INIT_TABLE(mux_table, 4);
PMC_FILL_TABLE(&mux_table[4], sam9x7_gck[i].pp_mux_table,
sam9x7_gck[i].pp_count);
- PMC_FILL_TABLE(&parent_names[4], sam9x7_gck[i].pp,
+
+ for (j = 0; j < sam9x7_gck[i].pp_count; j++) {
+ u8 pll_id = sam9x7_gck[i].pp[j].pll_id;
+ u8 pll_compid = sam9x7_gck[i].pp[j].pll_compid;
+
+ tmp_parent_hws[j] = sam9x7_plls[pll_id][pll_compid].hw;
+ }
+
+ PMC_FILL_TABLE(&parent_hws[4], tmp_parent_hws,
sam9x7_gck[i].pp_count);
hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,
&sam9x7_pcr_layout,
sam9x7_gck[i].n,
- parent_names, NULL, mux_table,
+ NULL, parent_hws, mux_table,
num_parents,
sam9x7_gck[i].id,
&sam9x7_gck[i].r,
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 04/31] clk: at91: clk-sam9x60-pll: use clk_parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (2 preceding siblings ...)
2025-09-18 21:15 ` [PATCH v4 03/31] clk: at91: sam9x75: switch to parent_hw and parent_data Ryan.Wanner
@ 2025-09-18 21:15 ` Ryan.Wanner
2025-10-20 19:41 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 05/31] clk: at91: clk-peripheral: switch to clk_parent_data Ryan.Wanner
` (26 subsequent siblings)
30 siblings, 1 reply; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:15 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Use struct clk_parent_data instead of struct parent_hw as this leads
to less usage of __clk_get_hw() in SoC specific clock drivers and simpler
conversion of existing SoC specific clock drivers from parent_names to
modern clk_parent_data structures. As clk-sam9x60-pll need to know
parent's rate at initialization we pass it now from SoC specific drivers.
This will lead in the end at removing __clk_get_hw() in SoC specific
drivers (that will be solved by subsequent commits).
Get the main_xtal name via of_clk_get_parent_name() to consistently get
the correct name for the main_xtal.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
[ryan.wanner@microchip.com: Add SAMA7D65 and SAM9X75 SoCs to the change set.]
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/clk-sam9x60-pll.c | 14 +++++---------
drivers/clk/at91/pmc.h | 5 +++--
drivers/clk/at91/sam9x60.c | 8 +++++---
drivers/clk/at91/sam9x7.c | 16 +++++++++++-----
drivers/clk/at91/sama7d65.c | 25 ++++++++++++++-----------
drivers/clk/at91/sama7g5.c | 26 +++++++++++++++-----------
6 files changed, 53 insertions(+), 41 deletions(-)
diff --git a/drivers/clk/at91/clk-sam9x60-pll.c b/drivers/clk/at91/clk-sam9x60-pll.c
index 3dc75a394ce1..9895881c67d7 100644
--- a/drivers/clk/at91/clk-sam9x60-pll.c
+++ b/drivers/clk/at91/clk-sam9x60-pll.c
@@ -630,19 +630,19 @@ static const struct clk_ops sam9x60_fixed_div_pll_ops = {
struct clk_hw * __init
sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock,
- const char *name, const char *parent_name,
- struct clk_hw *parent_hw, u8 id,
+ const char *name, const struct clk_parent_data *parent_data,
+ unsigned long parent_rate, u8 id,
const struct clk_pll_characteristics *characteristics,
const struct clk_pll_layout *layout, u32 flags)
{
struct sam9x60_frac *frac;
struct clk_hw *hw;
struct clk_init_data init = {};
- unsigned long parent_rate, irqflags;
+ unsigned long irqflags;
unsigned int val;
int ret;
- if (id > PLL_MAX_ID || !lock || !parent_hw)
+ if (id > PLL_MAX_ID || !lock || !parent_data)
return ERR_PTR(-EINVAL);
frac = kzalloc(sizeof(*frac), GFP_KERNEL);
@@ -650,10 +650,7 @@ sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock,
return ERR_PTR(-ENOMEM);
init.name = name;
- if (parent_name)
- init.parent_names = &parent_name;
- else
- init.parent_hws = (const struct clk_hw **)&parent_hw;
+ init.parent_data = (const struct clk_parent_data *)parent_data;
init.num_parents = 1;
if (flags & CLK_SET_RATE_GATE)
init.ops = &sam9x60_frac_pll_ops;
@@ -684,7 +681,6 @@ sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock,
* its rate leading to enabling this PLL with unsupported
* rate. This will lead to PLL not being locked at all.
*/
- parent_rate = clk_hw_get_rate(parent_hw);
if (!parent_rate) {
hw = ERR_PTR(-EINVAL);
goto free;
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index 16c2559889aa..d3fc38cf90eb 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -258,8 +258,9 @@ sam9x60_clk_register_div_pll(struct regmap *regmap, spinlock_t *lock,
struct clk_hw * __init
sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock,
- const char *name, const char *parent_name,
- struct clk_hw *parent_hw, u8 id,
+ const char *name,
+ const struct clk_parent_data *parent_data,
+ unsigned long parent_rate, u8 id,
const struct clk_pll_characteristics *characteristics,
const struct clk_pll_layout *layout, u32 flags);
diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
index 18baf4a256f4..bee35c65aceb 100644
--- a/drivers/clk/at91/sam9x60.c
+++ b/drivers/clk/at91/sam9x60.c
@@ -242,7 +242,8 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
sam9x60_pmc->chws[PMC_MAIN] = hw;
hw = sam9x60_clk_register_frac_pll(regmap, &pmc_pll_lock, "pllack_fracck",
- "mainck", sam9x60_pmc->chws[PMC_MAIN],
+ &AT91_CLK_PD_HW(sam9x60_pmc->chws[PMC_MAIN]),
+ clk_hw_get_rate(sam9x60_pmc->chws[PMC_MAIN]),
0, &plla_characteristics,
&pll_frac_layout,
/*
@@ -268,8 +269,9 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
sam9x60_pmc->chws[PMC_PLLACK] = hw;
hw = sam9x60_clk_register_frac_pll(regmap, &pmc_pll_lock, "upllck_fracck",
- "main_osc", main_osc_hw, 1,
- &upll_characteristics,
+ &AT91_CLK_PD_HW(main_osc_hw),
+ clk_hw_get_rate(main_osc_hw),
+ 1, &upll_characteristics,
&pll_frac_layout, CLK_SET_RATE_GATE);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
index cb5849da494f..c80306715d90 100644
--- a/drivers/clk/at91/sam9x7.c
+++ b/drivers/clk/at91/sam9x7.c
@@ -752,6 +752,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
struct regmap *regmap;
struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
struct clk_hw *td_slck_hw, *md_slck_hw, *usbck_hw;
+ static struct clk_parent_data parent_data;
struct clk_hw *parent_hws[9];
int i, j;
@@ -799,7 +800,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
for (i = 0; i < PLL_ID_MAX; i++) {
for (j = 0; j < PLL_COMPID_MAX; j++) {
- struct clk_hw *parent_hw;
+ unsigned long parent_rate;
if (!sam9x7_plls[i][j].n)
continue;
@@ -808,21 +809,26 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
case PLL_TYPE_FRAC:
switch (sam9x7_plls[i][j].p) {
case SAM9X7_PLL_PARENT_MAINCK:
- parent_hw = sam9x7_pmc->chws[PMC_MAIN];
+ parent_data = AT91_CLK_PD_NAME("mainck");
+ hw = sam9x7_pmc->chws[PMC_MAIN];
break;
case SAM9X7_PLL_PARENT_MAIN_XTAL:
- parent_hw = main_xtal_hw;
+ parent_data = AT91_CLK_PD_NAME(main_xtal_name);
+ hw = main_xtal_hw;
break;
default:
/* Should not happen. */
- parent_hw = NULL;
break;
}
+ parent_rate = clk_hw_get_rate(hw);
+ if (!parent_rate)
+ return;
+
hw = sam9x60_clk_register_frac_pll(regmap,
&pmc_pll_lock,
sam9x7_plls[i][j].n,
- NULL, parent_hw, i,
+ &parent_data, parent_rate, i,
sam9x7_plls[i][j].c,
sam9x7_plls[i][j].l,
sam9x7_plls[i][j].f);
diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
index ec2ef1a0249a..6229b7dfbea1 100644
--- a/drivers/clk/at91/sama7d65.c
+++ b/drivers/clk/at91/sama7d65.c
@@ -1093,7 +1093,7 @@ static const struct clk_pcr_layout sama7d65_pcr_layout = {
static void __init sama7d65_pmc_setup(struct device_node *np)
{
- const char *main_xtal_name = "main_xtal";
+ const char *main_xtal_name;
struct pmc_data *sama7d65_pmc;
const char *parent_names[11];
void **alloc_mem = NULL;
@@ -1108,10 +1108,11 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "td_slck"));
md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "md_slck"));
- main_xtal_hw = __clk_get_hw(of_clk_get_by_name(np, main_xtal_name));
+ i = of_property_match_string(np, "clock-names", "main_xtal");
- if (!td_slck_hw || !md_slck_hw || !main_xtal_hw)
+ if (!td_slck_hw || !md_slck_hw || !i)
return;
+ main_xtal_name = of_clk_get_parent_name(np, i);
regmap = device_node_to_regmap(np);
if (IS_ERR(regmap))
@@ -1137,10 +1138,8 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
bypass = of_property_read_bool(np, "atmel,osc-bypass");
- parent_data.name = main_xtal_name;
- parent_data.fw_name = main_xtal_name;
main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL,
- &parent_data, bypass);
+ &AT91_CLK_PD_NAME(main_xtal_name), bypass);
if (IS_ERR(main_osc_hw))
goto err_free;
@@ -1154,7 +1153,7 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
for (i = 0; i < PLL_ID_MAX; i++) {
for (j = 0; j < PLL_COMPID_MAX; j++) {
- struct clk_hw *parent_hw;
+ unsigned long parent_rate;
if (!sama7d65_plls[i][j].n)
continue;
@@ -1163,20 +1162,24 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
case PLL_TYPE_FRAC:
switch (sama7d65_plls[i][j].p) {
case SAMA7D65_PLL_PARENT_MAINCK:
- parent_hw = sama7d65_pmc->chws[PMC_MAIN];
+ parent_data = AT91_CLK_PD_NAME("mainck");
+ hw = sama7d65_pmc->chws[PMC_MAIN];
break;
case SAMA7D65_PLL_PARENT_MAIN_XTAL:
- parent_hw = main_xtal_hw;
+ parent_data = AT91_CLK_PD_NAME(main_xtal_name);
+ hw = main_xtal_hw;
break;
default:
/* Should not happen. */
- parent_hw = NULL;
break;
}
+ parent_rate = clk_hw_get_rate(hw);
+ if (!parent_rate)
+ return;
hw = sam9x60_clk_register_frac_pll(regmap,
&pmc_pll_lock, sama7d65_plls[i][j].n,
- NULL, parent_hw, i,
+ &parent_data, parent_rate, i,
sama7d65_plls[i][j].c,
sama7d65_plls[i][j].l,
sama7d65_plls[i][j].f);
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index 713f5dfe7be2..654c9f43fcf8 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -971,7 +971,7 @@ static const struct clk_pcr_layout sama7g5_pcr_layout = {
static void __init sama7g5_pmc_setup(struct device_node *np)
{
- const char *main_xtal_name = "main_xtal";
+ const char *main_xtal_name;
struct pmc_data *sama7g5_pmc;
void **alloc_mem = NULL;
int alloc_mem_size = 0;
@@ -985,10 +985,11 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "td_slck"));
md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "md_slck"));
- main_xtal_hw = __clk_get_hw(of_clk_get_by_name(np, main_xtal_name));
+ i = of_property_match_string(np, "clock-names", "main_xtal");
- if (!td_slck_hw || !md_slck_hw || !main_xtal_hw)
+ if (!td_slck_hw || !md_slck_hw || !i)
return;
+ main_xtal_name = of_clk_get_parent_name(np, i);
regmap = device_node_to_regmap(np);
if (IS_ERR(regmap))
@@ -1014,10 +1015,8 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
bypass = of_property_read_bool(np, "atmel,osc-bypass");
- parent_data.name = main_xtal_name;
- parent_data.fw_name = main_xtal_name;
main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL,
- &parent_data, bypass);
+ &AT91_CLK_PD_NAME(main_xtal_name), bypass);
if (IS_ERR(main_osc_hw))
goto err_free;
@@ -1031,7 +1030,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
for (i = 0; i < PLL_ID_MAX; i++) {
for (j = 0; j < PLL_COMPID_MAX; j++) {
- struct clk_hw *parent_hw;
+ unsigned long parent_rate;
if (!sama7g5_plls[i][j].n)
continue;
@@ -1040,20 +1039,25 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
case PLL_TYPE_FRAC:
switch (sama7g5_plls[i][j].p) {
case SAMA7G5_PLL_PARENT_MAINCK:
- parent_hw = sama7g5_pmc->chws[PMC_MAIN];
+ parent_data = AT91_CLK_PD_NAME("mainck");
+ hw = sama7g5_pmc->chws[PMC_MAIN];
break;
case SAMA7G5_PLL_PARENT_MAIN_XTAL:
- parent_hw = main_xtal_hw;
+ parent_data = AT91_CLK_PD_NAME(main_xtal_name);
+ hw = main_xtal_hw;
break;
default:
/* Should not happen. */
- parent_hw = NULL;
break;
}
+ parent_rate = clk_hw_get_rate(hw);
+ if (!parent_rate)
+ return;
+
hw = sam9x60_clk_register_frac_pll(regmap,
&pmc_pll_lock, sama7g5_plls[i][j].n,
- NULL, parent_hw, i,
+ &parent_data, parent_rate, i,
sama7g5_plls[i][j].c,
sama7g5_plls[i][j].l,
sama7g5_plls[i][j].f);
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 05/31] clk: at91: clk-peripheral: switch to clk_parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (3 preceding siblings ...)
2025-09-18 21:15 ` [PATCH v4 04/31] clk: at91: clk-sam9x60-pll: use clk_parent_data Ryan.Wanner
@ 2025-09-18 21:15 ` Ryan.Wanner
2025-10-20 19:41 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 06/31] clk: at91: clk-main: switch to clk parent data Ryan.Wanner
` (25 subsequent siblings)
30 siblings, 1 reply; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:15 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Use struct clk_parent_data instead of parent_hw for peripheral clocks.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
[ryan.wanner@microchip.com: Add SAMA7D65 and SAM9X7 SoCs to the use the
structs.]
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/clk-peripheral.c | 16 ++++++++--------
drivers/clk/at91/pmc.h | 4 ++--
drivers/clk/at91/sam9x7.c | 2 +-
drivers/clk/at91/sama7d65.c | 2 +-
drivers/clk/at91/sama7g5.c | 2 +-
5 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/clk/at91/clk-peripheral.c b/drivers/clk/at91/clk-peripheral.c
index c173a44c800a..ed97b3c0a66b 100644
--- a/drivers/clk/at91/clk-peripheral.c
+++ b/drivers/clk/at91/clk-peripheral.c
@@ -97,7 +97,7 @@ static const struct clk_ops peripheral_ops = {
struct clk_hw * __init
at91_clk_register_peripheral(struct regmap *regmap, const char *name,
- const char *parent_name, struct clk_hw *parent_hw,
+ const char *parent_name, struct clk_parent_data *parent_data,
u32 id)
{
struct clk_peripheral *periph;
@@ -105,7 +105,7 @@ at91_clk_register_peripheral(struct regmap *regmap, const char *name,
struct clk_hw *hw;
int ret;
- if (!name || !(parent_name || parent_hw) || id > PERIPHERAL_ID_MAX)
+ if (!name || !(parent_name || parent_data) || id > PERIPHERAL_ID_MAX)
return ERR_PTR(-EINVAL);
periph = kzalloc(sizeof(*periph), GFP_KERNEL);
@@ -114,8 +114,8 @@ at91_clk_register_peripheral(struct regmap *regmap, const char *name,
init.name = name;
init.ops = &peripheral_ops;
- if (parent_hw)
- init.parent_hws = (const struct clk_hw **)&parent_hw;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
else
init.parent_names = &parent_name;
init.num_parents = 1;
@@ -448,7 +448,7 @@ struct clk_hw * __init
at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
const struct clk_pcr_layout *layout,
const char *name, const char *parent_name,
- struct clk_hw *parent_hw,
+ struct clk_parent_data *parent_data,
u32 id, const struct clk_range *range,
int chg_pid, unsigned long flags)
{
@@ -457,7 +457,7 @@ at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
struct clk_hw *hw;
int ret;
- if (!name || !(parent_name || parent_hw))
+ if (!name || !(parent_name || parent_data))
return ERR_PTR(-EINVAL);
periph = kzalloc(sizeof(*periph), GFP_KERNEL);
@@ -465,8 +465,8 @@ at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
return ERR_PTR(-ENOMEM);
init.name = name;
- if (parent_hw)
- init.parent_hws = (const struct clk_hw **)&parent_hw;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
else
init.parent_names = &parent_name;
init.num_parents = 1;
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index d3fc38cf90eb..9b0c641e747b 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -229,13 +229,13 @@ at91_clk_sama7g5_register_master(struct regmap *regmap,
struct clk_hw * __init
at91_clk_register_peripheral(struct regmap *regmap, const char *name,
- const char *parent_name, struct clk_hw *parent_hw,
+ const char *parent_name, struct clk_parent_data *parent_data,
u32 id);
struct clk_hw * __init
at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
const struct clk_pcr_layout *layout,
const char *name, const char *parent_name,
- struct clk_hw *parent_hw,
+ struct clk_parent_data *parent_data,
u32 id, const struct clk_range *range,
int chg_pid, unsigned long flags);
diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
index c80306715d90..ff9dbaac5f04 100644
--- a/drivers/clk/at91/sam9x7.c
+++ b/drivers/clk/at91/sam9x7.c
@@ -925,7 +925,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
&sam9x7_pcr_layout,
sam9x7_periphck[i].n,
- NULL, sam9x7_pmc->chws[PMC_MCK],
+ NULL, &AT91_CLK_PD_HW(sam9x7_pmc->chws[PMC_MCK]),
sam9x7_periphck[i].id,
&range, INT_MIN,
sam9x7_periphck[i].f);
diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
index 6229b7dfbea1..6367fa7efd06 100644
--- a/drivers/clk/at91/sama7d65.c
+++ b/drivers/clk/at91/sama7d65.c
@@ -1307,7 +1307,7 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
&sama7d65_pcr_layout,
sama7d65_periphck[i].n,
NULL,
- sama7d65_mckx[sama7d65_periphck[i].p].hw,
+ &AT91_CLK_PD_HW(sama7d65_mckx[sama7d65_periphck[i].p].hw),
sama7d65_periphck[i].id,
&sama7d65_periphck[i].r,
sama7d65_periphck[i].chgp ? 0 :
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index 654c9f43fcf8..091845ca251c 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -1180,7 +1180,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
&sama7g5_pcr_layout,
sama7g5_periphck[i].n,
NULL,
- sama7g5_mckx[sama7g5_periphck[i].p].hw,
+ &AT91_CLK_PD_HW(sama7g5_mckx[sama7g5_periphck[i].p].hw),
sama7g5_periphck[i].id,
&sama7g5_periphck[i].r,
sama7g5_periphck[i].chgp ? 0 :
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 06/31] clk: at91: clk-main: switch to clk parent data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (4 preceding siblings ...)
2025-09-18 21:15 ` [PATCH v4 05/31] clk: at91: clk-peripheral: switch to clk_parent_data Ryan.Wanner
@ 2025-09-18 21:15 ` Ryan.Wanner
2025-10-20 19:42 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 07/31] clk: at91: clk-utmi: use clk_parent_data Ryan.Wanner
` (24 subsequent siblings)
30 siblings, 1 reply; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:15 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Use struct clk_parent_data instead of parent_hw for the main clock
to less usage of __clk_get_hw() in SoC specific clock drivers and simpler
conversion of existing SoC specific clock drivers from parent_names to
modern clk_parent_data structures. This will lead in the end at removing
__clk_get_hw() in SoC specific drivers
(that will be solved by subsequent commits).
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
[ryan.wanner@microchip: Add SAMA7D65 and SAM9X75 SoCs to use parent_data.]
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/clk-main.c | 16 ++++++++--------
drivers/clk/at91/pmc.h | 4 ++--
drivers/clk/at91/sam9x7.c | 14 +++++++-------
drivers/clk/at91/sama7d65.c | 14 +++++++-------
drivers/clk/at91/sama7g5.c | 8 ++++----
5 files changed, 28 insertions(+), 28 deletions(-)
diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c
index 9b462becc693..514c5690253f 100644
--- a/drivers/clk/at91/clk-main.c
+++ b/drivers/clk/at91/clk-main.c
@@ -402,7 +402,7 @@ struct clk_hw * __init
at91_clk_register_rm9200_main(struct regmap *regmap,
const char *name,
const char *parent_name,
- struct clk_hw *parent_hw)
+ struct clk_parent_data *parent_data)
{
struct clk_rm9200_main *clkmain;
struct clk_init_data init = {};
@@ -412,7 +412,7 @@ at91_clk_register_rm9200_main(struct regmap *regmap,
if (!name)
return ERR_PTR(-EINVAL);
- if (!(parent_name || parent_hw))
+ if (!(parent_name || parent_data))
return ERR_PTR(-EINVAL);
clkmain = kzalloc(sizeof(*clkmain), GFP_KERNEL);
@@ -421,8 +421,8 @@ at91_clk_register_rm9200_main(struct regmap *regmap,
init.name = name;
init.ops = &rm9200_main_ops;
- if (parent_hw)
- init.parent_hws = (const struct clk_hw **)&parent_hw;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
else
init.parent_names = &parent_name;
init.num_parents = 1;
@@ -552,7 +552,7 @@ struct clk_hw * __init
at91_clk_register_sam9x5_main(struct regmap *regmap,
const char *name,
const char **parent_names,
- struct clk_hw **parent_hws,
+ struct clk_parent_data *parent_data,
int num_parents)
{
struct clk_sam9x5_main *clkmain;
@@ -564,7 +564,7 @@ at91_clk_register_sam9x5_main(struct regmap *regmap,
if (!name)
return ERR_PTR(-EINVAL);
- if (!(parent_hws || parent_names) || !num_parents)
+ if (!(parent_data || parent_names) || !num_parents)
return ERR_PTR(-EINVAL);
clkmain = kzalloc(sizeof(*clkmain), GFP_KERNEL);
@@ -573,8 +573,8 @@ at91_clk_register_sam9x5_main(struct regmap *regmap,
init.name = name;
init.ops = &sam9x5_main_ops;
- if (parent_hws)
- init.parent_hws = (const struct clk_hw **)parent_hws;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
else
init.parent_names = parent_names;
init.num_parents = num_parents;
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index 9b0c641e747b..13d125793216 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -198,11 +198,11 @@ struct clk_hw * __init
at91_clk_register_rm9200_main(struct regmap *regmap,
const char *name,
const char *parent_name,
- struct clk_hw *parent_hw);
+ struct clk_parent_data *parent_data);
struct clk_hw * __init
at91_clk_register_sam9x5_main(struct regmap *regmap, const char *name,
const char **parent_names,
- struct clk_hw **parent_hws, int num_parents);
+ struct clk_parent_data *parent_data, int num_parents);
struct clk_hw * __init
at91_clk_register_master_pres(struct regmap *regmap, const char *name,
diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
index ff9dbaac5f04..f00045d4f425 100644
--- a/drivers/clk/at91/sam9x7.c
+++ b/drivers/clk/at91/sam9x7.c
@@ -752,7 +752,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
struct regmap *regmap;
struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
struct clk_hw *td_slck_hw, *md_slck_hw, *usbck_hw;
- static struct clk_parent_data parent_data;
+ struct clk_parent_data parent_data[2];
struct clk_hw *parent_hws[9];
int i, j;
@@ -790,9 +790,9 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
if (IS_ERR(main_osc_hw))
goto err_free;
- parent_hws[0] = main_rc_hw;
- parent_hws[1] = main_osc_hw;
- hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_hws, 2);
+ parent_data[0] = AT91_CLK_PD_HW(main_rc_hw);
+ parent_data[1] = AT91_CLK_PD_HW(main_osc_hw);
+ hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_data, 2);
if (IS_ERR(hw))
goto err_free;
@@ -809,11 +809,11 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
case PLL_TYPE_FRAC:
switch (sam9x7_plls[i][j].p) {
case SAM9X7_PLL_PARENT_MAINCK:
- parent_data = AT91_CLK_PD_NAME("mainck");
+ parent_data[0] = AT91_CLK_PD_NAME("mainck");
hw = sam9x7_pmc->chws[PMC_MAIN];
break;
case SAM9X7_PLL_PARENT_MAIN_XTAL:
- parent_data = AT91_CLK_PD_NAME(main_xtal_name);
+ parent_data[0] = AT91_CLK_PD_NAME(main_xtal_name);
hw = main_xtal_hw;
break;
default:
@@ -828,7 +828,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
hw = sam9x60_clk_register_frac_pll(regmap,
&pmc_pll_lock,
sam9x7_plls[i][j].n,
- &parent_data, parent_rate, i,
+ parent_data, parent_rate, i,
sam9x7_plls[i][j].c,
sam9x7_plls[i][j].l,
sam9x7_plls[i][j].f);
diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
index 6367fa7efd06..b12d796cbea4 100644
--- a/drivers/clk/at91/sama7d65.c
+++ b/drivers/clk/at91/sama7d65.c
@@ -1101,7 +1101,7 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
struct regmap *regmap;
struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
struct clk_hw *td_slck_hw, *md_slck_hw;
- static struct clk_parent_data parent_data;
+ struct clk_parent_data parent_data[2];
struct clk_hw *parent_hws[10];
bool bypass;
int i, j;
@@ -1143,9 +1143,9 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
if (IS_ERR(main_osc_hw))
goto err_free;
- parent_hws[0] = main_rc_hw;
- parent_hws[1] = main_osc_hw;
- hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_hws, 2);
+ parent_data[0] = AT91_CLK_PD_HW(main_rc_hw);
+ parent_data[1] = AT91_CLK_PD_HW(main_osc_hw);
+ hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_data, 2);
if (IS_ERR(hw))
goto err_free;
@@ -1162,11 +1162,11 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
case PLL_TYPE_FRAC:
switch (sama7d65_plls[i][j].p) {
case SAMA7D65_PLL_PARENT_MAINCK:
- parent_data = AT91_CLK_PD_NAME("mainck");
+ parent_data[0] = AT91_CLK_PD_NAME("mainck");
hw = sama7d65_pmc->chws[PMC_MAIN];
break;
case SAMA7D65_PLL_PARENT_MAIN_XTAL:
- parent_data = AT91_CLK_PD_NAME(main_xtal_name);
+ parent_data[0] = AT91_CLK_PD_NAME(main_xtal_name);
hw = main_xtal_hw;
break;
default:
@@ -1179,7 +1179,7 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
hw = sam9x60_clk_register_frac_pll(regmap,
&pmc_pll_lock, sama7d65_plls[i][j].n,
- &parent_data, parent_rate, i,
+ parent_data, parent_rate, i,
sama7d65_plls[i][j].c,
sama7d65_plls[i][j].l,
sama7d65_plls[i][j].f);
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index 091845ca251c..b1b0e9e67228 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -1020,9 +1020,9 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
if (IS_ERR(main_osc_hw))
goto err_free;
- parent_hws[0] = main_rc_hw;
- parent_hws[1] = main_osc_hw;
- hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_hws, 2);
+ parent_data[0] = AT91_CLK_PD_HW(main_rc_hw);
+ parent_data[1] = AT91_CLK_PD_HW(main_osc_hw);
+ hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_data, 2);
if (IS_ERR(hw))
goto err_free;
@@ -1057,7 +1057,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
hw = sam9x60_clk_register_frac_pll(regmap,
&pmc_pll_lock, sama7g5_plls[i][j].n,
- &parent_data, parent_rate, i,
+ parent_data, parent_rate, i,
sama7g5_plls[i][j].c,
sama7g5_plls[i][j].l,
sama7g5_plls[i][j].f);
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 07/31] clk: at91: clk-utmi: use clk_parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (5 preceding siblings ...)
2025-09-18 21:15 ` [PATCH v4 06/31] clk: at91: clk-main: switch to clk parent data Ryan.Wanner
@ 2025-09-18 21:15 ` Ryan.Wanner
2025-10-20 19:43 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 08/31] clk: at91: clk-master: " Ryan.Wanner
` (23 subsequent siblings)
30 siblings, 1 reply; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:15 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Use struct clk_parent_data instead of struct parent_hw as this leads
to less usage of __clk_get_hw() in SoC specific clock drivers and simpler
conversion of existing SoC specific clock drivers from parent_names to
modern clk_parent_data structures.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/clk-utmi.c | 16 ++++++++--------
drivers/clk/at91/pmc.h | 4 ++--
drivers/clk/at91/sama7g5.c | 21 +++++++++++++--------
3 files changed, 23 insertions(+), 18 deletions(-)
diff --git a/drivers/clk/at91/clk-utmi.c b/drivers/clk/at91/clk-utmi.c
index b991180beea1..38ffe4d712a5 100644
--- a/drivers/clk/at91/clk-utmi.c
+++ b/drivers/clk/at91/clk-utmi.c
@@ -144,7 +144,7 @@ static struct clk_hw * __init
at91_clk_register_utmi_internal(struct regmap *regmap_pmc,
struct regmap *regmap_sfr,
const char *name, const char *parent_name,
- struct clk_hw *parent_hw,
+ struct clk_parent_data *parent_data,
const struct clk_ops *ops, unsigned long flags)
{
struct clk_utmi *utmi;
@@ -152,7 +152,7 @@ at91_clk_register_utmi_internal(struct regmap *regmap_pmc,
struct clk_init_data init = {};
int ret;
- if (!(parent_name || parent_hw))
+ if (!(parent_name || parent_data))
return ERR_PTR(-EINVAL);
utmi = kzalloc(sizeof(*utmi), GFP_KERNEL);
@@ -161,8 +161,8 @@ at91_clk_register_utmi_internal(struct regmap *regmap_pmc,
init.name = name;
init.ops = ops;
- if (parent_hw)
- init.parent_hws = (const struct clk_hw **)&parent_hw;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
else
init.parent_names = &parent_name;
init.num_parents = 1;
@@ -185,10 +185,10 @@ at91_clk_register_utmi_internal(struct regmap *regmap_pmc,
struct clk_hw * __init
at91_clk_register_utmi(struct regmap *regmap_pmc, struct regmap *regmap_sfr,
const char *name, const char *parent_name,
- struct clk_hw *parent_hw)
+ struct clk_parent_data *parent_data)
{
return at91_clk_register_utmi_internal(regmap_pmc, regmap_sfr, name,
- parent_name, parent_hw, &utmi_ops, CLK_SET_RATE_GATE);
+ parent_name, parent_data, &utmi_ops, CLK_SET_RATE_GATE);
}
static int clk_utmi_sama7g5_prepare(struct clk_hw *hw)
@@ -287,8 +287,8 @@ static const struct clk_ops sama7g5_utmi_ops = {
struct clk_hw * __init
at91_clk_sama7g5_register_utmi(struct regmap *regmap_pmc, const char *name,
- const char *parent_name, struct clk_hw *parent_hw)
+ const char *parent_name, struct clk_parent_data *parent_data)
{
return at91_clk_register_utmi_internal(regmap_pmc, NULL, name,
- parent_name, parent_hw, &sama7g5_utmi_ops, 0);
+ parent_name, parent_data, &sama7g5_utmi_ops, 0);
}
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index 13d125793216..ee77c14e8b25 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -302,10 +302,10 @@ at91rm9200_clk_register_usb(struct regmap *regmap, const char *name,
struct clk_hw * __init
at91_clk_register_utmi(struct regmap *regmap_pmc, struct regmap *regmap_sfr,
const char *name, const char *parent_name,
- struct clk_hw *parent_hw);
+ struct clk_parent_data *parent_data);
struct clk_hw * __init
at91_clk_sama7g5_register_utmi(struct regmap *regmap, const char *name,
- const char *parent_name, struct clk_hw *parent_hw);
+ const char *parent_name, struct clk_parent_data *parent_data);
#endif /* __PMC_H_ */
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index b1b0e9e67228..dde662a6133f 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -976,10 +976,11 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
void **alloc_mem = NULL;
int alloc_mem_size = 0;
struct regmap *regmap;
- struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
+ struct clk_hw *hw, *main_rc_hw, *main_osc_hw;
struct clk_hw *td_slck_hw, *md_slck_hw;
- static struct clk_parent_data parent_data;
+ struct clk_parent_data parent_data[2];
struct clk_hw *parent_hws[10];
+ struct clk *main_xtal;
bool bypass;
int i, j;
@@ -1039,19 +1040,22 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
case PLL_TYPE_FRAC:
switch (sama7g5_plls[i][j].p) {
case SAMA7G5_PLL_PARENT_MAINCK:
- parent_data = AT91_CLK_PD_NAME("mainck");
- hw = sama7g5_pmc->chws[PMC_MAIN];
+ parent_data[0] = AT91_CLK_PD_NAME("mainck");
+ parent_rate = clk_hw_get_rate(sama7g5_pmc->chws[PMC_MAIN]);
break;
case SAMA7G5_PLL_PARENT_MAIN_XTAL:
- parent_data = AT91_CLK_PD_NAME(main_xtal_name);
- hw = main_xtal_hw;
+ main_xtal = of_clk_get_by_name(np, main_xtal_name);
+ if (IS_ERR(main_xtal))
+ goto err_free;
+ parent_data[0] = AT91_CLK_PD_NAME(main_xtal_name);
+ parent_rate = clk_get_rate(main_xtal);
+ clk_put(main_xtal);
break;
default:
/* Should not happen. */
break;
}
- parent_rate = clk_hw_get_rate(hw);
if (!parent_rate)
return;
@@ -1135,7 +1139,8 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
sama7g5_pmc->chws[sama7g5_mckx[i].eid] = hw;
}
- hw = at91_clk_sama7g5_register_utmi(regmap, "utmick", NULL, main_xtal_hw);
+ hw = at91_clk_sama7g5_register_utmi(regmap, "utmick", NULL,
+ &AT91_CLK_PD_NAME(main_xtal_name));
if (IS_ERR(hw))
goto err_free;
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 08/31] clk: at91: clk-master: use clk_parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (6 preceding siblings ...)
2025-09-18 21:15 ` [PATCH v4 07/31] clk: at91: clk-utmi: use clk_parent_data Ryan.Wanner
@ 2025-09-18 21:15 ` Ryan.Wanner
2025-10-20 19:44 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 09/31] clk: at91: clk-programmable: " Ryan.Wanner
` (22 subsequent siblings)
30 siblings, 1 reply; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:15 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Use struct clk_parent_data instead of struct parent_hw as this leads
to less usage of __clk_get_hw() in SoC specific clock drivers and simpler
conversion of existing SoC specific clock drivers from parent_names to
modern clk_parent_data structures.
__clk_get_hw will be removed in subsequent patches.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
[ryan.wanner@microchip.com: Add clk-master changes to SAM9X75 and
SAMA7D65 SoCs. As well as add md_slck commit message.]
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/clk-master.c | 24 ++++++++++++------------
drivers/clk/at91/pmc.h | 6 +++---
drivers/clk/at91/sam9x7.c | 20 +++++++++++---------
drivers/clk/at91/sama7d65.c | 17 +++++++----------
drivers/clk/at91/sama7g5.c | 17 +++++++----------
5 files changed, 40 insertions(+), 44 deletions(-)
diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c
index d5ea2069ec83..b8d000b3b180 100644
--- a/drivers/clk/at91/clk-master.c
+++ b/drivers/clk/at91/clk-master.c
@@ -473,7 +473,7 @@ static struct clk_hw * __init
at91_clk_register_master_internal(struct regmap *regmap,
const char *name, int num_parents,
const char **parent_names,
- struct clk_hw **parent_hws,
+ struct clk_parent_data *parent_data,
const struct clk_master_layout *layout,
const struct clk_master_characteristics *characteristics,
const struct clk_ops *ops, spinlock_t *lock, u32 flags)
@@ -485,7 +485,7 @@ at91_clk_register_master_internal(struct regmap *regmap,
unsigned long irqflags;
int ret;
- if (!name || !num_parents || !(parent_names || parent_hws) || !lock)
+ if (!name || !num_parents || !(parent_names || parent_data) || !lock)
return ERR_PTR(-EINVAL);
master = kzalloc(sizeof(*master), GFP_KERNEL);
@@ -494,8 +494,8 @@ at91_clk_register_master_internal(struct regmap *regmap,
init.name = name;
init.ops = ops;
- if (parent_hws)
- init.parent_hws = (const struct clk_hw **)parent_hws;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
else
init.parent_names = parent_names;
init.num_parents = num_parents;
@@ -531,13 +531,13 @@ struct clk_hw * __init
at91_clk_register_master_pres(struct regmap *regmap,
const char *name, int num_parents,
const char **parent_names,
- struct clk_hw **parent_hws,
+ struct clk_parent_data *parent_data,
const struct clk_master_layout *layout,
const struct clk_master_characteristics *characteristics,
spinlock_t *lock)
{
return at91_clk_register_master_internal(regmap, name, num_parents,
- parent_names, parent_hws, layout,
+ parent_names, parent_data, layout,
characteristics,
&master_pres_ops,
lock, CLK_SET_RATE_GATE);
@@ -546,7 +546,7 @@ at91_clk_register_master_pres(struct regmap *regmap,
struct clk_hw * __init
at91_clk_register_master_div(struct regmap *regmap,
const char *name, const char *parent_name,
- struct clk_hw *parent_hw, const struct clk_master_layout *layout,
+ struct clk_parent_data *parent_data, const struct clk_master_layout *layout,
const struct clk_master_characteristics *characteristics,
spinlock_t *lock, u32 flags, u32 safe_div)
{
@@ -560,7 +560,7 @@ at91_clk_register_master_div(struct regmap *regmap,
hw = at91_clk_register_master_internal(regmap, name, 1,
parent_name ? &parent_name : NULL,
- parent_hw ? &parent_hw : NULL, layout,
+ parent_data, layout,
characteristics, ops,
lock, flags);
@@ -815,7 +815,7 @@ struct clk_hw * __init
at91_clk_sama7g5_register_master(struct regmap *regmap,
const char *name, int num_parents,
const char **parent_names,
- struct clk_hw **parent_hws,
+ struct clk_parent_data *parent_data,
u32 *mux_table,
spinlock_t *lock, u8 id,
bool critical, int chg_pid)
@@ -827,7 +827,7 @@ at91_clk_sama7g5_register_master(struct regmap *regmap,
unsigned int val;
int ret;
- if (!name || !num_parents || !(parent_names || parent_hws) || !mux_table ||
+ if (!name || !num_parents || !(parent_names || parent_data) || !mux_table ||
!lock || id > MASTER_MAX_ID)
return ERR_PTR(-EINVAL);
@@ -837,8 +837,8 @@ at91_clk_sama7g5_register_master(struct regmap *regmap,
init.name = name;
init.ops = &sama7g5_master_ops;
- if (parent_hws)
- init.parent_hws = (const struct clk_hw **)parent_hws;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
else
init.parent_names = parent_names;
init.num_parents = num_parents;
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index ee77c14e8b25..c7973c063b59 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -207,14 +207,14 @@ at91_clk_register_sam9x5_main(struct regmap *regmap, const char *name,
struct clk_hw * __init
at91_clk_register_master_pres(struct regmap *regmap, const char *name,
int num_parents, const char **parent_names,
- struct clk_hw **parent_hws,
+ struct clk_parent_data *parent_data,
const struct clk_master_layout *layout,
const struct clk_master_characteristics *characteristics,
spinlock_t *lock);
struct clk_hw * __init
at91_clk_register_master_div(struct regmap *regmap, const char *name,
- const char *parent_names, struct clk_hw *parent_hw,
+ const char *parent_names, struct clk_parent_data *parent_data,
const struct clk_master_layout *layout,
const struct clk_master_characteristics *characteristics,
spinlock_t *lock, u32 flags, u32 safe_div);
@@ -223,7 +223,7 @@ struct clk_hw * __init
at91_clk_sama7g5_register_master(struct regmap *regmap,
const char *name, int num_parents,
const char **parent_names,
- struct clk_hw **parent_hws, u32 *mux_table,
+ struct clk_parent_data *parent_data, u32 *mux_table,
spinlock_t *lock, u8 id, bool critical,
int chg_pid);
diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
index f00045d4f425..191e2566d64a 100644
--- a/drivers/clk/at91/sam9x7.c
+++ b/drivers/clk/at91/sam9x7.c
@@ -752,15 +752,17 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
struct regmap *regmap;
struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
struct clk_hw *td_slck_hw, *md_slck_hw, *usbck_hw;
- struct clk_parent_data parent_data[2];
+ struct clk_parent_data parent_data[9];
struct clk_hw *parent_hws[9];
int i, j;
td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "td_slck"));
md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "md_slck"));
- i = of_property_match_string(np, "clock-names", "main_xtal");
+ if (!td_slck_hw || !md_slck_hw)
+ return;
- if (!td_slck_hw || !md_slck_hw || !i)
+ i = of_property_match_string(np, "clock-names", "main_xtal");
+ if (i < 0)
return;
main_xtal_name = of_clk_get_parent_name(np, i);
@@ -857,18 +859,18 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
}
}
- parent_hws[0] = md_slck_hw;
- parent_hws[1] = sam9x7_pmc->chws[PMC_MAIN];
- parent_hws[2] = sam9x7_plls[PLL_ID_PLLA][PLL_COMPID_DIV0].hw;
- parent_hws[3] = sam9x7_plls[PLL_ID_UPLL][PLL_COMPID_DIV0].hw;
+ parent_data[0] = AT91_CLK_PD_NAME("md_slck");
+ parent_data[1] = AT91_CLK_PD_HW(sam9x7_pmc->chws[PMC_MAIN]);
+ parent_data[2] = AT91_CLK_PD_HW(sam9x7_plls[PLL_ID_PLLA][PLL_COMPID_DIV0].hw);
+ parent_data[3] = AT91_CLK_PD_HW(sam9x7_plls[PLL_ID_UPLL][PLL_COMPID_DIV0].hw);
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
- NULL, parent_hws, &sam9x7_master_layout,
+ NULL, parent_data, &sam9x7_master_layout,
&mck_characteristics, &mck_lock);
if (IS_ERR(hw))
goto err_free;
hw = at91_clk_register_master_div(regmap, "masterck_div",
- NULL, hw, &sam9x7_master_layout,
+ NULL, &AT91_CLK_PD_HW(hw), &sam9x7_master_layout,
&mck_characteristics, &mck_lock,
CLK_SET_RATE_GATE, 0);
if (IS_ERR(hw))
diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
index b12d796cbea4..ab63e36cf0da 100644
--- a/drivers/clk/at91/sama7d65.c
+++ b/drivers/clk/at91/sama7d65.c
@@ -1101,7 +1101,7 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
struct regmap *regmap;
struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
struct clk_hw *td_slck_hw, *md_slck_hw;
- struct clk_parent_data parent_data[2];
+ struct clk_parent_data parent_data[10];
struct clk_hw *parent_hws[10];
bool bypass;
int i, j;
@@ -1209,7 +1209,7 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
}
hw = at91_clk_register_master_div(regmap, "mck0", NULL,
- sama7d65_plls[PLL_ID_CPU][1].hw,
+ &AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_CPU][1].hw),
&mck0_layout, &mck0_characteristics,
&pmc_mck0_lock, CLK_GET_RATE_NOCACHE, 5);
if (IS_ERR(hw))
@@ -1218,12 +1218,11 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
sama7d65_pmc->chws[PMC_MCK] = hw;
sama7d65_mckx[PCK_PARENT_HW_MCK0].hw = hw;
- parent_hws[0] = md_slck_hw;
- parent_hws[1] = td_slck_hw;
- parent_hws[2] = sama7d65_pmc->chws[PMC_MAIN];
+ parent_data[0] = AT91_CLK_PD_NAME("md_slck");
+ parent_data[1] = AT91_CLK_PD_NAME("td_slck");
+ parent_data[2] = AT91_CLK_PD_HW(sama7d65_pmc->chws[PMC_MAIN]);
for (i = PCK_PARENT_HW_MCK1; i < ARRAY_SIZE(sama7d65_mckx); i++) {
u8 num_parents = 3 + sama7d65_mckx[i].ep_count;
- struct clk_hw *tmp_parent_hws[8];
u32 *mux_table;
mux_table = kmalloc_array(num_parents, sizeof(*mux_table),
@@ -1240,13 +1239,11 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
u8 pll_id = sama7d65_mckx[i].ep[j].pll_id;
u8 pll_compid = sama7d65_mckx[i].ep[j].pll_compid;
- tmp_parent_hws[j] = sama7d65_plls[pll_id][pll_compid].hw;
+ parent_data[3 + j] = AT91_CLK_PD_HW(sama7d65_plls[pll_id][pll_compid].hw);
}
- PMC_FILL_TABLE(&parent_hws[3], tmp_parent_hws,
- sama7d65_mckx[i].ep_count);
hw = at91_clk_sama7g5_register_master(regmap, sama7d65_mckx[i].n,
- num_parents, NULL, parent_hws,
+ num_parents, NULL, parent_data,
mux_table, &pmc_mckX_lock,
sama7d65_mckx[i].id,
sama7d65_mckx[i].c,
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index dde662a6133f..acf45319abe7 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -978,7 +978,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
struct regmap *regmap;
struct clk_hw *hw, *main_rc_hw, *main_osc_hw;
struct clk_hw *td_slck_hw, *md_slck_hw;
- struct clk_parent_data parent_data[2];
+ struct clk_parent_data parent_data[10];
struct clk_hw *parent_hws[10];
struct clk *main_xtal;
bool bypass;
@@ -1091,7 +1091,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
}
hw = at91_clk_register_master_div(regmap, "mck0", NULL,
- sama7g5_plls[PLL_ID_CPU][1].hw,
+ &AT91_CLK_PD_HW(sama7g5_plls[PLL_ID_CPU][1].hw),
&mck0_layout, &mck0_characteristics,
&pmc_mck0_lock, CLK_GET_RATE_NOCACHE, 5);
if (IS_ERR(hw))
@@ -1099,12 +1099,11 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
sama7g5_mckx[PCK_PARENT_HW_MCK0].hw = sama7g5_pmc->chws[PMC_MCK] = hw;
- parent_hws[0] = md_slck_hw;
- parent_hws[1] = td_slck_hw;
- parent_hws[2] = sama7g5_pmc->chws[PMC_MAIN];
+ parent_data[0] = AT91_CLK_PD_NAME("md_slck");
+ parent_data[1] = AT91_CLK_PD_NAME("td_slck");
+ parent_data[2] = AT91_CLK_PD_HW(sama7g5_pmc->chws[PMC_MAIN]);
for (i = PCK_PARENT_HW_MCK1; i < ARRAY_SIZE(sama7g5_mckx); i++) {
u8 num_parents = 3 + sama7g5_mckx[i].ep_count;
- struct clk_hw *tmp_parent_hws[8];
u32 *mux_table;
mux_table = kmalloc_array(num_parents, sizeof(*mux_table),
@@ -1119,13 +1118,11 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
u8 pll_id = sama7g5_mckx[i].ep[j].pll_id;
u8 pll_compid = sama7g5_mckx[i].ep[j].pll_compid;
- tmp_parent_hws[j] = sama7g5_plls[pll_id][pll_compid].hw;
+ parent_data[3 + j] = AT91_CLK_PD_HW(sama7g5_plls[pll_id][pll_compid].hw);
}
- PMC_FILL_TABLE(&parent_hws[3], tmp_parent_hws,
- sama7g5_mckx[i].ep_count);
hw = at91_clk_sama7g5_register_master(regmap, sama7g5_mckx[i].n,
- num_parents, NULL, parent_hws, mux_table,
+ num_parents, NULL, parent_data, mux_table,
&pmc_mckX_lock, sama7g5_mckx[i].id,
sama7g5_mckx[i].c,
sama7g5_mckx[i].ep_chg_id);
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 09/31] clk: at91: clk-programmable: use clk_parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (7 preceding siblings ...)
2025-09-18 21:15 ` [PATCH v4 08/31] clk: at91: clk-master: " Ryan.Wanner
@ 2025-09-18 21:15 ` Ryan.Wanner
2025-09-18 21:15 ` [PATCH v4 10/31] clk: at91: clk-generated: " Ryan.Wanner
` (21 subsequent siblings)
30 siblings, 0 replies; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:15 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Use struct clk_parent_data instead of struct parent_hw as this leads
to less usage of __clk_get_hw() in SoC specific clock drivers and simpler
conversion of existing SoC specific clock drivers from parent_names to
modern clk_parent_data structures.
Subsequent patches will aim to completely remove __clk_get_hw().
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
[ryan.wanner@microchip.com: Add the clk-programmable changes to the
SAMA7D65 and SAM9X75 SoCs.]
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/clk-programmable.c | 8 ++++----
drivers/clk/at91/pmc.h | 2 +-
drivers/clk/at91/sam9x7.c | 16 ++++++++--------
drivers/clk/at91/sama7d65.c | 20 ++++++++++----------
drivers/clk/at91/sama7g5.c | 20 ++++++++++----------
5 files changed, 33 insertions(+), 33 deletions(-)
diff --git a/drivers/clk/at91/clk-programmable.c b/drivers/clk/at91/clk-programmable.c
index 1195fb405503..275ca701f294 100644
--- a/drivers/clk/at91/clk-programmable.c
+++ b/drivers/clk/at91/clk-programmable.c
@@ -215,7 +215,7 @@ static const struct clk_ops programmable_ops = {
struct clk_hw * __init
at91_clk_register_programmable(struct regmap *regmap,
const char *name, const char **parent_names,
- struct clk_hw **parent_hws, u8 num_parents, u8 id,
+ struct clk_parent_data *parent_data, u8 num_parents, u8 id,
const struct clk_programmable_layout *layout,
u32 *mux_table)
{
@@ -224,7 +224,7 @@ at91_clk_register_programmable(struct regmap *regmap,
struct clk_init_data init = {};
int ret;
- if (id > PROG_ID_MAX || !(parent_names || parent_hws))
+ if (id > PROG_ID_MAX || !(parent_names || parent_data))
return ERR_PTR(-EINVAL);
prog = kzalloc(sizeof(*prog), GFP_KERNEL);
@@ -233,8 +233,8 @@ at91_clk_register_programmable(struct regmap *regmap,
init.name = name;
init.ops = &programmable_ops;
- if (parent_hws)
- init.parent_hws = (const struct clk_hw **)parent_hws;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
else
init.parent_names = parent_names;
init.num_parents = num_parents;
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index c7973c063b59..51a87a535504 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -266,7 +266,7 @@ sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock,
struct clk_hw * __init
at91_clk_register_programmable(struct regmap *regmap, const char *name,
- const char **parent_names, struct clk_hw **parent_hws,
+ const char **parent_names, struct clk_parent_data *parent_data,
u8 num_parents, u8 id,
const struct clk_programmable_layout *layout,
u32 *mux_table);
diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
index 191e2566d64a..6afa4e6bcbad 100644
--- a/drivers/clk/at91/sam9x7.c
+++ b/drivers/clk/at91/sam9x7.c
@@ -885,20 +885,20 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
if (IS_ERR(usbck_hw))
goto err_free;
- parent_hws[0] = md_slck_hw;
- parent_hws[1] = td_slck_hw;
- parent_hws[2] = sam9x7_pmc->chws[PMC_MAIN];
- parent_hws[3] = sam9x7_pmc->chws[PMC_MCK];
- parent_hws[4] = sam9x7_plls[PLL_ID_PLLA][PLL_COMPID_DIV0].hw;
- parent_hws[5] = sam9x7_plls[PLL_ID_UPLL][PLL_COMPID_DIV0].hw;
- parent_hws[6] = sam9x7_plls[PLL_ID_AUDIO][PLL_COMPID_DIV0].hw;
+ parent_data[0] = AT91_CLK_PD_NAME("md_slck");
+ parent_data[1] = AT91_CLK_PD_NAME("td_slck");
+ parent_data[2] = AT91_CLK_PD_HW(sam9x7_pmc->chws[PMC_MAIN]);
+ parent_data[3] = AT91_CLK_PD_HW(sam9x7_pmc->chws[PMC_MCK]);
+ parent_data[4] = AT91_CLK_PD_HW(sam9x7_plls[PLL_ID_PLLA][PLL_COMPID_DIV0].hw);
+ parent_data[5] = AT91_CLK_PD_HW(sam9x7_plls[PLL_ID_UPLL][PLL_COMPID_DIV0].hw);
+ parent_data[6] = AT91_CLK_PD_HW(sam9x7_plls[PLL_ID_AUDIO][PLL_COMPID_DIV0].hw);
for (i = 0; i < 2; i++) {
char name[6];
snprintf(name, sizeof(name), "prog%d", i);
hw = at91_clk_register_programmable(regmap, name,
- NULL, parent_hws, 7, i,
+ NULL, parent_data, 7, i,
&sam9x7_programmable_layout,
NULL);
if (IS_ERR(hw))
diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
index ab63e36cf0da..8538c3e5fa5a 100644
--- a/drivers/clk/at91/sama7d65.c
+++ b/drivers/clk/at91/sama7d65.c
@@ -1264,22 +1264,22 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
if (IS_ERR(hw))
goto err_free;
- parent_hws[0] = md_slck_hw;
- parent_hws[1] = td_slck_hw;
- parent_hws[2] = sama7d65_pmc->chws[PMC_MAIN];
- parent_hws[3] = sama7d65_plls[PLL_ID_SYS][PLL_COMPID_DIV0].hw;
- parent_hws[4] = sama7d65_plls[PLL_ID_DDR][PLL_COMPID_DIV0].hw;
- parent_hws[5] = sama7d65_plls[PLL_ID_GPU][PLL_COMPID_DIV0].hw;
- parent_hws[6] = sama7d65_plls[PLL_ID_BAUD][PLL_COMPID_DIV0].hw;
- parent_hws[7] = sama7d65_plls[PLL_ID_AUDIO][PLL_COMPID_DIV0].hw;
- parent_hws[8] = sama7d65_plls[PLL_ID_ETH][PLL_COMPID_DIV0].hw;
+ parent_data[0] = AT91_CLK_PD_NAME("md_slck");
+ parent_data[1] = AT91_CLK_PD_NAME("td_slck");
+ parent_data[2] = AT91_CLK_PD_HW(sama7d65_pmc->chws[PMC_MAIN]);
+ parent_data[3] = AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_SYS][PLL_COMPID_DIV0].hw);
+ parent_data[4] = AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_DDR][PLL_COMPID_DIV0].hw);
+ parent_data[5] = AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_GPU][PLL_COMPID_DIV0].hw);
+ parent_data[6] = AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_BAUD][PLL_COMPID_DIV0].hw);
+ parent_data[7] = AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_AUDIO][PLL_COMPID_DIV0].hw);
+ parent_data[8] = AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_ETH][PLL_COMPID_DIV0].hw);
for (i = 0; i < 8; i++) {
char name[6];
snprintf(name, sizeof(name), "prog%d", i);
- hw = at91_clk_register_programmable(regmap, name, NULL, parent_hws,
+ hw = at91_clk_register_programmable(regmap, name, NULL, parent_data,
9, i,
&programmable_layout,
sama7d65_prog_mux_table);
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index acf45319abe7..ddd5ad318990 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -1143,21 +1143,21 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
sama7g5_pmc->chws[PMC_UTMI] = hw;
- parent_hws[0] = md_slck_hw;
- parent_hws[1] = td_slck_hw;
- parent_hws[2] = sama7g5_pmc->chws[PMC_MAIN];
- parent_hws[3] = sama7g5_plls[PLL_ID_SYS][PLL_COMPID_DIV0].hw;
- parent_hws[4] = sama7g5_plls[PLL_ID_DDR][PLL_COMPID_DIV0].hw;
- parent_hws[5] = sama7g5_plls[PLL_ID_IMG][PLL_COMPID_DIV0].hw;
- parent_hws[6] = sama7g5_plls[PLL_ID_BAUD][PLL_COMPID_DIV0].hw;
- parent_hws[7] = sama7g5_plls[PLL_ID_AUDIO][PLL_COMPID_DIV0].hw;
- parent_hws[8] = sama7g5_plls[PLL_ID_ETH][PLL_COMPID_DIV0].hw;
+ parent_data[0] = AT91_CLK_PD_NAME("md_slck");
+ parent_data[1] = AT91_CLK_PD_NAME("td_slck");
+ parent_data[2] = AT91_CLK_PD_HW(sama7g5_pmc->chws[PMC_MAIN]);
+ parent_data[3] = AT91_CLK_PD_HW(sama7g5_plls[PLL_ID_SYS][PLL_COMPID_DIV0].hw);
+ parent_data[4] = AT91_CLK_PD_HW(sama7g5_plls[PLL_ID_DDR][PLL_COMPID_DIV0].hw);
+ parent_data[5] = AT91_CLK_PD_HW(sama7g5_plls[PLL_ID_IMG][PLL_COMPID_DIV0].hw);
+ parent_data[6] = AT91_CLK_PD_HW(sama7g5_plls[PLL_ID_BAUD][PLL_COMPID_DIV0].hw);
+ parent_data[7] = AT91_CLK_PD_HW(sama7g5_plls[PLL_ID_AUDIO][PLL_COMPID_DIV0].hw);
+ parent_data[8] = AT91_CLK_PD_HW(sama7g5_plls[PLL_ID_ETH][PLL_COMPID_DIV0].hw);
for (i = 0; i < 8; i++) {
char name[6];
snprintf(name, sizeof(name), "prog%d", i);
- hw = at91_clk_register_programmable(regmap, name, NULL, parent_hws,
+ hw = at91_clk_register_programmable(regmap, name, NULL, parent_data,
9, i,
&programmable_layout,
sama7g5_prog_mux_table);
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 10/31] clk: at91: clk-generated: use clk_parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (8 preceding siblings ...)
2025-09-18 21:15 ` [PATCH v4 09/31] clk: at91: clk-programmable: " Ryan.Wanner
@ 2025-09-18 21:15 ` Ryan.Wanner
2025-10-20 19:39 ` Claudiu Beznea
2025-10-20 19:45 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 11/31] clk: at91: clk-usb: add support for clk_parent_data Ryan.Wanner
` (20 subsequent siblings)
30 siblings, 2 replies; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:15 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Use struct clk_parent_data instead of struct parent_hw as this leads
to less usage of __clk_get_hw() in SoC specific clock drivers and simpler
conversion of existing SoC specific clock drivers from parent_names to
modern clk_parent_data structures.
Remove the last of the usage of __clk_get_hw().
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
[ryan.wanner@microchip.com: Added SAMA7D65 and SAM9X75 SoCs to the
clk-generated changes. Adjust clk name variable order.]
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/clk-generated.c | 8 +++----
drivers/clk/at91/pmc.h | 2 +-
drivers/clk/at91/sam9x7.c | 38 ++++++++++++++---------------
drivers/clk/at91/sama7d65.c | 41 +++++++++++++++++---------------
drivers/clk/at91/sama7g5.c | 39 ++++++++++++++++--------------
5 files changed, 67 insertions(+), 61 deletions(-)
diff --git a/drivers/clk/at91/clk-generated.c b/drivers/clk/at91/clk-generated.c
index 4b4edeecc889..d9e00167dbc8 100644
--- a/drivers/clk/at91/clk-generated.c
+++ b/drivers/clk/at91/clk-generated.c
@@ -319,7 +319,7 @@ struct clk_hw * __init
at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock,
const struct clk_pcr_layout *layout,
const char *name, const char **parent_names,
- struct clk_hw **parent_hws,
+ struct clk_parent_data *parent_data,
u32 *mux_table, u8 num_parents, u8 id,
const struct clk_range *range,
int chg_pid)
@@ -329,7 +329,7 @@ at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock,
struct clk_hw *hw;
int ret;
- if (!(parent_names || parent_hws))
+ if (!(parent_names || parent_data))
return ERR_PTR(-ENOMEM);
gck = kzalloc(sizeof(*gck), GFP_KERNEL);
@@ -338,8 +338,8 @@ at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock,
init.name = name;
init.ops = &generated_ops;
- if (parent_hws)
- init.parent_hws = (const struct clk_hw **)parent_hws;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
else
init.parent_names = parent_names;
init.num_parents = num_parents;
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index 51a87a535504..2aa84c49bd2f 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -174,7 +174,7 @@ struct clk_hw * __init
at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock,
const struct clk_pcr_layout *layout,
const char *name, const char **parent_names,
- struct clk_hw **parent_hws, u32 *mux_table,
+ struct clk_parent_data *parent_data, u32 *mux_table,
u8 num_parents, u8 id,
const struct clk_range *range, int chg_pid);
diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
index 6afa4e6bcbad..0266119e125e 100644
--- a/drivers/clk/at91/sam9x7.c
+++ b/drivers/clk/at91/sam9x7.c
@@ -744,22 +744,26 @@ static const struct {
static void __init sam9x7_pmc_setup(struct device_node *np)
{
struct clk_range range = CLK_RANGE(0, 0);
- const char *main_xtal_name;
+ const char *main_xtal_name, *td_slck_name, *md_slck_name;
struct pmc_data *sam9x7_pmc;
const char *parent_names[9];
void **clk_mux_buffer = NULL;
int clk_mux_buffer_size = 0;
struct regmap *regmap;
struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
- struct clk_hw *td_slck_hw, *md_slck_hw, *usbck_hw;
+ struct clk_hw *usbck_hw;
struct clk_parent_data parent_data[9];
- struct clk_hw *parent_hws[9];
int i, j;
- td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "td_slck"));
- md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "md_slck"));
- if (!td_slck_hw || !md_slck_hw)
+ i = of_property_match_string(np, "clock-names", "td_slck");
+ if (i < 0)
+ return;
+ td_slck_name = of_clk_get_parent_name(np, i);
+
+ i = of_property_match_string(np, "clock-names", "md_slck");
+ if (i < 0)
return;
+ md_slck_name = of_clk_get_parent_name(np, i);
i = of_property_match_string(np, "clock-names", "main_xtal");
if (i < 0)
@@ -859,7 +863,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
}
}
- parent_data[0] = AT91_CLK_PD_NAME("md_slck");
+ parent_data[0] = AT91_CLK_PD_NAME(md_slck_name);
parent_data[1] = AT91_CLK_PD_HW(sam9x7_pmc->chws[PMC_MAIN]);
parent_data[2] = AT91_CLK_PD_HW(sam9x7_plls[PLL_ID_PLLA][PLL_COMPID_DIV0].hw);
parent_data[3] = AT91_CLK_PD_HW(sam9x7_plls[PLL_ID_UPLL][PLL_COMPID_DIV0].hw);
@@ -885,8 +889,8 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
if (IS_ERR(usbck_hw))
goto err_free;
- parent_data[0] = AT91_CLK_PD_NAME("md_slck");
- parent_data[1] = AT91_CLK_PD_NAME("td_slck");
+ parent_data[0] = AT91_CLK_PD_NAME(md_slck_name);
+ parent_data[1] = AT91_CLK_PD_NAME(td_slck_name);
parent_data[2] = AT91_CLK_PD_HW(sam9x7_pmc->chws[PMC_MAIN]);
parent_data[3] = AT91_CLK_PD_HW(sam9x7_pmc->chws[PMC_MCK]);
parent_data[4] = AT91_CLK_PD_HW(sam9x7_plls[PLL_ID_PLLA][PLL_COMPID_DIV0].hw);
@@ -937,13 +941,12 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
sam9x7_pmc->phws[sam9x7_periphck[i].id] = hw;
}
- parent_hws[0] = md_slck_hw;
- parent_hws[1] = td_slck_hw;
- parent_hws[2] = sam9x7_pmc->chws[PMC_MAIN];
- parent_hws[3] = sam9x7_pmc->chws[PMC_MCK];
+ parent_data[0] = AT91_CLK_PD_NAME(md_slck_name);
+ parent_data[1] = AT91_CLK_PD_NAME(td_slck_name);
+ parent_data[2] = AT91_CLK_PD_HW(sam9x7_pmc->chws[PMC_MAIN]);
+ parent_data[3] = AT91_CLK_PD_HW(sam9x7_pmc->chws[PMC_MCK]);
for (i = 0; i < ARRAY_SIZE(sam9x7_gck); i++) {
u8 num_parents = 4 + sam9x7_gck[i].pp_count;
- struct clk_hw *tmp_parent_hws[6];
u32 *mux_table;
mux_table = kmalloc_array(num_parents, sizeof(*mux_table),
@@ -959,16 +962,13 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
u8 pll_id = sam9x7_gck[i].pp[j].pll_id;
u8 pll_compid = sam9x7_gck[i].pp[j].pll_compid;
- tmp_parent_hws[j] = sam9x7_plls[pll_id][pll_compid].hw;
+ parent_data[4 + j] = AT91_CLK_PD_HW(sam9x7_plls[pll_id][pll_compid].hw);
}
- PMC_FILL_TABLE(&parent_hws[4], tmp_parent_hws,
- sam9x7_gck[i].pp_count);
-
hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,
&sam9x7_pcr_layout,
sam9x7_gck[i].n,
- NULL, parent_hws, mux_table,
+ NULL, parent_data, mux_table,
num_parents,
sam9x7_gck[i].id,
&sam9x7_gck[i].r,
diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
index 8538c3e5fa5a..faad4fd28e85 100644
--- a/drivers/clk/at91/sama7d65.c
+++ b/drivers/clk/at91/sama7d65.c
@@ -1093,24 +1093,30 @@ static const struct clk_pcr_layout sama7d65_pcr_layout = {
static void __init sama7d65_pmc_setup(struct device_node *np)
{
- const char *main_xtal_name;
+ const char *main_xtal_name, *md_slck_name, *td_slck_name;
struct pmc_data *sama7d65_pmc;
const char *parent_names[11];
void **alloc_mem = NULL;
int alloc_mem_size = 0;
struct regmap *regmap;
struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
- struct clk_hw *td_slck_hw, *md_slck_hw;
struct clk_parent_data parent_data[10];
- struct clk_hw *parent_hws[10];
bool bypass;
int i, j;
- td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "td_slck"));
- md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "md_slck"));
+ i = of_property_match_string(np, "clock-names", "td_slck");
+ if (i < 0)
+ return;
+ td_slck_name = of_clk_get_parent_name(np, i);
+
+ i = of_property_match_string(np, "clock-names", "md_slck");
+ if (i < 0)
+ return;
+ md_slck_name = of_clk_get_parent_name(np, i);
+
i = of_property_match_string(np, "clock-names", "main_xtal");
- if (!td_slck_hw || !md_slck_hw || !i)
+ if (i < 0)
return;
main_xtal_name = of_clk_get_parent_name(np, i);
@@ -1218,8 +1224,8 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
sama7d65_pmc->chws[PMC_MCK] = hw;
sama7d65_mckx[PCK_PARENT_HW_MCK0].hw = hw;
- parent_data[0] = AT91_CLK_PD_NAME("md_slck");
- parent_data[1] = AT91_CLK_PD_NAME("td_slck");
+ parent_data[0] = AT91_CLK_PD_NAME(md_slck_name);
+ parent_data[1] = AT91_CLK_PD_NAME(td_slck_name);
parent_data[2] = AT91_CLK_PD_HW(sama7d65_pmc->chws[PMC_MAIN]);
for (i = PCK_PARENT_HW_MCK1; i < ARRAY_SIZE(sama7d65_mckx); i++) {
u8 num_parents = 3 + sama7d65_mckx[i].ep_count;
@@ -1264,8 +1270,8 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
if (IS_ERR(hw))
goto err_free;
- parent_data[0] = AT91_CLK_PD_NAME("md_slck");
- parent_data[1] = AT91_CLK_PD_NAME("td_slck");
+ parent_data[0] = AT91_CLK_PD_NAME(md_slck_name);
+ parent_data[1] = AT91_CLK_PD_NAME(td_slck_name);
parent_data[2] = AT91_CLK_PD_HW(sama7d65_pmc->chws[PMC_MAIN]);
parent_data[3] = AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_SYS][PLL_COMPID_DIV0].hw);
parent_data[4] = AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_DDR][PLL_COMPID_DIV0].hw);
@@ -1315,13 +1321,12 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
sama7d65_pmc->phws[sama7d65_periphck[i].id] = hw;
}
- parent_hws[0] = md_slck_hw;
- parent_hws[1] = td_slck_hw;
- parent_hws[2] = sama7d65_pmc->chws[PMC_MAIN];
- parent_hws[3] = sama7d65_pmc->chws[PMC_MCK1];
+ parent_data[0] = AT91_CLK_PD_NAME(md_slck_name);
+ parent_data[1] = AT91_CLK_PD_NAME(td_slck_name);
+ parent_data[2] = AT91_CLK_PD_HW(sama7d65_pmc->chws[PMC_MAIN]);
+ parent_data[3] = AT91_CLK_PD_HW(sama7d65_pmc->chws[PMC_MCK1]);
for (i = 0; i < ARRAY_SIZE(sama7d65_gck); i++) {
u8 num_parents = 4 + sama7d65_gck[i].pp_count;
- struct clk_hw *tmp_parent_hws[8];
u32 *mux_table;
mux_table = kmalloc_array(num_parents, sizeof(*mux_table),
@@ -1338,15 +1343,13 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
u8 pll_id = sama7d65_gck[i].pp[j].pll_id;
u8 pll_compid = sama7d65_gck[i].pp[j].pll_compid;
- tmp_parent_hws[j] = sama7d65_plls[pll_id][pll_compid].hw;
+ parent_data[4 + j] = AT91_CLK_PD_HW(sama7d65_plls[pll_id][pll_compid].hw);
}
- PMC_FILL_TABLE(&parent_hws[4], tmp_parent_hws,
- sama7d65_gck[i].pp_count);
hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,
&sama7d65_pcr_layout,
sama7d65_gck[i].n, NULL,
- parent_hws, mux_table,
+ parent_data, mux_table,
num_parents,
sama7d65_gck[i].id,
&sama7d65_gck[i].r,
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index ddd5ad318990..ddbf69beb495 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -971,24 +971,30 @@ static const struct clk_pcr_layout sama7g5_pcr_layout = {
static void __init sama7g5_pmc_setup(struct device_node *np)
{
- const char *main_xtal_name;
+ const char *main_xtal_name, *md_slck_name, *td_slck_name;
struct pmc_data *sama7g5_pmc;
void **alloc_mem = NULL;
int alloc_mem_size = 0;
struct regmap *regmap;
struct clk_hw *hw, *main_rc_hw, *main_osc_hw;
- struct clk_hw *td_slck_hw, *md_slck_hw;
struct clk_parent_data parent_data[10];
- struct clk_hw *parent_hws[10];
struct clk *main_xtal;
bool bypass;
int i, j;
- td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "td_slck"));
- md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "md_slck"));
+ i = of_property_match_string(np, "clock-names", "td_slck");
+ if (i < 0)
+ return;
+ td_slck_name = of_clk_get_parent_name(np, i);
+
+ i = of_property_match_string(np, "clock-names", "md_slck");
+ if (i < 0)
+ return;
+ md_slck_name = of_clk_get_parent_name(np, i);
+
i = of_property_match_string(np, "clock-names", "main_xtal");
- if (!td_slck_hw || !md_slck_hw || !i)
+ if (i < 0)
return;
main_xtal_name = of_clk_get_parent_name(np, i);
@@ -1099,8 +1105,8 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
sama7g5_mckx[PCK_PARENT_HW_MCK0].hw = sama7g5_pmc->chws[PMC_MCK] = hw;
- parent_data[0] = AT91_CLK_PD_NAME("md_slck");
- parent_data[1] = AT91_CLK_PD_NAME("td_slck");
+ parent_data[0] = AT91_CLK_PD_NAME(md_slck_name);
+ parent_data[1] = AT91_CLK_PD_NAME(td_slck_name);
parent_data[2] = AT91_CLK_PD_HW(sama7g5_pmc->chws[PMC_MAIN]);
for (i = PCK_PARENT_HW_MCK1; i < ARRAY_SIZE(sama7g5_mckx); i++) {
u8 num_parents = 3 + sama7g5_mckx[i].ep_count;
@@ -1143,8 +1149,8 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
sama7g5_pmc->chws[PMC_UTMI] = hw;
- parent_data[0] = AT91_CLK_PD_NAME("md_slck");
- parent_data[1] = AT91_CLK_PD_NAME("td_slck");
+ parent_data[0] = AT91_CLK_PD_NAME(md_slck_name);
+ parent_data[1] = AT91_CLK_PD_NAME(td_slck_name);
parent_data[2] = AT91_CLK_PD_HW(sama7g5_pmc->chws[PMC_MAIN]);
parent_data[3] = AT91_CLK_PD_HW(sama7g5_plls[PLL_ID_SYS][PLL_COMPID_DIV0].hw);
parent_data[4] = AT91_CLK_PD_HW(sama7g5_plls[PLL_ID_DDR][PLL_COMPID_DIV0].hw);
@@ -1193,12 +1199,11 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
sama7g5_pmc->phws[sama7g5_periphck[i].id] = hw;
}
- parent_hws[0] = md_slck_hw;
- parent_hws[1] = td_slck_hw;
- parent_hws[2] = sama7g5_pmc->chws[PMC_MAIN];
+ parent_data[0] = AT91_CLK_PD_NAME(md_slck_name);
+ parent_data[1] = AT91_CLK_PD_NAME(td_slck_name);
+ parent_data[2] = AT91_CLK_PD_HW(sama7g5_pmc->chws[PMC_MAIN]);
for (i = 0; i < ARRAY_SIZE(sama7g5_gck); i++) {
u8 num_parents = 3 + sama7g5_gck[i].pp_count;
- struct clk_hw *tmp_parent_hws[8];
u32 *mux_table;
mux_table = kmalloc_array(num_parents, sizeof(*mux_table),
@@ -1213,15 +1218,13 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
u8 pll_id = sama7g5_gck[i].pp[j].pll_id;
u8 pll_compid = sama7g5_gck[i].pp[j].pll_compid;
- tmp_parent_hws[j] = sama7g5_plls[pll_id][pll_compid].hw;
+ parent_data[3 + j] = AT91_CLK_PD_HW(sama7g5_plls[pll_id][pll_compid].hw);
}
- PMC_FILL_TABLE(&parent_hws[3], tmp_parent_hws,
- sama7g5_gck[i].pp_count);
hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,
&sama7g5_pcr_layout,
sama7g5_gck[i].n, NULL,
- parent_hws, mux_table,
+ parent_data, mux_table,
num_parents,
sama7g5_gck[i].id,
&sama7g5_gck[i].r,
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 11/31] clk: at91: clk-usb: add support for clk_parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (9 preceding siblings ...)
2025-09-18 21:15 ` [PATCH v4 10/31] clk: at91: clk-generated: " Ryan.Wanner
@ 2025-09-18 21:15 ` Ryan.Wanner
2025-10-20 19:17 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 12/31] clk: at91: clk-system: use clk_parent_data Ryan.Wanner
` (19 subsequent siblings)
30 siblings, 1 reply; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:15 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Add support for clk_parent_data in usb clock driver.
All the SoC based drivers that rely on clk-usb were adapted
to the new API change. The switch itself for SoCs will be done
in subsequent patches.
Remove the use of __clk_get_hw() for the slow clocks.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
[ryan.wanner@microchip: Add SAMA7D65 and SAM9X75 SoCs to the changes.
Change how the main_xtal and slcks are initialized so they match the
parent_data API]
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/at91rm9200.c | 2 +-
drivers/clk/at91/at91sam9260.c | 2 +-
drivers/clk/at91/at91sam9g45.c | 2 +-
drivers/clk/at91/at91sam9n12.c | 2 +-
drivers/clk/at91/at91sam9x5.c | 2 +-
drivers/clk/at91/clk-usb.c | 41 ++++++++++++++++++++++------------
drivers/clk/at91/dt-compat.c | 6 ++---
drivers/clk/at91/pmc.h | 11 +++++----
drivers/clk/at91/sam9x60.c | 2 +-
drivers/clk/at91/sam9x7.c | 21 +++++++++--------
drivers/clk/at91/sama5d2.c | 2 +-
drivers/clk/at91/sama5d3.c | 2 +-
drivers/clk/at91/sama5d4.c | 2 +-
drivers/clk/at91/sama7d65.c | 24 +++++++++++---------
14 files changed, 72 insertions(+), 49 deletions(-)
diff --git a/drivers/clk/at91/at91rm9200.c b/drivers/clk/at91/at91rm9200.c
index 3f19e737ae4d..e5a034f208d8 100644
--- a/drivers/clk/at91/at91rm9200.c
+++ b/drivers/clk/at91/at91rm9200.c
@@ -157,7 +157,7 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
at91rm9200_pmc->chws[PMC_MCK] = hw;
- hw = at91rm9200_clk_register_usb(regmap, "usbck", "pllbck", usb_div);
+ hw = at91rm9200_clk_register_usb(regmap, "usbck", "pllbck", NULL, usb_div);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/at91sam9260.c b/drivers/clk/at91/at91sam9260.c
index 0799a13060ea..ae6f126f204a 100644
--- a/drivers/clk/at91/at91sam9260.c
+++ b/drivers/clk/at91/at91sam9260.c
@@ -434,7 +434,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
at91sam9260_pmc->chws[PMC_MCK] = hw;
- hw = at91rm9200_clk_register_usb(regmap, "usbck", "pllbck", usb_div);
+ hw = at91rm9200_clk_register_usb(regmap, "usbck", "pllbck", NULL, usb_div);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/at91sam9g45.c b/drivers/clk/at91/at91sam9g45.c
index f45a7b80f7d8..684d2bcb36e8 100644
--- a/drivers/clk/at91/at91sam9g45.c
+++ b/drivers/clk/at91/at91sam9g45.c
@@ -176,7 +176,7 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np)
parent_names[0] = "plladivck";
parent_names[1] = "utmick";
- hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, 2);
+ hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, NULL, 2);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/at91sam9n12.c b/drivers/clk/at91/at91sam9n12.c
index 751786184ae2..9fc20b177b13 100644
--- a/drivers/clk/at91/at91sam9n12.c
+++ b/drivers/clk/at91/at91sam9n12.c
@@ -201,7 +201,7 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np)
at91sam9n12_pmc->chws[PMC_MCK] = hw;
- hw = at91sam9n12_clk_register_usb(regmap, "usbck", "pllbck");
+ hw = at91sam9n12_clk_register_usb(regmap, "usbck", "pllbck", NULL);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/at91sam9x5.c b/drivers/clk/at91/at91sam9x5.c
index 3b801d12fac0..5728cfb9036f 100644
--- a/drivers/clk/at91/at91sam9x5.c
+++ b/drivers/clk/at91/at91sam9x5.c
@@ -222,7 +222,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
parent_names[0] = "plladivck";
parent_names[1] = "utmick";
- hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, 2);
+ hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, NULL, 2);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/clk-usb.c b/drivers/clk/at91/clk-usb.c
index b0696a928aa9..b2503fad4543 100644
--- a/drivers/clk/at91/clk-usb.c
+++ b/drivers/clk/at91/clk-usb.c
@@ -221,12 +221,12 @@ static const struct clk_ops at91sam9n12_usb_ops = {
static struct clk_hw * __init
_at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name,
- const char **parent_names, u8 num_parents,
- u32 usbs_mask)
+ const char **parent_names, struct clk_parent_data *parent_data,
+ u8 num_parents, u32 usbs_mask)
{
struct at91sam9x5_clk_usb *usb;
struct clk_hw *hw;
- struct clk_init_data init;
+ struct clk_init_data init = {};
int ret;
usb = kzalloc(sizeof(*usb), GFP_KERNEL);
@@ -235,7 +235,10 @@ _at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name,
init.name = name;
init.ops = &at91sam9x5_usb_ops;
- init.parent_names = parent_names;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
+ else
+ init.parent_names = parent_names;
init.num_parents = num_parents;
init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
CLK_SET_RATE_PARENT;
@@ -257,27 +260,30 @@ _at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name,
struct clk_hw * __init
at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name,
- const char **parent_names, u8 num_parents)
+ const char **parent_names, struct clk_parent_data *parent_data,
+ u8 num_parents)
{
return _at91sam9x5_clk_register_usb(regmap, name, parent_names,
- num_parents, SAM9X5_USBS_MASK);
+ parent_data, num_parents, SAM9X5_USBS_MASK);
}
struct clk_hw * __init
sam9x60_clk_register_usb(struct regmap *regmap, const char *name,
- const char **parent_names, u8 num_parents)
+ const char **parent_names, struct clk_parent_data *parent_data,
+ u8 num_parents)
{
return _at91sam9x5_clk_register_usb(regmap, name, parent_names,
- num_parents, SAM9X60_USBS_MASK);
+ parent_data, num_parents,
+ SAM9X60_USBS_MASK);
}
struct clk_hw * __init
at91sam9n12_clk_register_usb(struct regmap *regmap, const char *name,
- const char *parent_name)
+ const char *parent_name, struct clk_parent_data *parent_data)
{
struct at91sam9x5_clk_usb *usb;
struct clk_hw *hw;
- struct clk_init_data init;
+ struct clk_init_data init = {};
int ret;
usb = kzalloc(sizeof(*usb), GFP_KERNEL);
@@ -286,7 +292,10 @@ at91sam9n12_clk_register_usb(struct regmap *regmap, const char *name,
init.name = name;
init.ops = &at91sam9n12_usb_ops;
- init.parent_names = &parent_name;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
+ else
+ init.parent_names = &parent_name;
init.num_parents = 1;
init.flags = CLK_SET_RATE_GATE | CLK_SET_RATE_PARENT;
@@ -390,11 +399,12 @@ static const struct clk_ops at91rm9200_usb_ops = {
struct clk_hw * __init
at91rm9200_clk_register_usb(struct regmap *regmap, const char *name,
- const char *parent_name, const u32 *divisors)
+ const char *parent_name, struct clk_parent_data *parent_data,
+ const u32 *divisors)
{
struct at91rm9200_clk_usb *usb;
struct clk_hw *hw;
- struct clk_init_data init;
+ struct clk_init_data init = {};
int ret;
usb = kzalloc(sizeof(*usb), GFP_KERNEL);
@@ -403,7 +413,10 @@ at91rm9200_clk_register_usb(struct regmap *regmap, const char *name,
init.name = name;
init.ops = &at91rm9200_usb_ops;
- init.parent_names = &parent_name;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
+ else
+ init.parent_names = &parent_name;
init.num_parents = 1;
init.flags = CLK_SET_RATE_PARENT;
diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c
index f5a5f9ba7634..7883198f6a98 100644
--- a/drivers/clk/at91/dt-compat.c
+++ b/drivers/clk/at91/dt-compat.c
@@ -946,7 +946,7 @@ static void __init of_at91sam9x5_clk_usb_setup(struct device_node *np)
if (IS_ERR(regmap))
return;
- hw = at91sam9x5_clk_register_usb(regmap, name, parent_names,
+ hw = at91sam9x5_clk_register_usb(regmap, name, parent_names, NULL,
num_parents);
if (IS_ERR(hw))
return;
@@ -976,7 +976,7 @@ static void __init of_at91sam9n12_clk_usb_setup(struct device_node *np)
if (IS_ERR(regmap))
return;
- hw = at91sam9n12_clk_register_usb(regmap, name, parent_name);
+ hw = at91sam9n12_clk_register_usb(regmap, name, parent_name, NULL);
if (IS_ERR(hw))
return;
@@ -1009,7 +1009,7 @@ static void __init of_at91rm9200_clk_usb_setup(struct device_node *np)
of_node_put(parent_np);
if (IS_ERR(regmap))
return;
- hw = at91rm9200_clk_register_usb(regmap, name, parent_name, divisors);
+ hw = at91rm9200_clk_register_usb(regmap, name, parent_name, NULL, divisors);
if (IS_ERR(hw))
return;
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index 2aa84c49bd2f..84dc53849ae2 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -288,16 +288,19 @@ at91_clk_register_system(struct regmap *regmap, const char *name,
struct clk_hw * __init
at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name,
- const char **parent_names, u8 num_parents);
+ const char **parent_names, struct clk_parent_data *parent_data,
+ u8 num_parents);
struct clk_hw * __init
at91sam9n12_clk_register_usb(struct regmap *regmap, const char *name,
- const char *parent_name);
+ const char *parent_name, struct clk_parent_data *parent_data);
struct clk_hw * __init
sam9x60_clk_register_usb(struct regmap *regmap, const char *name,
- const char **parent_names, u8 num_parents);
+ const char **parent_names, struct clk_parent_data *parent_data,
+ u8 num_parents);
struct clk_hw * __init
at91rm9200_clk_register_usb(struct regmap *regmap, const char *name,
- const char *parent_name, const u32 *divisors);
+ const char *parent_name, struct clk_parent_data *parent_data,
+ const u32 *divisors);
struct clk_hw * __init
at91_clk_register_utmi(struct regmap *regmap_pmc, struct regmap *regmap_sfr,
diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
index bee35c65aceb..2ab7deab95f3 100644
--- a/drivers/clk/at91/sam9x60.c
+++ b/drivers/clk/at91/sam9x60.c
@@ -308,7 +308,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
parent_names[0] = "pllack_divck";
parent_names[1] = "upllck_divck";
parent_names[2] = "main_osc";
- hw = sam9x60_clk_register_usb(regmap, "usbck", parent_names, 3);
+ hw = sam9x60_clk_register_usb(regmap, "usbck", parent_names, NULL, 3);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
index 0266119e125e..536f1271d62a 100644
--- a/drivers/clk/at91/sam9x7.c
+++ b/drivers/clk/at91/sam9x7.c
@@ -746,12 +746,12 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
struct clk_range range = CLK_RANGE(0, 0);
const char *main_xtal_name, *td_slck_name, *md_slck_name;
struct pmc_data *sam9x7_pmc;
- const char *parent_names[9];
void **clk_mux_buffer = NULL;
int clk_mux_buffer_size = 0;
struct regmap *regmap;
- struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
+ struct clk_hw *hw, *main_rc_hw, *main_osc_hw;
struct clk_hw *usbck_hw;
+ struct clk *main_xtal;
struct clk_parent_data parent_data[9];
int i, j;
@@ -816,18 +816,21 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
switch (sam9x7_plls[i][j].p) {
case SAM9X7_PLL_PARENT_MAINCK:
parent_data[0] = AT91_CLK_PD_NAME("mainck");
- hw = sam9x7_pmc->chws[PMC_MAIN];
+ parent_rate = clk_hw_get_rate(sam9x7_pmc->chws[PMC_MAIN]);
break;
case SAM9X7_PLL_PARENT_MAIN_XTAL:
+ main_xtal = of_clk_get_by_name(np, main_xtal_name);
+ if (IS_ERR(main_xtal))
+ goto err_free;
parent_data[0] = AT91_CLK_PD_NAME(main_xtal_name);
- hw = main_xtal_hw;
+ parent_rate = clk_get_rate(main_xtal);
+ clk_put(main_xtal);
break;
default:
/* Should not happen. */
break;
}
- parent_rate = clk_hw_get_rate(hw);
if (!parent_rate)
return;
@@ -882,10 +885,10 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
sam9x7_pmc->chws[PMC_MCK] = hw;
- parent_names[0] = "plla_divpmcck";
- parent_names[1] = "upll_divpmcck";
- parent_names[2] = "main_osc";
- usbck_hw = sam9x60_clk_register_usb(regmap, "usbck", parent_names, 3);
+ parent_data[0] = AT91_CLK_PD_HW(sam9x7_plls[PLL_ID_PLLA][PLL_COMPID_DIV0].hw);
+ parent_data[1] = AT91_CLK_PD_HW(sam9x7_plls[PLL_ID_UPLL][PLL_COMPID_DIV0].hw);
+ parent_data[2] = AT91_CLK_PD_HW(main_osc_hw);
+ usbck_hw = sam9x60_clk_register_usb(regmap, "usbck", NULL, parent_data, 3);
if (IS_ERR(usbck_hw))
goto err_free;
diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c
index c16594fce90c..8bbc34e22cda 100644
--- a/drivers/clk/at91/sama5d2.c
+++ b/drivers/clk/at91/sama5d2.c
@@ -284,7 +284,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
parent_names[0] = "plladivck";
parent_names[1] = "utmick";
- hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, 2);
+ hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, NULL, 2);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/sama5d3.c b/drivers/clk/at91/sama5d3.c
index 522ce6031446..05d0cdd22bc4 100644
--- a/drivers/clk/at91/sama5d3.c
+++ b/drivers/clk/at91/sama5d3.c
@@ -201,7 +201,7 @@ static void __init sama5d3_pmc_setup(struct device_node *np)
parent_names[0] = "plladivck";
parent_names[1] = "utmick";
- hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, 2);
+ hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, NULL, 2);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/sama5d4.c b/drivers/clk/at91/sama5d4.c
index 160c0bddb6a3..da84b4cef827 100644
--- a/drivers/clk/at91/sama5d4.c
+++ b/drivers/clk/at91/sama5d4.c
@@ -222,7 +222,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
parent_names[0] = "plladivck";
parent_names[1] = "utmick";
- hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, 2);
+ hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, NULL, 2);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
index faad4fd28e85..986e8ef57dea 100644
--- a/drivers/clk/at91/sama7d65.c
+++ b/drivers/clk/at91/sama7d65.c
@@ -1095,11 +1095,11 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
{
const char *main_xtal_name, *md_slck_name, *td_slck_name;
struct pmc_data *sama7d65_pmc;
- const char *parent_names[11];
void **alloc_mem = NULL;
int alloc_mem_size = 0;
+ struct clk *main_xtal;
struct regmap *regmap;
- struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
+ struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *usbck_hw;
struct clk_parent_data parent_data[10];
bool bypass;
int i, j;
@@ -1169,17 +1169,21 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
switch (sama7d65_plls[i][j].p) {
case SAMA7D65_PLL_PARENT_MAINCK:
parent_data[0] = AT91_CLK_PD_NAME("mainck");
- hw = sama7d65_pmc->chws[PMC_MAIN];
+ parent_rate = clk_hw_get_rate(sama7d65_pmc->chws[PMC_MAIN]);
break;
case SAMA7D65_PLL_PARENT_MAIN_XTAL:
+ main_xtal = of_clk_get_by_name(np, main_xtal_name);
+ if (IS_ERR(main_xtal))
+ goto err_free;
parent_data[0] = AT91_CLK_PD_NAME(main_xtal_name);
- hw = main_xtal_hw;
+ parent_rate = clk_get_rate(main_xtal);
+ clk_put(main_xtal);
break;
default:
/* Should not happen. */
break;
}
- parent_rate = clk_hw_get_rate(hw);
+
if (!parent_rate)
return;
@@ -1263,11 +1267,11 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
sama7d65_pmc->chws[sama7d65_mckx[i].eid] = hw;
}
- parent_names[0] = "syspll_divpmcck";
- parent_names[1] = "usbpll_divpmcck";
- parent_names[2] = "main_osc";
- hw = sam9x60_clk_register_usb(regmap, "usbck", parent_names, 3);
- if (IS_ERR(hw))
+ parent_data[0] = AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_SYS][PLL_COMPID_DIV0].hw);
+ parent_data[1] = AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_USB][PLL_COMPID_DIV0].hw);
+ parent_data[2] = AT91_CLK_PD_HW(main_osc_hw);
+ usbck_hw = sam9x60_clk_register_usb(regmap, "usbck", NULL, parent_data, 3);
+ if (IS_ERR(usbck_hw))
goto err_free;
parent_data[0] = AT91_CLK_PD_NAME(md_slck_name);
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 12/31] clk: at91: clk-system: use clk_parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (10 preceding siblings ...)
2025-09-18 21:15 ` [PATCH v4 11/31] clk: at91: clk-usb: add support for clk_parent_data Ryan.Wanner
@ 2025-09-18 21:15 ` Ryan.Wanner
2025-09-18 21:15 ` [PATCH v4 13/31] clk: at91: sama7d65: switch to parent_hw and parent_data Ryan.Wanner
` (18 subsequent siblings)
30 siblings, 0 replies; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:15 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Use struct clk_parent_data instead of struct parent_hw as this leads
to less usage of __clk_get_hw() in SoC specific clock drivers and simpler
conversion of existing SoC specific clock drivers from parent_names to
modern clk_parent_data structures.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
[ryan.wanner@microchip: Update SAM9X75 clk-system to use parent_data.]
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/clk-system.c | 8 ++++----
drivers/clk/at91/pmc.h | 2 +-
drivers/clk/at91/sam9x7.c | 2 +-
drivers/clk/at91/sama7g5.c | 2 +-
4 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/clk/at91/clk-system.c b/drivers/clk/at91/clk-system.c
index 90eed39d0785..55f8e46fe9c7 100644
--- a/drivers/clk/at91/clk-system.c
+++ b/drivers/clk/at91/clk-system.c
@@ -105,7 +105,7 @@ static const struct clk_ops system_ops = {
struct clk_hw * __init
at91_clk_register_system(struct regmap *regmap, const char *name,
- const char *parent_name, struct clk_hw *parent_hw, u8 id,
+ const char *parent_name, struct clk_parent_data *parent_data, u8 id,
unsigned long flags)
{
struct clk_system *sys;
@@ -113,7 +113,7 @@ at91_clk_register_system(struct regmap *regmap, const char *name,
struct clk_init_data init = {};
int ret;
- if (!(parent_name || parent_hw) || id > SYSTEM_MAX_ID)
+ if (!(parent_name || parent_data) || id > SYSTEM_MAX_ID)
return ERR_PTR(-EINVAL);
sys = kzalloc(sizeof(*sys), GFP_KERNEL);
@@ -122,8 +122,8 @@ at91_clk_register_system(struct regmap *regmap, const char *name,
init.name = name;
init.ops = &system_ops;
- if (parent_hw)
- init.parent_hws = (const struct clk_hw **)&parent_hw;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
else
init.parent_names = &parent_name;
init.num_parents = 1;
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index 84dc53849ae2..d6ba32e348ba 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -283,7 +283,7 @@ at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name,
struct clk_hw * __init
at91_clk_register_system(struct regmap *regmap, const char *name,
- const char *parent_name, struct clk_hw *parent_hw,
+ const char *parent_name, struct clk_parent_data *parent_data,
u8 id, unsigned long flags);
struct clk_hw * __init
diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
index 536f1271d62a..9262875c414b 100644
--- a/drivers/clk/at91/sam9x7.c
+++ b/drivers/clk/at91/sam9x7.c
@@ -921,7 +921,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
sam9x7_systemck[3].parent_hw = sam9x7_pmc->pchws[1];
for (i = 0; i < ARRAY_SIZE(sam9x7_systemck); i++) {
hw = at91_clk_register_system(regmap, sam9x7_systemck[i].n,
- NULL, sam9x7_systemck[i].parent_hw,
+ NULL, &AT91_CLK_PD_HW(sam9x7_systemck[i].parent_hw),
sam9x7_systemck[i].id,
sam9x7_systemck[i].flags);
if (IS_ERR(hw))
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index ddbf69beb495..c8219fbd5d1a 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -1175,7 +1175,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
for (i = 0; i < ARRAY_SIZE(sama7g5_systemck); i++) {
hw = at91_clk_register_system(regmap, sama7g5_systemck[i].n,
- NULL, sama7g5_pmc->pchws[i],
+ NULL, &AT91_CLK_PD_HW(sama7g5_pmc->pchws[i]),
sama7g5_systemck[i].id, 0);
if (IS_ERR(hw))
goto err_free;
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 13/31] clk: at91: sama7d65: switch to parent_hw and parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (11 preceding siblings ...)
2025-09-18 21:15 ` [PATCH v4 12/31] clk: at91: clk-system: use clk_parent_data Ryan.Wanner
@ 2025-09-18 21:15 ` Ryan.Wanner
2025-10-20 19:14 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 14/31] clk: at91: clk-pll: add support for parent_hw Ryan.Wanner
` (17 subsequent siblings)
30 siblings, 1 reply; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:15 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran,
Ryan Wanner
From: Ryan Wanner <Ryan.Wanner@microchip.com>
Switch the system clocks to use parent_hw and parent_data. Having this
allows the driver to conform to the new clk-system API.
The parent registration is after the USBCK registration due to one of
the system clocks being dependent on USBCK.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/sama7d65.c | 36 +++++++++++++++++++++++-------------
1 file changed, 23 insertions(+), 13 deletions(-)
diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
index 986e8ef57dea..38c44b5d5d42 100644
--- a/drivers/clk/at91/sama7d65.c
+++ b/drivers/clk/at91/sama7d65.c
@@ -537,23 +537,23 @@ static struct {
/*
* System clock description
* @n: clock name
- * @p: clock parent name
+ * @p: clock parent hw
* @id: clock id
*/
-static const struct {
+static struct {
const char *n;
- const char *p;
+ struct clk_hw *parent_hw;
u8 id;
} sama7d65_systemck[] = {
- { .n = "uhpck", .p = "usbck", .id = 6 },
- { .n = "pck0", .p = "prog0", .id = 8, },
- { .n = "pck1", .p = "prog1", .id = 9, },
- { .n = "pck2", .p = "prog2", .id = 10, },
- { .n = "pck3", .p = "prog3", .id = 11, },
- { .n = "pck4", .p = "prog4", .id = 12, },
- { .n = "pck5", .p = "prog5", .id = 13, },
- { .n = "pck6", .p = "prog6", .id = 14, },
- { .n = "pck7", .p = "prog7", .id = 15, },
+ { .n = "uhpck", .id = 6 },
+ { .n = "pck0", .id = 8, },
+ { .n = "pck1", .id = 9, },
+ { .n = "pck2", .id = 10, },
+ { .n = "pck3", .id = 11, },
+ { .n = "pck4", .id = 12, },
+ { .n = "pck5", .id = 13, },
+ { .n = "pck6", .id = 14, },
+ { .n = "pck7", .id = 15, },
};
/* Mux table for programmable clocks. */
@@ -1299,9 +1299,19 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
sama7d65_pmc->pchws[i] = hw;
}
+ /* Set systemck parent hws. */
+ sama7d65_systemck[0].parent_hw = usbck_hw;
+ sama7d65_systemck[1].parent_hw = sama7d65_pmc->pchws[0];
+ sama7d65_systemck[2].parent_hw = sama7d65_pmc->pchws[1];
+ sama7d65_systemck[3].parent_hw = sama7d65_pmc->pchws[2];
+ sama7d65_systemck[4].parent_hw = sama7d65_pmc->pchws[3];
+ sama7d65_systemck[5].parent_hw = sama7d65_pmc->pchws[4];
+ sama7d65_systemck[6].parent_hw = sama7d65_pmc->pchws[5];
+ sama7d65_systemck[7].parent_hw = sama7d65_pmc->pchws[6];
+ sama7d65_systemck[8].parent_hw = sama7d65_pmc->pchws[7];
for (i = 0; i < ARRAY_SIZE(sama7d65_systemck); i++) {
hw = at91_clk_register_system(regmap, sama7d65_systemck[i].n,
- sama7d65_systemck[i].p, NULL,
+ NULL, &AT91_CLK_PD_HW(sama7d65_systemck[i].parent_hw),
sama7d65_systemck[i].id, 0);
if (IS_ERR(hw))
goto err_free;
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 14/31] clk: at91: clk-pll: add support for parent_hw
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (12 preceding siblings ...)
2025-09-18 21:15 ` [PATCH v4 13/31] clk: at91: sama7d65: switch to parent_hw and parent_data Ryan.Wanner
@ 2025-09-18 21:15 ` Ryan.Wanner
2025-09-18 21:15 ` [PATCH v4 15/31] clk: at91: clk-audio-pll: " Ryan.Wanner
` (16 subsequent siblings)
30 siblings, 0 replies; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:15 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Add support for parent_hw in pll clock driver. With this parent-child
relation is described with pointers rather than strings making
registration a bit faster.
All the SoC based drivers that rely on clk-pll were adapted
to the new API change. The switch itself for SoCs will be done
in subsequent patches.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/at91rm9200.c | 4 ++--
drivers/clk/at91/at91sam9260.c | 4 ++--
drivers/clk/at91/at91sam9g45.c | 2 +-
drivers/clk/at91/at91sam9n12.c | 4 ++--
drivers/clk/at91/at91sam9rl.c | 2 +-
drivers/clk/at91/at91sam9x5.c | 2 +-
drivers/clk/at91/clk-pll.c | 9 ++++++---
drivers/clk/at91/dt-compat.c | 2 +-
drivers/clk/at91/pmc.h | 2 +-
drivers/clk/at91/sama5d2.c | 2 +-
drivers/clk/at91/sama5d3.c | 2 +-
drivers/clk/at91/sama5d4.c | 2 +-
12 files changed, 20 insertions(+), 17 deletions(-)
diff --git a/drivers/clk/at91/at91rm9200.c b/drivers/clk/at91/at91rm9200.c
index e5a034f208d8..623e232ec9c6 100644
--- a/drivers/clk/at91/at91rm9200.c
+++ b/drivers/clk/at91/at91rm9200.c
@@ -119,7 +119,7 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
at91rm9200_pmc->chws[PMC_MAIN] = hw;
- hw = at91_clk_register_pll(regmap, "pllack", "mainck", 0,
+ hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
&at91rm9200_pll_layout,
&rm9200_pll_characteristics);
if (IS_ERR(hw))
@@ -127,7 +127,7 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
at91rm9200_pmc->chws[PMC_PLLACK] = hw;
- hw = at91_clk_register_pll(regmap, "pllbck", "mainck", 1,
+ hw = at91_clk_register_pll(regmap, "pllbck", "mainck", NULL, 1,
&at91rm9200_pll_layout,
&rm9200_pll_characteristics);
if (IS_ERR(hw))
diff --git a/drivers/clk/at91/at91sam9260.c b/drivers/clk/at91/at91sam9260.c
index ae6f126f204a..f39deb3ec00a 100644
--- a/drivers/clk/at91/at91sam9260.c
+++ b/drivers/clk/at91/at91sam9260.c
@@ -395,7 +395,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
slck_name = slowxtal_name;
}
- hw = at91_clk_register_pll(regmap, "pllack", "mainck", 0,
+ hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
data->plla_layout,
data->plla_characteristics);
if (IS_ERR(hw))
@@ -403,7 +403,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
at91sam9260_pmc->chws[PMC_PLLACK] = hw;
- hw = at91_clk_register_pll(regmap, "pllbck", "mainck", 1,
+ hw = at91_clk_register_pll(regmap, "pllbck", "mainck", NULL, 1,
data->pllb_layout,
data->pllb_characteristics);
if (IS_ERR(hw))
diff --git a/drivers/clk/at91/at91sam9g45.c b/drivers/clk/at91/at91sam9g45.c
index 684d2bcb36e8..3436a09a6e8a 100644
--- a/drivers/clk/at91/at91sam9g45.c
+++ b/drivers/clk/at91/at91sam9g45.c
@@ -134,7 +134,7 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np)
at91sam9g45_pmc->chws[PMC_MAIN] = hw;
- hw = at91_clk_register_pll(regmap, "pllack", "mainck", 0,
+ hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
&at91rm9200_pll_layout, &plla_characteristics);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/at91sam9n12.c b/drivers/clk/at91/at91sam9n12.c
index 9fc20b177b13..80ccd4a49df3 100644
--- a/drivers/clk/at91/at91sam9n12.c
+++ b/drivers/clk/at91/at91sam9n12.c
@@ -160,7 +160,7 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np)
at91sam9n12_pmc->chws[PMC_MAIN] = hw;
- hw = at91_clk_register_pll(regmap, "pllack", "mainck", 0,
+ hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
&at91rm9200_pll_layout, &plla_characteristics);
if (IS_ERR(hw))
goto err_free;
@@ -171,7 +171,7 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np)
at91sam9n12_pmc->chws[PMC_PLLACK] = hw;
- hw = at91_clk_register_pll(regmap, "pllbck", "mainck", 1,
+ hw = at91_clk_register_pll(regmap, "pllbck", "mainck", NULL, 1,
&at91rm9200_pll_layout, &pllb_characteristics);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/at91sam9rl.c b/drivers/clk/at91/at91sam9rl.c
index 969f809e7d65..0e8657aac491 100644
--- a/drivers/clk/at91/at91sam9rl.c
+++ b/drivers/clk/at91/at91sam9rl.c
@@ -101,7 +101,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
at91sam9rl_pmc->chws[PMC_MAIN] = hw;
- hw = at91_clk_register_pll(regmap, "pllack", "mainck", 0,
+ hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
&at91rm9200_pll_layout,
&sam9rl_plla_characteristics);
if (IS_ERR(hw))
diff --git a/drivers/clk/at91/at91sam9x5.c b/drivers/clk/at91/at91sam9x5.c
index 5728cfb9036f..6b8c755fefdf 100644
--- a/drivers/clk/at91/at91sam9x5.c
+++ b/drivers/clk/at91/at91sam9x5.c
@@ -182,7 +182,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
at91sam9x5_pmc->chws[PMC_MAIN] = hw;
- hw = at91_clk_register_pll(regmap, "pllack", "mainck", 0,
+ hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
&at91rm9200_pll_layout, &plla_characteristics);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/clk-pll.c b/drivers/clk/at91/clk-pll.c
index 249d6a53cedf..f973c3b1bbec 100644
--- a/drivers/clk/at91/clk-pll.c
+++ b/drivers/clk/at91/clk-pll.c
@@ -310,13 +310,13 @@ static const struct clk_ops pll_ops = {
struct clk_hw * __init
at91_clk_register_pll(struct regmap *regmap, const char *name,
- const char *parent_name, u8 id,
+ const char *parent_name, struct clk_parent_data *parent_data, u8 id,
const struct clk_pll_layout *layout,
const struct clk_pll_characteristics *characteristics)
{
struct clk_pll *pll;
struct clk_hw *hw;
- struct clk_init_data init;
+ struct clk_init_data init = {};
int offset = PLL_REG(id);
unsigned int pllr;
int ret;
@@ -330,7 +330,10 @@ at91_clk_register_pll(struct regmap *regmap, const char *name,
init.name = name;
init.ops = &pll_ops;
- init.parent_names = &parent_name;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
+ else
+ init.parent_names = &parent_name;
init.num_parents = 1;
init.flags = CLK_SET_RATE_GATE;
diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c
index 7883198f6a98..2c5faa3b1cfd 100644
--- a/drivers/clk/at91/dt-compat.c
+++ b/drivers/clk/at91/dt-compat.c
@@ -665,7 +665,7 @@ of_at91_clk_pll_setup(struct device_node *np,
if (!characteristics)
return;
- hw = at91_clk_register_pll(regmap, name, parent_name, id, layout,
+ hw = at91_clk_register_pll(regmap, name, parent_name, NULL, id, layout,
characteristics);
if (IS_ERR(hw))
goto out_free_characteristics;
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index d6ba32e348ba..b983e44b742a 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -241,7 +241,7 @@ at91_clk_register_sam9x5_peripheral(struct regmap *regmap, spinlock_t *lock,
struct clk_hw * __init
at91_clk_register_pll(struct regmap *regmap, const char *name,
- const char *parent_name, u8 id,
+ const char *parent_name, struct clk_parent_data *parent_data, u8 id,
const struct clk_pll_layout *layout,
const struct clk_pll_characteristics *characteristics);
struct clk_hw * __init
diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c
index 8bbc34e22cda..bc62b9ed4ea0 100644
--- a/drivers/clk/at91/sama5d2.c
+++ b/drivers/clk/at91/sama5d2.c
@@ -215,7 +215,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
sama5d2_pmc->chws[PMC_MAIN] = hw;
- hw = at91_clk_register_pll(regmap, "pllack", "mainck", 0,
+ hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
&sama5d3_pll_layout, &plla_characteristics);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/sama5d3.c b/drivers/clk/at91/sama5d3.c
index 05d0cdd22bc4..9d86c350a1e7 100644
--- a/drivers/clk/at91/sama5d3.c
+++ b/drivers/clk/at91/sama5d3.c
@@ -161,7 +161,7 @@ static void __init sama5d3_pmc_setup(struct device_node *np)
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_pll(regmap, "pllack", "mainck", 0,
+ hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
&sama5d3_pll_layout, &plla_characteristics);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/sama5d4.c b/drivers/clk/at91/sama5d4.c
index da84b4cef827..8491b1e0391d 100644
--- a/drivers/clk/at91/sama5d4.c
+++ b/drivers/clk/at91/sama5d4.c
@@ -176,7 +176,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_pll(regmap, "pllack", "mainck", 0,
+ hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
&sama5d3_pll_layout, &plla_characteristics);
if (IS_ERR(hw))
goto err_free;
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 15/31] clk: at91: clk-audio-pll: add support for parent_hw
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (13 preceding siblings ...)
2025-09-18 21:15 ` [PATCH v4 14/31] clk: at91: clk-pll: add support for parent_hw Ryan.Wanner
@ 2025-09-18 21:15 ` Ryan.Wanner
2025-09-18 21:15 ` [PATCH v4 16/31] clk: at91: clk-plldiv: " Ryan.Wanner
` (15 subsequent siblings)
30 siblings, 0 replies; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:15 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Add support for parent_hw in audio pll clock drivers.
With this parent-child relation is described with pointers rather
than strings making registration a bit faster.
All the SoC based drivers that rely on clk-audio-pll were adapted
to the new API change. The switch itself for SoCs will be done
in subsequent patches.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/clk-audio-pll.c | 28 ++++++++++++++++++++--------
drivers/clk/at91/dt-compat.c | 6 +++---
drivers/clk/at91/pmc.h | 6 +++---
drivers/clk/at91/sama5d2.c | 6 +++---
4 files changed, 29 insertions(+), 17 deletions(-)
diff --git a/drivers/clk/at91/clk-audio-pll.c b/drivers/clk/at91/clk-audio-pll.c
index a92da64c12e1..da9b2e699dcc 100644
--- a/drivers/clk/at91/clk-audio-pll.c
+++ b/drivers/clk/at91/clk-audio-pll.c
@@ -450,7 +450,8 @@ static const struct clk_ops audio_pll_pmc_ops = {
struct clk_hw * __init
at91_clk_register_audio_pll_frac(struct regmap *regmap, const char *name,
- const char *parent_name)
+ const char *parent_name,
+ struct clk_parent_data *parent_data)
{
struct clk_audio_frac *frac_ck;
struct clk_init_data init = {};
@@ -462,7 +463,10 @@ at91_clk_register_audio_pll_frac(struct regmap *regmap, const char *name,
init.name = name;
init.ops = &audio_pll_frac_ops;
- init.parent_names = &parent_name;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
+ else
+ init.parent_names = &parent_name;
init.num_parents = 1;
init.flags = CLK_SET_RATE_GATE;
@@ -480,10 +484,11 @@ at91_clk_register_audio_pll_frac(struct regmap *regmap, const char *name,
struct clk_hw * __init
at91_clk_register_audio_pll_pad(struct regmap *regmap, const char *name,
- const char *parent_name)
+ const char *parent_name,
+ struct clk_parent_data *parent_data)
{
struct clk_audio_pad *apad_ck;
- struct clk_init_data init;
+ struct clk_init_data init = {};
int ret;
apad_ck = kzalloc(sizeof(*apad_ck), GFP_KERNEL);
@@ -492,7 +497,10 @@ at91_clk_register_audio_pll_pad(struct regmap *regmap, const char *name,
init.name = name;
init.ops = &audio_pll_pad_ops;
- init.parent_names = &parent_name;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
+ else
+ init.parent_names = &parent_name;
init.num_parents = 1;
init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
CLK_SET_RATE_PARENT;
@@ -511,10 +519,11 @@ at91_clk_register_audio_pll_pad(struct regmap *regmap, const char *name,
struct clk_hw * __init
at91_clk_register_audio_pll_pmc(struct regmap *regmap, const char *name,
- const char *parent_name)
+ const char *parent_name,
+ struct clk_parent_data *parent_data)
{
struct clk_audio_pmc *apmc_ck;
- struct clk_init_data init;
+ struct clk_init_data init = {};
int ret;
apmc_ck = kzalloc(sizeof(*apmc_ck), GFP_KERNEL);
@@ -523,7 +532,10 @@ at91_clk_register_audio_pll_pmc(struct regmap *regmap, const char *name,
init.name = name;
init.ops = &audio_pll_pmc_ops;
- init.parent_names = &parent_name;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
+ else
+ init.parent_names = &parent_name;
init.num_parents = 1;
init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
CLK_SET_RATE_PARENT;
diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c
index 2c5faa3b1cfd..22bcaa3b28dd 100644
--- a/drivers/clk/at91/dt-compat.c
+++ b/drivers/clk/at91/dt-compat.c
@@ -43,7 +43,7 @@ static void __init of_sama5d2_clk_audio_pll_frac_setup(struct device_node *np)
parent_name = of_clk_get_parent_name(np, 0);
- hw = at91_clk_register_audio_pll_frac(regmap, name, parent_name);
+ hw = at91_clk_register_audio_pll_frac(regmap, name, parent_name, NULL);
if (IS_ERR(hw))
return;
@@ -69,7 +69,7 @@ static void __init of_sama5d2_clk_audio_pll_pad_setup(struct device_node *np)
parent_name = of_clk_get_parent_name(np, 0);
- hw = at91_clk_register_audio_pll_pad(regmap, name, parent_name);
+ hw = at91_clk_register_audio_pll_pad(regmap, name, parent_name, NULL);
if (IS_ERR(hw))
return;
@@ -95,7 +95,7 @@ static void __init of_sama5d2_clk_audio_pll_pmc_setup(struct device_node *np)
parent_name = of_clk_get_parent_name(np, 0);
- hw = at91_clk_register_audio_pll_pmc(regmap, name, parent_name);
+ hw = at91_clk_register_audio_pll_pmc(regmap, name, parent_name, NULL);
if (IS_ERR(hw))
return;
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index b983e44b742a..37ef6f63de26 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -160,15 +160,15 @@ struct clk_hw *of_clk_hw_pmc_get(struct of_phandle_args *clkspec, void *data);
struct clk_hw * __init
at91_clk_register_audio_pll_frac(struct regmap *regmap, const char *name,
- const char *parent_name);
+ const char *parent_name, struct clk_parent_data *parent_data);
struct clk_hw * __init
at91_clk_register_audio_pll_pad(struct regmap *regmap, const char *name,
- const char *parent_name);
+ const char *parent_name, struct clk_parent_data *parent_data);
struct clk_hw * __init
at91_clk_register_audio_pll_pmc(struct regmap *regmap, const char *name,
- const char *parent_name);
+ const char *parent_name, struct clk_parent_data *parent_data);
struct clk_hw * __init
at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock,
diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c
index bc62b9ed4ea0..d2af421abddc 100644
--- a/drivers/clk/at91/sama5d2.c
+++ b/drivers/clk/at91/sama5d2.c
@@ -227,19 +227,19 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
sama5d2_pmc->chws[PMC_PLLACK] = hw;
hw = at91_clk_register_audio_pll_frac(regmap, "audiopll_fracck",
- "mainck");
+ "mainck", NULL);
if (IS_ERR(hw))
goto err_free;
hw = at91_clk_register_audio_pll_pad(regmap, "audiopll_padck",
- "audiopll_fracck");
+ "audiopll_fracck", NULL);
if (IS_ERR(hw))
goto err_free;
sama5d2_pmc->chws[PMC_AUDIOPINCK] = hw;
hw = at91_clk_register_audio_pll_pmc(regmap, "audiopll_pmcck",
- "audiopll_fracck");
+ "audiopll_fracck", NULL);
if (IS_ERR(hw))
goto err_free;
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 16/31] clk: at91: clk-plldiv: add support for parent_hw
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (14 preceding siblings ...)
2025-09-18 21:15 ` [PATCH v4 15/31] clk: at91: clk-audio-pll: " Ryan.Wanner
@ 2025-09-18 21:15 ` Ryan.Wanner
2025-10-20 19:12 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 17/31] clk: at91: clk-h32mx: " Ryan.Wanner
` (14 subsequent siblings)
30 siblings, 1 reply; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:15 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Add support for parent_hw in plldiv clock driver.
With this parent-child relation is described with pointers rather
than strings making registration a bit faster.
All the SoC based drivers that rely on clk-plldiv were adapted
to the new API change. The switch itself for SoCs will be done
in subsequent patches.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/at91sam9g45.c | 2 +-
drivers/clk/at91/at91sam9n12.c | 2 +-
drivers/clk/at91/at91sam9x5.c | 2 +-
drivers/clk/at91/clk-plldiv.c | 11 +++++++----
drivers/clk/at91/dt-compat.c | 2 +-
drivers/clk/at91/pmc.h | 2 +-
drivers/clk/at91/sama5d2.c | 2 +-
drivers/clk/at91/sama5d3.c | 2 +-
drivers/clk/at91/sama5d4.c | 2 +-
9 files changed, 15 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/at91/at91sam9g45.c b/drivers/clk/at91/at91sam9g45.c
index 3436a09a6e8a..cb98d22c2e30 100644
--- a/drivers/clk/at91/at91sam9g45.c
+++ b/drivers/clk/at91/at91sam9g45.c
@@ -139,7 +139,7 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np)
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack");
+ hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack", NULL);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/at91sam9n12.c b/drivers/clk/at91/at91sam9n12.c
index 80ccd4a49df3..34dd7645f964 100644
--- a/drivers/clk/at91/at91sam9n12.c
+++ b/drivers/clk/at91/at91sam9n12.c
@@ -165,7 +165,7 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np)
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack");
+ hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack", NULL);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/at91sam9x5.c b/drivers/clk/at91/at91sam9x5.c
index 6b8c755fefdf..37280852f086 100644
--- a/drivers/clk/at91/at91sam9x5.c
+++ b/drivers/clk/at91/at91sam9x5.c
@@ -187,7 +187,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack");
+ hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack", NULL);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/clk-plldiv.c b/drivers/clk/at91/clk-plldiv.c
index ba3a1839a96d..c5d0c6e27397 100644
--- a/drivers/clk/at91/clk-plldiv.c
+++ b/drivers/clk/at91/clk-plldiv.c
@@ -72,11 +72,11 @@ static const struct clk_ops plldiv_ops = {
struct clk_hw * __init
at91_clk_register_plldiv(struct regmap *regmap, const char *name,
- const char *parent_name)
+ const char *parent_name, struct clk_parent_data *parent_data)
{
struct clk_plldiv *plldiv;
struct clk_hw *hw;
- struct clk_init_data init;
+ struct clk_init_data init = {};
int ret;
plldiv = kzalloc(sizeof(*plldiv), GFP_KERNEL);
@@ -85,8 +85,11 @@ at91_clk_register_plldiv(struct regmap *regmap, const char *name,
init.name = name;
init.ops = &plldiv_ops;
- init.parent_names = parent_name ? &parent_name : NULL;
- init.num_parents = parent_name ? 1 : 0;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
+ else
+ init.parent_names = &parent_name;
+ init.num_parents = 1;
init.flags = CLK_SET_RATE_GATE;
plldiv->hw.init = &init;
diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c
index 22bcaa3b28dd..3285e3110b58 100644
--- a/drivers/clk/at91/dt-compat.c
+++ b/drivers/clk/at91/dt-compat.c
@@ -724,7 +724,7 @@ of_at91sam9x5_clk_plldiv_setup(struct device_node *np)
if (IS_ERR(regmap))
return;
- hw = at91_clk_register_plldiv(regmap, name, parent_name);
+ hw = at91_clk_register_plldiv(regmap, name, parent_name, NULL);
if (IS_ERR(hw))
return;
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index 37ef6f63de26..db067177e6ef 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -246,7 +246,7 @@ at91_clk_register_pll(struct regmap *regmap, const char *name,
const struct clk_pll_characteristics *characteristics);
struct clk_hw * __init
at91_clk_register_plldiv(struct regmap *regmap, const char *name,
- const char *parent_name);
+ const char *parent_name, struct clk_parent_data *parent_data);
struct clk_hw * __init
sam9x60_clk_register_div_pll(struct regmap *regmap, spinlock_t *lock,
diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c
index d2af421abddc..7904f2122ed7 100644
--- a/drivers/clk/at91/sama5d2.c
+++ b/drivers/clk/at91/sama5d2.c
@@ -220,7 +220,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack");
+ hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack", NULL);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/sama5d3.c b/drivers/clk/at91/sama5d3.c
index 9d86c350a1e7..7f2ac8f648dd 100644
--- a/drivers/clk/at91/sama5d3.c
+++ b/drivers/clk/at91/sama5d3.c
@@ -166,7 +166,7 @@ static void __init sama5d3_pmc_setup(struct device_node *np)
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack");
+ hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack", NULL);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/sama5d4.c b/drivers/clk/at91/sama5d4.c
index 8491b1e0391d..7cda8032653e 100644
--- a/drivers/clk/at91/sama5d4.c
+++ b/drivers/clk/at91/sama5d4.c
@@ -181,7 +181,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack");
+ hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack", NULL);
if (IS_ERR(hw))
goto err_free;
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 17/31] clk: at91: clk-h32mx: add support for parent_hw
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (15 preceding siblings ...)
2025-09-18 21:15 ` [PATCH v4 16/31] clk: at91: clk-plldiv: " Ryan.Wanner
@ 2025-09-18 21:15 ` Ryan.Wanner
2025-10-20 19:12 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 18/31] clk: at91: clk-i2s-mux: " Ryan.Wanner
` (13 subsequent siblings)
30 siblings, 1 reply; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:15 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Add support for parent_hw in h32mx clock driver.
With this parent-child relation is described with pointers rather
than strings making registration a bit faster.
All the SoC based drivers that rely on clk-h32mx were adapted
to the new API change. The switch itself for SoCs will be done
in subsequent patches.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/clk-h32mx.c | 11 +++++++----
drivers/clk/at91/dt-compat.c | 2 +-
drivers/clk/at91/pmc.h | 2 +-
drivers/clk/at91/sama5d2.c | 2 +-
drivers/clk/at91/sama5d4.c | 2 +-
5 files changed, 11 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/at91/clk-h32mx.c b/drivers/clk/at91/clk-h32mx.c
index 1e6c12eeda10..4b709f9bd831 100644
--- a/drivers/clk/at91/clk-h32mx.c
+++ b/drivers/clk/at91/clk-h32mx.c
@@ -83,10 +83,10 @@ static const struct clk_ops h32mx_ops = {
struct clk_hw * __init
at91_clk_register_h32mx(struct regmap *regmap, const char *name,
- const char *parent_name)
+ const char *parent_name, struct clk_parent_data *parent_data)
{
struct clk_sama5d4_h32mx *h32mxclk;
- struct clk_init_data init;
+ struct clk_init_data init = {};
int ret;
h32mxclk = kzalloc(sizeof(*h32mxclk), GFP_KERNEL);
@@ -95,8 +95,11 @@ at91_clk_register_h32mx(struct regmap *regmap, const char *name,
init.name = name;
init.ops = &h32mx_ops;
- init.parent_names = parent_name ? &parent_name : NULL;
- init.num_parents = parent_name ? 1 : 0;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
+ else
+ init.parent_names = &parent_name;
+ init.num_parents = 1;
init.flags = CLK_SET_RATE_GATE;
h32mxclk->hw.init = &init;
diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c
index 3285e3110b58..ccdeba3a1130 100644
--- a/drivers/clk/at91/dt-compat.c
+++ b/drivers/clk/at91/dt-compat.c
@@ -201,7 +201,7 @@ static void __init of_sama5d4_clk_h32mx_setup(struct device_node *np)
parent_name = of_clk_get_parent_name(np, 0);
- hw = at91_clk_register_h32mx(regmap, name, parent_name);
+ hw = at91_clk_register_h32mx(regmap, name, parent_name, NULL);
if (IS_ERR(hw))
return;
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index db067177e6ef..64faaa8123c9 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -180,7 +180,7 @@ at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock,
struct clk_hw * __init
at91_clk_register_h32mx(struct regmap *regmap, const char *name,
- const char *parent_name);
+ const char *parent_name, struct clk_parent_data *parent_data);
struct clk_hw * __init
at91_clk_i2s_mux_register(struct regmap *regmap, const char *name,
diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c
index 7904f2122ed7..8c7ff0108b41 100644
--- a/drivers/clk/at91/sama5d2.c
+++ b/drivers/clk/at91/sama5d2.c
@@ -276,7 +276,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
sama5d2_pmc->chws[PMC_MCK] = hw;
- hw = at91_clk_register_h32mx(regmap, "h32mxck", "masterck_div");
+ hw = at91_clk_register_h32mx(regmap, "h32mxck", "masterck_div", NULL);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/sama5d4.c b/drivers/clk/at91/sama5d4.c
index 7cda8032653e..04c848cd7001 100644
--- a/drivers/clk/at91/sama5d4.c
+++ b/drivers/clk/at91/sama5d4.c
@@ -214,7 +214,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
sama5d4_pmc->chws[PMC_MCK] = hw;
- hw = at91_clk_register_h32mx(regmap, "h32mxck", "masterck_div");
+ hw = at91_clk_register_h32mx(regmap, "h32mxck", "masterck_div", NULL);
if (IS_ERR(hw))
goto err_free;
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 18/31] clk: at91: clk-i2s-mux: add support for parent_hw
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (16 preceding siblings ...)
2025-09-18 21:15 ` [PATCH v4 17/31] clk: at91: clk-h32mx: " Ryan.Wanner
@ 2025-09-18 21:16 ` Ryan.Wanner
2025-10-20 19:13 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 19/31] clk: at91: clk-smd: add support for clk_parent_data Ryan.Wanner
` (12 subsequent siblings)
30 siblings, 1 reply; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:16 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Add support for parent_hw in i2s mux clock driver.
With this parent-child relation is described with pointers rather
than strings making registration a bit faster.
All the SoC based drivers that rely on clk-i2s-mux were adapted
to the new API change. The switch itself for SoCs will be done
in subsequent patches.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/clk-i2s-mux.c | 6 +++++-
drivers/clk/at91/dt-compat.c | 2 +-
drivers/clk/at91/pmc.h | 1 +
drivers/clk/at91/sama5d2.c | 4 ++--
4 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/at91/clk-i2s-mux.c b/drivers/clk/at91/clk-i2s-mux.c
index fe6ce172b8b0..04d9fcf940fb 100644
--- a/drivers/clk/at91/clk-i2s-mux.c
+++ b/drivers/clk/at91/clk-i2s-mux.c
@@ -51,6 +51,7 @@ static const struct clk_ops clk_i2s_mux_ops = {
struct clk_hw * __init
at91_clk_i2s_mux_register(struct regmap *regmap, const char *name,
const char * const *parent_names,
+ struct clk_parent_data *parent_data,
unsigned int num_parents, u8 bus_id)
{
struct clk_init_data init = {};
@@ -63,7 +64,10 @@ at91_clk_i2s_mux_register(struct regmap *regmap, const char *name,
init.name = name;
init.ops = &clk_i2s_mux_ops;
- init.parent_names = parent_names;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
+ else
+ init.parent_names = parent_names;
init.num_parents = num_parents;
i2s_ck->hw.init = &init;
diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c
index ccdeba3a1130..2b1aa834f111 100644
--- a/drivers/clk/at91/dt-compat.c
+++ b/drivers/clk/at91/dt-compat.c
@@ -239,7 +239,7 @@ static void __init of_sama5d2_clk_i2s_mux_setup(struct device_node *np)
continue;
hw = at91_clk_i2s_mux_register(regmap_sfr, i2s_mux_np->name,
- parent_names, 2, bus_id);
+ parent_names, NULL, 2, bus_id);
if (IS_ERR(hw))
continue;
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index 64faaa8123c9..0a03e44237f1 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -185,6 +185,7 @@ at91_clk_register_h32mx(struct regmap *regmap, const char *name,
struct clk_hw * __init
at91_clk_i2s_mux_register(struct regmap *regmap, const char *name,
const char * const *parent_names,
+ struct clk_parent_data *parent_data,
unsigned int num_parents, u8 bus_id);
struct clk_hw * __init
diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c
index 8c7ff0108b41..f5d6c7a96cf2 100644
--- a/drivers/clk/at91/sama5d2.c
+++ b/drivers/clk/at91/sama5d2.c
@@ -372,7 +372,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
parent_names[0] = "i2s0_clk";
parent_names[1] = "i2s0_gclk";
hw = at91_clk_i2s_mux_register(regmap_sfr, "i2s0_muxclk",
- parent_names, 2, 0);
+ parent_names, NULL, 2, 0);
if (IS_ERR(hw))
goto err_free;
@@ -381,7 +381,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
parent_names[0] = "i2s1_clk";
parent_names[1] = "i2s1_gclk";
hw = at91_clk_i2s_mux_register(regmap_sfr, "i2s1_muxclk",
- parent_names, 2, 1);
+ parent_names, NULL, 2, 1);
if (IS_ERR(hw))
goto err_free;
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 19/31] clk: at91: clk-smd: add support for clk_parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (17 preceding siblings ...)
2025-09-18 21:16 ` [PATCH v4 18/31] clk: at91: clk-i2s-mux: " Ryan.Wanner
@ 2025-09-18 21:16 ` Ryan.Wanner
2025-10-20 19:14 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 20/31] clk: at91: clk-slow: add support for parent_hw Ryan.Wanner
` (11 subsequent siblings)
30 siblings, 1 reply; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:16 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Add support for parent_hw in smd clock drivers.
With this parent-child relation is described with pointers rather
than strings making registration a bit faster.
All the SoC based drivers that rely on clk-smd were adapted
to the new API change. The switch itself for SoCs will be done
in subsequent patches.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/at91sam9x5.c | 2 +-
drivers/clk/at91/clk-smd.c | 10 +++++++---
drivers/clk/at91/dt-compat.c | 2 +-
drivers/clk/at91/pmc.h | 3 ++-
drivers/clk/at91/sama5d3.c | 2 +-
drivers/clk/at91/sama5d4.c | 2 +-
6 files changed, 13 insertions(+), 8 deletions(-)
diff --git a/drivers/clk/at91/at91sam9x5.c b/drivers/clk/at91/at91sam9x5.c
index 37280852f086..13331e015dd7 100644
--- a/drivers/clk/at91/at91sam9x5.c
+++ b/drivers/clk/at91/at91sam9x5.c
@@ -226,7 +226,7 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
if (IS_ERR(hw))
goto err_free;
- hw = at91sam9x5_clk_register_smd(regmap, "smdclk", parent_names, 2);
+ hw = at91sam9x5_clk_register_smd(regmap, "smdclk", parent_names, NULL, 2);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/clk-smd.c b/drivers/clk/at91/clk-smd.c
index 09c649c8598e..d53dc32b36be 100644
--- a/drivers/clk/at91/clk-smd.c
+++ b/drivers/clk/at91/clk-smd.c
@@ -111,11 +111,12 @@ static const struct clk_ops at91sam9x5_smd_ops = {
struct clk_hw * __init
at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name,
- const char **parent_names, u8 num_parents)
+ const char **parent_names, struct clk_parent_data *parent_data,
+ u8 num_parents)
{
struct at91sam9x5_clk_smd *smd;
struct clk_hw *hw;
- struct clk_init_data init;
+ struct clk_init_data init = {};
int ret;
smd = kzalloc(sizeof(*smd), GFP_KERNEL);
@@ -124,7 +125,10 @@ at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name,
init.name = name;
init.ops = &at91sam9x5_smd_ops;
- init.parent_names = parent_names;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)parent_data;
+ else
+ init.parent_names = parent_names;
init.num_parents = num_parents;
init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c
index 2b1aa834f111..5afd7c9f53fd 100644
--- a/drivers/clk/at91/dt-compat.c
+++ b/drivers/clk/at91/dt-compat.c
@@ -859,7 +859,7 @@ static void __init of_at91sam9x5_clk_smd_setup(struct device_node *np)
if (IS_ERR(regmap))
return;
- hw = at91sam9x5_clk_register_smd(regmap, name, parent_names,
+ hw = at91sam9x5_clk_register_smd(regmap, name, parent_names, NULL,
num_parents);
if (IS_ERR(hw))
return;
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index 0a03e44237f1..e16621e01678 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -280,7 +280,8 @@ at91_clk_register_sam9260_slow(struct regmap *regmap,
struct clk_hw * __init
at91sam9x5_clk_register_smd(struct regmap *regmap, const char *name,
- const char **parent_names, u8 num_parents);
+ const char **parent_names, struct clk_parent_data *parent_data,
+ u8 num_parents);
struct clk_hw * __init
at91_clk_register_system(struct regmap *regmap, const char *name,
diff --git a/drivers/clk/at91/sama5d3.c b/drivers/clk/at91/sama5d3.c
index 7f2ac8f648dd..8326bb6a291c 100644
--- a/drivers/clk/at91/sama5d3.c
+++ b/drivers/clk/at91/sama5d3.c
@@ -205,7 +205,7 @@ static void __init sama5d3_pmc_setup(struct device_node *np)
if (IS_ERR(hw))
goto err_free;
- hw = at91sam9x5_clk_register_smd(regmap, "smdclk", parent_names, 2);
+ hw = at91sam9x5_clk_register_smd(regmap, "smdclk", parent_names, NULL, 2);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/sama5d4.c b/drivers/clk/at91/sama5d4.c
index 04c848cd7001..1ff9286148da 100644
--- a/drivers/clk/at91/sama5d4.c
+++ b/drivers/clk/at91/sama5d4.c
@@ -228,7 +228,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
parent_names[0] = "plladivck";
parent_names[1] = "utmick";
- hw = at91sam9x5_clk_register_smd(regmap, "smdclk", parent_names, 2);
+ hw = at91sam9x5_clk_register_smd(regmap, "smdclk", parent_names, NULL, 2);
if (IS_ERR(hw))
goto err_free;
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 20/31] clk: at91: clk-slow: add support for parent_hw
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (18 preceding siblings ...)
2025-09-18 21:16 ` [PATCH v4 19/31] clk: at91: clk-smd: add support for clk_parent_data Ryan.Wanner
@ 2025-09-18 21:16 ` Ryan.Wanner
2025-10-20 19:17 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 21/31] clk: at91: dt-compat: switch to parent_hw and parent_data Ryan.Wanner
` (10 subsequent siblings)
30 siblings, 1 reply; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:16 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Add support for parent_hw in slow clock drivers. With this parent-child
relation is described with pointers rather than strings making
registration a bit faster.
All the SoC based drivers that rely on clk-slow were adapted
to the new API change. The switch itself for SoCs will be done
in subsequent patches.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/at91sam9260.c | 2 +-
drivers/clk/at91/clk-slow.c | 8 ++++++--
drivers/clk/at91/dt-compat.c | 2 +-
drivers/clk/at91/pmc.h | 1 +
4 files changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/clk/at91/at91sam9260.c b/drivers/clk/at91/at91sam9260.c
index f39deb3ec00a..55350331b07e 100644
--- a/drivers/clk/at91/at91sam9260.c
+++ b/drivers/clk/at91/at91sam9260.c
@@ -385,7 +385,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
parent_names[0] = "slow_rc_osc";
parent_names[1] = "slow_xtal";
hw = at91_clk_register_sam9260_slow(regmap, "slck",
- parent_names, 2);
+ parent_names, NULL, 2);
if (IS_ERR(hw))
goto err_free;
diff --git a/drivers/clk/at91/clk-slow.c b/drivers/clk/at91/clk-slow.c
index ac9f7a48b76e..5b7fc6210e09 100644
--- a/drivers/clk/at91/clk-slow.c
+++ b/drivers/clk/at91/clk-slow.c
@@ -39,11 +39,12 @@ struct clk_hw * __init
at91_clk_register_sam9260_slow(struct regmap *regmap,
const char *name,
const char **parent_names,
+ struct clk_parent_data *parent_data,
int num_parents)
{
struct clk_sam9260_slow *slowck;
struct clk_hw *hw;
- struct clk_init_data init;
+ struct clk_init_data init = {};
int ret;
if (!name)
@@ -58,7 +59,10 @@ at91_clk_register_sam9260_slow(struct regmap *regmap,
init.name = name;
init.ops = &sam9260_slow_ops;
- init.parent_names = parent_names;
+ if (parent_data)
+ init.parent_data = (const struct clk_parent_data *)&parent_data;
+ else
+ init.parent_names = parent_names;
init.num_parents = num_parents;
init.flags = 0;
diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c
index 5afd7c9f53fd..fa8658d3be7b 100644
--- a/drivers/clk/at91/dt-compat.c
+++ b/drivers/clk/at91/dt-compat.c
@@ -823,7 +823,7 @@ static void __init of_at91sam9260_clk_slow_setup(struct device_node *np)
of_property_read_string(np, "clock-output-names", &name);
- hw = at91_clk_register_sam9260_slow(regmap, name, parent_names,
+ hw = at91_clk_register_sam9260_slow(regmap, name, parent_names, NULL,
num_parents);
if (IS_ERR(hw))
return;
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index e16621e01678..1af0d5bd2e08 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -276,6 +276,7 @@ struct clk_hw * __init
at91_clk_register_sam9260_slow(struct regmap *regmap,
const char *name,
const char **parent_names,
+ struct clk_parent_data *parent_data,
int num_parents);
struct clk_hw * __init
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 21/31] clk: at91: dt-compat: switch to parent_hw and parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (19 preceding siblings ...)
2025-09-18 21:16 ` [PATCH v4 20/31] clk: at91: clk-slow: add support for parent_hw Ryan.Wanner
@ 2025-09-18 21:16 ` Ryan.Wanner
2025-10-20 19:15 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 22/31] clk: at91: sam9x60: " Ryan.Wanner
` (9 subsequent siblings)
30 siblings, 1 reply; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:16 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Switch old dt-compat clocks to use parent_hw and parent_data. Having
parent_hw instead of parent names improves to clock registration
speed and re-parenting.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/dt-compat.c | 80 +++++++++++++++++++++++++-----------
1 file changed, 56 insertions(+), 24 deletions(-)
diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c
index fa8658d3be7b..9ca871b817e0 100644
--- a/drivers/clk/at91/dt-compat.c
+++ b/drivers/clk/at91/dt-compat.c
@@ -43,7 +43,8 @@ static void __init of_sama5d2_clk_audio_pll_frac_setup(struct device_node *np)
parent_name = of_clk_get_parent_name(np, 0);
- hw = at91_clk_register_audio_pll_frac(regmap, name, parent_name, NULL);
+ hw = at91_clk_register_audio_pll_frac(regmap, name, NULL,
+ &AT91_CLK_PD_NAME(parent_name));
if (IS_ERR(hw))
return;
@@ -69,7 +70,8 @@ static void __init of_sama5d2_clk_audio_pll_pad_setup(struct device_node *np)
parent_name = of_clk_get_parent_name(np, 0);
- hw = at91_clk_register_audio_pll_pad(regmap, name, parent_name, NULL);
+ hw = at91_clk_register_audio_pll_pad(regmap, name, NULL,
+ &AT91_CLK_PD_NAME(parent_name));
if (IS_ERR(hw))
return;
@@ -95,7 +97,7 @@ static void __init of_sama5d2_clk_audio_pll_pmc_setup(struct device_node *np)
parent_name = of_clk_get_parent_name(np, 0);
- hw = at91_clk_register_audio_pll_pmc(regmap, name, parent_name, NULL);
+ hw = at91_clk_register_audio_pll_pmc(regmap, name, NULL, &AT91_CLK_PD_NAME(parent_name));
if (IS_ERR(hw))
return;
@@ -129,6 +131,7 @@ static void __init of_sama5d2_clk_generated_setup(struct device_node *np)
struct clk_hw *hw;
unsigned int num_parents;
const char *parent_names[GENERATED_SOURCE_MAX];
+ struct clk_parent_data parent_data[GENERATED_SOURCE_MAX];
struct device_node *gcknp, *parent_np;
struct clk_range range = CLK_RANGE(0, 0);
struct regmap *regmap;
@@ -149,6 +152,8 @@ static void __init of_sama5d2_clk_generated_setup(struct device_node *np)
if (IS_ERR(regmap))
return;
+ for (unsigned int i = 0; i < num_parents; i++)
+ parent_data[i] = AT91_CLK_PD_NAME(parent_names[i]);
for_each_child_of_node(np, gcknp) {
int chg_pid = INT_MIN;
@@ -171,7 +176,7 @@ static void __init of_sama5d2_clk_generated_setup(struct device_node *np)
hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,
&dt_pcr_layout, name,
- parent_names, NULL, NULL,
+ NULL, parent_data, NULL,
num_parents, id, &range,
chg_pid);
if (IS_ERR(hw))
@@ -201,7 +206,7 @@ static void __init of_sama5d4_clk_h32mx_setup(struct device_node *np)
parent_name = of_clk_get_parent_name(np, 0);
- hw = at91_clk_register_h32mx(regmap, name, parent_name, NULL);
+ hw = at91_clk_register_h32mx(regmap, name, NULL, &AT91_CLK_PD_NAME(parent_name));
if (IS_ERR(hw))
return;
@@ -228,6 +233,8 @@ static void __init of_sama5d2_clk_i2s_mux_setup(struct device_node *np)
return;
for_each_child_of_node(np, i2s_mux_np) {
+ struct clk_parent_data parent_data[2];
+
if (of_property_read_u8(i2s_mux_np, "reg", &bus_id))
continue;
@@ -238,8 +245,10 @@ static void __init of_sama5d2_clk_i2s_mux_setup(struct device_node *np)
if (ret != 2)
continue;
+ parent_data[0] = AT91_CLK_PD_NAME(parent_names[0]);
+ parent_data[1] = AT91_CLK_PD_NAME(parent_names[1]);
hw = at91_clk_i2s_mux_register(regmap_sfr, i2s_mux_np->name,
- parent_names, NULL, 2, bus_id);
+ NULL, parent_data, 2, bus_id);
if (IS_ERR(hw))
continue;
@@ -269,7 +278,8 @@ static void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np)
if (IS_ERR(regmap))
return;
- hw = at91_clk_register_main_osc(regmap, name, parent_name, NULL, bypass);
+ hw = at91_clk_register_main_osc(regmap, name, NULL,
+ &AT91_CLK_PD_NAME(parent_name), bypass);
if (IS_ERR(hw))
return;
@@ -323,7 +333,7 @@ static void __init of_at91rm9200_clk_main_setup(struct device_node *np)
if (IS_ERR(regmap))
return;
- hw = at91_clk_register_rm9200_main(regmap, name, parent_name, NULL);
+ hw = at91_clk_register_rm9200_main(regmap, name, NULL, &AT91_CLK_PD_NAME(parent_name));
if (IS_ERR(hw))
return;
@@ -336,6 +346,7 @@ static void __init of_at91sam9x5_clk_main_setup(struct device_node *np)
{
struct clk_hw *hw;
const char *parent_names[2];
+ struct clk_parent_data parent_data[2];
unsigned int num_parents;
const char *name = np->name;
struct regmap *regmap;
@@ -354,7 +365,9 @@ static void __init of_at91sam9x5_clk_main_setup(struct device_node *np)
of_property_read_string(np, "clock-output-names", &name);
- hw = at91_clk_register_sam9x5_main(regmap, name, parent_names, NULL,
+ parent_data[0] = AT91_CLK_PD_NAME(parent_names[0]);
+ parent_data[1] = AT91_CLK_PD_NAME(parent_names[1]);
+ hw = at91_clk_register_sam9x5_main(regmap, name, NULL, parent_data,
num_parents);
if (IS_ERR(hw))
return;
@@ -396,6 +409,7 @@ of_at91_clk_master_setup(struct device_node *np,
struct clk_hw *hw;
unsigned int num_parents;
const char *parent_names[MASTER_SOURCE_MAX];
+ struct clk_parent_data parent_data[MASTER_SOURCE_MAX];
const char *name = np->name;
struct clk_master_characteristics *characteristics;
struct regmap *regmap;
@@ -419,13 +433,15 @@ of_at91_clk_master_setup(struct device_node *np,
if (IS_ERR(regmap))
return;
+ for (unsigned int i = 0; i < MASTER_SOURCE_MAX; i++)
+ parent_data[i] = AT91_CLK_PD_NAME(parent_names[i]);
hw = at91_clk_register_master_pres(regmap, "masterck_pres", num_parents,
- parent_names, NULL, layout,
+ NULL, parent_data, layout,
characteristics, &mck_lock);
if (IS_ERR(hw))
goto out_free_characteristics;
- hw = at91_clk_register_master_div(regmap, name, "masterck_pres", NULL,
+ hw = at91_clk_register_master_div(regmap, name, NULL, &AT91_CLK_PD_HW(hw),
layout, characteristics,
&mck_lock, CLK_SET_RATE_GATE, 0);
if (IS_ERR(hw))
@@ -489,8 +505,8 @@ of_at91_clk_periph_setup(struct device_node *np, u8 type)
name = periphclknp->name;
if (type == PERIPHERAL_AT91RM9200) {
- hw = at91_clk_register_peripheral(regmap, name,
- parent_name, NULL, id);
+ hw = at91_clk_register_peripheral(regmap, name, NULL,
+ &AT91_CLK_PD_NAME(parent_name), id);
} else {
struct clk_range range = CLK_RANGE(0, 0);
unsigned long flags = 0;
@@ -511,8 +527,8 @@ of_at91_clk_periph_setup(struct device_node *np, u8 type)
&pmc_pcr_lock,
&dt_pcr_layout,
name,
- parent_name,
NULL,
+ &AT91_CLK_PD_NAME(parent_name),
id, &range,
INT_MIN,
flags);
@@ -665,7 +681,8 @@ of_at91_clk_pll_setup(struct device_node *np,
if (!characteristics)
return;
- hw = at91_clk_register_pll(regmap, name, parent_name, NULL, id, layout,
+ hw = at91_clk_register_pll(regmap, name, NULL, &AT91_CLK_PD_NAME(parent_name),
+ id, layout,
characteristics);
if (IS_ERR(hw))
goto out_free_characteristics;
@@ -724,7 +741,7 @@ of_at91sam9x5_clk_plldiv_setup(struct device_node *np)
if (IS_ERR(regmap))
return;
- hw = at91_clk_register_plldiv(regmap, name, parent_name, NULL);
+ hw = at91_clk_register_plldiv(regmap, name, NULL, &AT91_CLK_PD_NAME(parent_name));
if (IS_ERR(hw))
return;
@@ -743,6 +760,7 @@ of_at91_clk_prog_setup(struct device_node *np,
struct clk_hw *hw;
unsigned int num_parents;
const char *parent_names[PROG_SOURCE_MAX];
+ struct clk_parent_data parent_data[PROG_SOURCE_MAX];
const char *name;
struct device_node *progclknp, *parent_np;
struct regmap *regmap;
@@ -763,6 +781,8 @@ of_at91_clk_prog_setup(struct device_node *np,
if (IS_ERR(regmap))
return;
+ for (unsigned int i = 0; i < PROG_SOURCE_MAX; i++)
+ parent_data[i] = AT91_CLK_PD_NAME(parent_names[i]);
for_each_child_of_node(np, progclknp) {
if (of_property_read_u32(progclknp, "reg", &id))
continue;
@@ -771,7 +791,7 @@ of_at91_clk_prog_setup(struct device_node *np,
name = progclknp->name;
hw = at91_clk_register_programmable(regmap, name,
- parent_names, NULL, num_parents,
+ NULL, parent_data, num_parents,
id, layout, mux_table);
if (IS_ERR(hw))
continue;
@@ -805,6 +825,7 @@ static void __init of_at91sam9260_clk_slow_setup(struct device_node *np)
{
struct clk_hw *hw;
const char *parent_names[2];
+ struct clk_parent_data parent_data[2];
unsigned int num_parents;
const char *name = np->name;
struct regmap *regmap;
@@ -823,7 +844,9 @@ static void __init of_at91sam9260_clk_slow_setup(struct device_node *np)
of_property_read_string(np, "clock-output-names", &name);
- hw = at91_clk_register_sam9260_slow(regmap, name, parent_names, NULL,
+ parent_data[0] = AT91_CLK_PD_NAME(parent_names[0]);
+ parent_data[1] = AT91_CLK_PD_NAME(parent_names[1]);
+ hw = at91_clk_register_sam9260_slow(regmap, name, NULL, parent_data,
num_parents);
if (IS_ERR(hw))
return;
@@ -841,6 +864,7 @@ static void __init of_at91sam9x5_clk_smd_setup(struct device_node *np)
struct clk_hw *hw;
unsigned int num_parents;
const char *parent_names[SMD_SOURCE_MAX];
+ struct clk_parent_data parent_data[SMD_SOURCE_MAX];
const char *name = np->name;
struct regmap *regmap;
struct device_node *parent_np;
@@ -859,7 +883,9 @@ static void __init of_at91sam9x5_clk_smd_setup(struct device_node *np)
if (IS_ERR(regmap))
return;
- hw = at91sam9x5_clk_register_smd(regmap, name, parent_names, NULL,
+ for (unsigned int i = 0; i < SMD_SOURCE_MAX; i++)
+ parent_data[i] = AT91_CLK_PD_NAME(parent_names[i]);
+ hw = at91sam9x5_clk_register_smd(regmap, name, NULL, parent_data,
num_parents);
if (IS_ERR(hw))
return;
@@ -909,7 +935,8 @@ static void __init of_at91rm9200_clk_sys_setup(struct device_node *np)
if (!strcmp(sysclknp->name, "ddrck"))
flags = CLK_IS_CRITICAL;
- hw = at91_clk_register_system(regmap, name, parent_name, NULL,
+ hw = at91_clk_register_system(regmap, name, NULL,
+ &AT91_CLK_PD_NAME(parent_name),
id, flags);
if (IS_ERR(hw))
continue;
@@ -928,6 +955,7 @@ static void __init of_at91sam9x5_clk_usb_setup(struct device_node *np)
struct clk_hw *hw;
unsigned int num_parents;
const char *parent_names[USB_SOURCE_MAX];
+ struct clk_parent_data parent_data[USB_SOURCE_MAX];
const char *name = np->name;
struct regmap *regmap;
struct device_node *parent_np;
@@ -946,7 +974,9 @@ static void __init of_at91sam9x5_clk_usb_setup(struct device_node *np)
if (IS_ERR(regmap))
return;
- hw = at91sam9x5_clk_register_usb(regmap, name, parent_names, NULL,
+ for (unsigned int i = 0; i < USB_SOURCE_MAX; i++)
+ parent_data[i] = AT91_CLK_PD_NAME(parent_names[i]);
+ hw = at91sam9x5_clk_register_usb(regmap, name, NULL, parent_data,
num_parents);
if (IS_ERR(hw))
return;
@@ -976,7 +1006,7 @@ static void __init of_at91sam9n12_clk_usb_setup(struct device_node *np)
if (IS_ERR(regmap))
return;
- hw = at91sam9n12_clk_register_usb(regmap, name, parent_name, NULL);
+ hw = at91sam9n12_clk_register_usb(regmap, name, NULL, &AT91_CLK_PD_NAME(parent_name));
if (IS_ERR(hw))
return;
@@ -1009,7 +1039,8 @@ static void __init of_at91rm9200_clk_usb_setup(struct device_node *np)
of_node_put(parent_np);
if (IS_ERR(regmap))
return;
- hw = at91rm9200_clk_register_usb(regmap, name, parent_name, NULL, divisors);
+ hw = at91rm9200_clk_register_usb(regmap, name, NULL, &AT91_CLK_PD_NAME(parent_name),
+ divisors);
if (IS_ERR(hw))
return;
@@ -1056,7 +1087,8 @@ static void __init of_at91sam9x5_clk_utmi_setup(struct device_node *np)
regmap_sfr = NULL;
}
- hw = at91_clk_register_utmi(regmap_pmc, regmap_sfr, name, parent_name, NULL);
+ hw = at91_clk_register_utmi(regmap_pmc, regmap_sfr, name, NULL,
+ &AT91_CLK_PD_NAME(parent_name));
if (IS_ERR(hw))
return;
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 22/31] clk: at91: sam9x60: switch to parent_hw and parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (20 preceding siblings ...)
2025-09-18 21:16 ` [PATCH v4 21/31] clk: at91: dt-compat: switch to parent_hw and parent_data Ryan.Wanner
@ 2025-09-18 21:16 ` Ryan.Wanner
2025-09-18 21:16 ` [PATCH v4 23/31] clk: at91: sama5d2: " Ryan.Wanner
` (8 subsequent siblings)
30 siblings, 0 replies; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:16 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Switch SAM9X60 clocks to use modern parent_hw and parent_data.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/sam9x60.c | 93 +++++++++++++++++++++-----------------
1 file changed, 51 insertions(+), 42 deletions(-)
diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
index 2ab7deab95f3..97131de5ba20 100644
--- a/drivers/clk/at91/sam9x60.c
+++ b/drivers/clk/at91/sam9x60.c
@@ -81,9 +81,9 @@ static const struct clk_pcr_layout sam9x60_pcr_layout = {
.pid_mask = GENMASK(6, 0),
};
-static const struct {
+static struct {
char *n;
- char *p;
+ struct clk_hw *parent_hw;
unsigned long flags;
u8 id;
} sam9x60_systemck[] = {
@@ -91,11 +91,11 @@ static const struct {
* ddrck feeds DDR controller and is enabled by bootloader thus we need
* to keep it enabled in case there is no Linux consumer for it.
*/
- { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL },
- { .n = "uhpck", .p = "usbck", .id = 6 },
- { .n = "pck0", .p = "prog0", .id = 8 },
- { .n = "pck1", .p = "prog1", .id = 9 },
- { .n = "qspick", .p = "masterck_div", .id = 19 },
+ { .n = "ddrck", .id = 2, .flags = CLK_IS_CRITICAL },
+ { .n = "uhpck", .id = 6 },
+ { .n = "pck0", .id = 8 },
+ { .n = "pck1", .id = 9 },
+ { .n = "qspick", .id = 19 },
};
static const struct {
@@ -186,13 +186,13 @@ static const struct {
static void __init sam9x60_pmc_setup(struct device_node *np)
{
+ const char *main_xtal_name, *td_slck_name, *md_slck_name;
+ struct clk_hw *hw, *main_rc_hw, *main_osc_hw;
struct clk_range range = CLK_RANGE(0, 0);
- const char *td_slck_name, *md_slck_name, *mainxtal_name;
+ struct clk_parent_data parent_data[6];
struct pmc_data *sam9x60_pmc;
- const char *parent_names[6];
- struct clk_hw *main_osc_hw;
+ struct clk_hw *usbck_hw;
struct regmap *regmap;
- struct clk_hw *hw;
int i;
i = of_property_match_string(np, "clock-names", "td_slck");
@@ -210,7 +210,8 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
i = of_property_match_string(np, "clock-names", "main_xtal");
if (i < 0)
return;
- mainxtal_name = of_clk_get_parent_name(np, i);
+
+ main_xtal_name = of_clk_get_parent_name(np, i);
regmap = device_node_to_regmap(np);
if (IS_ERR(regmap))
@@ -223,19 +224,20 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
if (!sam9x60_pmc)
return;
- hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
- 50000000);
- if (IS_ERR(hw))
+ main_rc_hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
+ 50000000);
+ if (IS_ERR(main_rc_hw))
goto err_free;
- hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, 0);
+ main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL,
+ &AT91_CLK_PD_NAME(main_xtal_name),
+ 0);
if (IS_ERR(hw))
goto err_free;
- main_osc_hw = hw;
- parent_names[0] = "main_rc_osc";
- parent_names[1] = "main_osc";
- hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2);
+ parent_data[0] = AT91_CLK_PD_HW(main_rc_hw);
+ parent_data[1] = AT91_CLK_PD_HW(main_osc_hw);
+ hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_data, 2);
if (IS_ERR(hw))
goto err_free;
@@ -256,7 +258,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
goto err_free;
hw = sam9x60_clk_register_div_pll(regmap, &pmc_pll_lock, "pllack_divck",
- "pllack_fracck", NULL, 0, &plla_characteristics,
+ NULL, hw, 0, &plla_characteristics,
&pll_div_layout,
/*
* This feeds CPU. It should not
@@ -277,7 +279,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
goto err_free;
hw = sam9x60_clk_register_div_pll(regmap, &pmc_pll_lock, "upllck_divck",
- "upllck_fracck", NULL, 1, &upll_characteristics,
+ NULL, hw, 1, &upll_characteristics,
&pll_div_layout,
CLK_SET_RATE_GATE |
CLK_SET_PARENT_GATE |
@@ -287,17 +289,17 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
sam9x60_pmc->chws[PMC_UTMI] = hw;
- parent_names[0] = md_slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "pllack_divck";
+ parent_data[0] = AT91_CLK_PD_NAME(md_slck_name);
+ parent_data[1] = AT91_CLK_PD_HW(sam9x60_pmc->chws[PMC_MAIN]);
+ parent_data[2] = AT91_CLK_PD_HW(sam9x60_pmc->chws[PMC_PLLACK]);
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 3,
- parent_names, NULL, &sam9x60_master_layout,
+ NULL, parent_data, &sam9x60_master_layout,
&mck_characteristics, &mck_lock);
if (IS_ERR(hw))
goto err_free;
hw = at91_clk_register_master_div(regmap, "masterck_div",
- "masterck_pres", NULL, &sam9x60_master_layout,
+ NULL, &AT91_CLK_PD_HW(hw), &sam9x60_master_layout,
&mck_characteristics, &mck_lock,
CLK_SET_RATE_GATE, 0);
if (IS_ERR(hw))
@@ -305,26 +307,26 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
sam9x60_pmc->chws[PMC_MCK] = hw;
- parent_names[0] = "pllack_divck";
- parent_names[1] = "upllck_divck";
- parent_names[2] = "main_osc";
- hw = sam9x60_clk_register_usb(regmap, "usbck", parent_names, NULL, 3);
- if (IS_ERR(hw))
+ parent_data[0] = AT91_CLK_PD_HW(sam9x60_pmc->chws[PMC_PLLACK]);
+ parent_data[1] = AT91_CLK_PD_HW(sam9x60_pmc->chws[PMC_UTMI]);
+ parent_data[2] = AT91_CLK_PD_HW(main_osc_hw);
+ usbck_hw = sam9x60_clk_register_usb(regmap, "usbck", NULL, parent_data, 3);
+ if (IS_ERR(usbck_hw))
goto err_free;
- parent_names[0] = md_slck_name;
- parent_names[1] = td_slck_name;
- parent_names[2] = "mainck";
- parent_names[3] = "masterck_div";
- parent_names[4] = "pllack_divck";
- parent_names[5] = "upllck_divck";
+ parent_data[0] = AT91_CLK_PD_NAME(md_slck_name);
+ parent_data[1] = AT91_CLK_PD_NAME(td_slck_name);
+ parent_data[2] = AT91_CLK_PD_HW(sam9x60_pmc->chws[PMC_MAIN]);
+ parent_data[3] = AT91_CLK_PD_HW(sam9x60_pmc->chws[PMC_MCK]);
+ parent_data[4] = AT91_CLK_PD_HW(sam9x60_pmc->chws[PMC_PLLACK]);
+ parent_data[5] = AT91_CLK_PD_HW(sam9x60_pmc->chws[PMC_UTMI]);
for (i = 0; i < 2; i++) {
char name[6];
snprintf(name, sizeof(name), "prog%d", i);
hw = at91_clk_register_programmable(regmap, name,
- parent_names, NULL, 6, i,
+ NULL, parent_data, 6, i,
&sam9x60_programmable_layout,
NULL);
if (IS_ERR(hw))
@@ -333,9 +335,15 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
sam9x60_pmc->pchws[i] = hw;
}
+ /* Set systemck parent hws. */
+ sam9x60_systemck[0].parent_hw = sam9x60_pmc->chws[PMC_MCK];
+ sam9x60_systemck[1].parent_hw = usbck_hw;
+ sam9x60_systemck[2].parent_hw = sam9x60_pmc->pchws[0];
+ sam9x60_systemck[3].parent_hw = sam9x60_pmc->pchws[1];
+ sam9x60_systemck[4].parent_hw = sam9x60_pmc->chws[PMC_MCK];
for (i = 0; i < ARRAY_SIZE(sam9x60_systemck); i++) {
hw = at91_clk_register_system(regmap, sam9x60_systemck[i].n,
- sam9x60_systemck[i].p, NULL,
+ NULL, &AT91_CLK_PD_HW(sam9x60_systemck[i].parent_hw),
sam9x60_systemck[i].id,
sam9x60_systemck[i].flags);
if (IS_ERR(hw))
@@ -348,7 +356,8 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
&sam9x60_pcr_layout,
sam9x60_periphck[i].n,
- "masterck_div", NULL,
+ NULL,
+ &AT91_CLK_PD_HW(sam9x60_pmc->chws[PMC_MCK]),
sam9x60_periphck[i].id,
&range, INT_MIN,
sam9x60_periphck[i].flags);
@@ -362,7 +371,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,
&sam9x60_pcr_layout,
sam9x60_gck[i].n,
- parent_names, NULL, NULL, 6,
+ NULL, parent_data, NULL, 6,
sam9x60_gck[i].id,
&sam9x60_gck[i].r, INT_MIN);
if (IS_ERR(hw))
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 23/31] clk: at91: sama5d2: switch to parent_hw and parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (21 preceding siblings ...)
2025-09-18 21:16 ` [PATCH v4 22/31] clk: at91: sam9x60: " Ryan.Wanner
@ 2025-09-18 21:16 ` Ryan.Wanner
2025-10-20 19:19 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 24/31] clk: at91: sama5d3: " Ryan.Wanner
` (7 subsequent siblings)
30 siblings, 1 reply; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:16 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Switch SAMA5D2 clocks to use parent_hw and parent_data. Having
parent_hw instead of parent names improves to clock registration
speed and re-parenting.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
[ryan.wanner@microchip.com: Adjust commit message.]
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/sama5d2.c | 157 ++++++++++++++++++++-----------------
1 file changed, 85 insertions(+), 72 deletions(-)
diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c
index f5d6c7a96cf2..231cec1f80e1 100644
--- a/drivers/clk/at91/sama5d2.c
+++ b/drivers/clk/at91/sama5d2.c
@@ -37,9 +37,9 @@ static const struct clk_pcr_layout sama5d2_pcr_layout = {
.pid_mask = GENMASK(6, 0),
};
-static const struct {
+static struct {
char *n;
- char *p;
+ struct clk_hw *parent_hw;
unsigned long flags;
u8 id;
} sama5d2_systemck[] = {
@@ -47,14 +47,14 @@ static const struct {
* ddrck feeds DDR controller and is enabled by bootloader thus we need
* to keep it enabled in case there is no Linux consumer for it.
*/
- { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL },
- { .n = "lcdck", .p = "masterck_div", .id = 3 },
- { .n = "uhpck", .p = "usbck", .id = 6 },
- { .n = "udpck", .p = "usbck", .id = 7 },
- { .n = "pck0", .p = "prog0", .id = 8 },
- { .n = "pck1", .p = "prog1", .id = 9 },
- { .n = "pck2", .p = "prog2", .id = 10 },
- { .n = "iscck", .p = "masterck_div", .id = 18 },
+ { .n = "ddrck", .id = 2, .flags = CLK_IS_CRITICAL },
+ { .n = "lcdck", .id = 3 },
+ { .n = "uhpck", .id = 6 },
+ { .n = "udpck", .id = 7 },
+ { .n = "pck0", .id = 8 },
+ { .n = "pck1", .id = 9 },
+ { .n = "pck2", .id = 10 },
+ { .n = "iscck", .id = 18 },
};
static const struct {
@@ -164,12 +164,12 @@ static const struct clk_programmable_layout sama5d2_programmable_layout = {
static void __init sama5d2_pmc_setup(struct device_node *np)
{
+ struct clk_hw *hw, *audio_fracck_hw, *usbck_hw, *main_rc_hw, *main_osc_hw;
+ const char *slow_clk_name, *main_xtal_name;
struct clk_range range = CLK_RANGE(0, 0);
- const char *slck_name, *mainxtal_name;
- struct pmc_data *sama5d2_pmc;
- const char *parent_names[6];
+ struct clk_parent_data parent_data[6];
struct regmap *regmap, *regmap_sfr;
- struct clk_hw *hw;
+ struct pmc_data *sama5d2_pmc;
int i;
bool bypass;
@@ -177,12 +177,12 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
if (i < 0)
return;
- slck_name = of_clk_get_parent_name(np, i);
+ slow_clk_name = of_clk_get_parent_name(np, i);
i = of_property_match_string(np, "clock-names", "main_xtal");
if (i < 0)
return;
- mainxtal_name = of_clk_get_parent_name(np, i);
+ main_xtal_name = of_clk_get_parent_name(np, i);
regmap = device_node_to_regmap(np);
if (IS_ERR(regmap))
@@ -195,51 +195,51 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
if (!sama5d2_pmc)
return;
- hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
- 100000000);
- if (IS_ERR(hw))
+ main_rc_hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
+ 100000000);
+ if (IS_ERR(main_rc_hw))
goto err_free;
bypass = of_property_read_bool(np, "atmel,osc-bypass");
- hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
- bypass);
- if (IS_ERR(hw))
+ main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL,
+ &AT91_CLK_PD_NAME(main_xtal_name), bypass);
+ if (IS_ERR(main_osc_hw))
goto err_free;
- parent_names[0] = "main_rc_osc";
- parent_names[1] = "main_osc";
- hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2);
+ parent_data[0] = AT91_CLK_PD_HW(main_rc_hw);
+ parent_data[1] = AT91_CLK_PD_HW(main_osc_hw);
+ hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_data, 2);
if (IS_ERR(hw))
goto err_free;
sama5d2_pmc->chws[PMC_MAIN] = hw;
-
- hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
+ hw = at91_clk_register_pll(regmap, "pllack", NULL,
+ &AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MAIN]), 0,
&sama5d3_pll_layout, &plla_characteristics);
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack", NULL);
+ hw = at91_clk_register_plldiv(regmap, "plladivck", NULL, &AT91_CLK_PD_HW(hw));
if (IS_ERR(hw))
goto err_free;
sama5d2_pmc->chws[PMC_PLLACK] = hw;
- hw = at91_clk_register_audio_pll_frac(regmap, "audiopll_fracck",
- "mainck", NULL);
- if (IS_ERR(hw))
+ audio_fracck_hw = at91_clk_register_audio_pll_frac(regmap, "audiopll_fracck", NULL,
+ &AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MAIN]));
+ if (IS_ERR(audio_fracck_hw))
goto err_free;
- hw = at91_clk_register_audio_pll_pad(regmap, "audiopll_padck",
- "audiopll_fracck", NULL);
+ hw = at91_clk_register_audio_pll_pad(regmap, "audiopll_padck", NULL,
+ &AT91_CLK_PD_HW(audio_fracck_hw));
if (IS_ERR(hw))
goto err_free;
sama5d2_pmc->chws[PMC_AUDIOPINCK] = hw;
- hw = at91_clk_register_audio_pll_pmc(regmap, "audiopll_pmcck",
- "audiopll_fracck", NULL);
+ hw = at91_clk_register_audio_pll_pmc(regmap, "audiopll_pmcck", NULL,
+ &AT91_CLK_PD_HW(audio_fracck_hw));
if (IS_ERR(hw))
goto err_free;
@@ -249,25 +249,26 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
if (IS_ERR(regmap_sfr))
regmap_sfr = NULL;
- hw = at91_clk_register_utmi(regmap, regmap_sfr, "utmick", "mainck", NULL);
+ hw = at91_clk_register_utmi(regmap, regmap_sfr, "utmick", NULL,
+ &AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MAIN]));
if (IS_ERR(hw))
goto err_free;
sama5d2_pmc->chws[PMC_UTMI] = hw;
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "plladivck";
- parent_names[3] = "utmick";
+ parent_data[0] = AT91_CLK_PD_NAME(slow_clk_name);
+ parent_data[1] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MAIN]);
+ parent_data[2] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_UTMI]);
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
- parent_names, NULL,
+ NULL, parent_data,
&at91sam9x5_master_layout,
&mck_characteristics, &mck_lock);
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_master_div(regmap, "masterck_div",
- "masterck_pres", NULL,
+ hw = at91_clk_register_master_div(regmap, "masterck_div", NULL,
+ &AT91_CLK_PD_HW(hw),
&at91sam9x5_master_layout,
&mck_characteristics, &mck_lock,
CLK_SET_RATE_GATE, 0);
@@ -276,31 +277,32 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
sama5d2_pmc->chws[PMC_MCK] = hw;
- hw = at91_clk_register_h32mx(regmap, "h32mxck", "masterck_div", NULL);
+ hw = at91_clk_register_h32mx(regmap, "h32mxck", NULL,
+ &AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MCK]));
if (IS_ERR(hw))
goto err_free;
sama5d2_pmc->chws[PMC_MCK2] = hw;
- parent_names[0] = "plladivck";
- parent_names[1] = "utmick";
- hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, NULL, 2);
- if (IS_ERR(hw))
+ parent_data[0] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_PLLACK]);
+ parent_data[1] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_UTMI]);
+ usbck_hw = at91sam9x5_clk_register_usb(regmap, "usbck", NULL, parent_data, 2);
+ if (IS_ERR(usbck_hw))
goto err_free;
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "plladivck";
- parent_names[3] = "utmick";
- parent_names[4] = "masterck_div";
- parent_names[5] = "audiopll_pmcck";
+ parent_data[0] = AT91_CLK_PD_NAME(slow_clk_name);
+ parent_data[1] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MAIN]);
+ parent_data[2] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_UTMI]);
+ parent_data[4] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MCK]);
+ parent_data[5] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_AUDIOPLLCK]);
for (i = 0; i < 3; i++) {
char name[6];
snprintf(name, sizeof(name), "prog%d", i);
hw = at91_clk_register_programmable(regmap, name,
- parent_names, NULL, 6, i,
+ NULL, parent_data, 6, i,
&sama5d2_programmable_layout,
NULL);
if (IS_ERR(hw))
@@ -309,9 +311,18 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
sama5d2_pmc->pchws[i] = hw;
}
+ /* Set systemck parent hws. */
+ sama5d2_systemck[0].parent_hw = sama5d2_pmc->chws[PMC_MCK];
+ sama5d2_systemck[1].parent_hw = sama5d2_pmc->chws[PMC_MCK];
+ sama5d2_systemck[2].parent_hw = usbck_hw;
+ sama5d2_systemck[3].parent_hw = usbck_hw;
+ sama5d2_systemck[4].parent_hw = sama5d2_pmc->pchws[0];
+ sama5d2_systemck[5].parent_hw = sama5d2_pmc->pchws[1];
+ sama5d2_systemck[6].parent_hw = sama5d2_pmc->pchws[2];
+ sama5d2_systemck[7].parent_hw = sama5d2_pmc->chws[PMC_MCK];
for (i = 0; i < ARRAY_SIZE(sama5d2_systemck); i++) {
- hw = at91_clk_register_system(regmap, sama5d2_systemck[i].n,
- sama5d2_systemck[i].p, NULL,
+ hw = at91_clk_register_system(regmap, sama5d2_systemck[i].n, NULL,
+ &AT91_CLK_PD_HW(sama5d2_systemck[i].parent_hw),
sama5d2_systemck[i].id,
sama5d2_systemck[i].flags);
if (IS_ERR(hw))
@@ -324,7 +335,8 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
&sama5d2_pcr_layout,
sama5d2_periphck[i].n,
- "masterck_div", NULL,
+ NULL,
+ &AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MCK]),
sama5d2_periphck[i].id,
&range, INT_MIN,
sama5d2_periphck[i].flags);
@@ -338,7 +350,8 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
&sama5d2_pcr_layout,
sama5d2_periph32ck[i].n,
- "h32mxck", NULL,
+ NULL,
+ &AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MCK2]),
sama5d2_periph32ck[i].id,
&sama5d2_periph32ck[i].r,
INT_MIN, 0);
@@ -348,17 +361,17 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
sama5d2_pmc->phws[sama5d2_periph32ck[i].id] = hw;
}
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "plladivck";
- parent_names[3] = "utmick";
- parent_names[4] = "masterck_div";
- parent_names[5] = "audiopll_pmcck";
+ parent_data[0] = AT91_CLK_PD_NAME(slow_clk_name);
+ parent_data[1] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MAIN]);
+ parent_data[2] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_UTMI]);
+ parent_data[4] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_MCK]);
+ parent_data[5] = AT91_CLK_PD_HW(sama5d2_pmc->chws[PMC_AUDIOPLLCK]);
for (i = 0; i < ARRAY_SIZE(sama5d2_gck); i++) {
hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,
&sama5d2_pcr_layout,
sama5d2_gck[i].n,
- parent_names, NULL, NULL, 6,
+ NULL, parent_data, NULL, 6,
sama5d2_gck[i].id,
&sama5d2_gck[i].r,
sama5d2_gck[i].chg_pid);
@@ -369,19 +382,19 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
}
if (regmap_sfr) {
- parent_names[0] = "i2s0_clk";
- parent_names[1] = "i2s0_gclk";
+ parent_data[0] = AT91_CLK_PD_HW(sama5d2_pmc->phws[54]); /* i2s0_clk */
+ parent_data[1] = AT91_CLK_PD_HW(sama5d2_pmc->ghws[54]); /* i2s0_gclk */
hw = at91_clk_i2s_mux_register(regmap_sfr, "i2s0_muxclk",
- parent_names, NULL, 2, 0);
+ NULL, parent_data, 2, 0);
if (IS_ERR(hw))
goto err_free;
sama5d2_pmc->chws[PMC_I2S0_MUX] = hw;
- parent_names[0] = "i2s1_clk";
- parent_names[1] = "i2s1_gclk";
+ parent_data[0] = AT91_CLK_PD_HW(sama5d2_pmc->phws[55]); /* i2s1_clk */
+ parent_data[1] = AT91_CLK_PD_HW(sama5d2_pmc->ghws[55]); /* i2s1_gclk */
hw = at91_clk_i2s_mux_register(regmap_sfr, "i2s1_muxclk",
- parent_names, NULL, 2, 1);
+ NULL, parent_data, 2, 1);
if (IS_ERR(hw))
goto err_free;
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 24/31] clk: at91: sama5d3: switch to parent_hw and parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (22 preceding siblings ...)
2025-09-18 21:16 ` [PATCH v4 23/31] clk: at91: sama5d2: " Ryan.Wanner
@ 2025-09-18 21:16 ` Ryan.Wanner
2025-09-18 21:16 ` [PATCH v4 25/31] clk: at91: sama5d4: " Ryan.Wanner
` (6 subsequent siblings)
30 siblings, 0 replies; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:16 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Switch SAMA5D3 clocks to use parent_hw and parent_data. Having
parent_hw instead of parent names improves to clock registration
speed and re-parenting.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/sama5d3.c | 112 +++++++++++++++++++++----------------
1 file changed, 63 insertions(+), 49 deletions(-)
diff --git a/drivers/clk/at91/sama5d3.c b/drivers/clk/at91/sama5d3.c
index 8326bb6a291c..65b0e776dc13 100644
--- a/drivers/clk/at91/sama5d3.c
+++ b/drivers/clk/at91/sama5d3.c
@@ -37,9 +37,9 @@ static const struct clk_pcr_layout sama5d3_pcr_layout = {
.div_mask = GENMASK(17, 16),
};
-static const struct {
+static struct {
char *n;
- char *p;
+ struct clk_hw *parent_hw;
unsigned long flags;
u8 id;
} sama5d3_systemck[] = {
@@ -47,14 +47,14 @@ static const struct {
* ddrck feeds DDR controller and is enabled by bootloader thus we need
* to keep it enabled in case there is no Linux consumer for it.
*/
- { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL },
- { .n = "lcdck", .p = "masterck_div", .id = 3 },
- { .n = "smdck", .p = "smdclk", .id = 4 },
- { .n = "uhpck", .p = "usbck", .id = 6 },
- { .n = "udpck", .p = "usbck", .id = 7 },
- { .n = "pck0", .p = "prog0", .id = 8 },
- { .n = "pck1", .p = "prog1", .id = 9 },
- { .n = "pck2", .p = "prog2", .id = 10 },
+ { .n = "ddrck", .id = 2, .flags = CLK_IS_CRITICAL },
+ { .n = "lcdck", .id = 3 },
+ { .n = "smdck", .id = 4 },
+ { .n = "uhpck", .id = 6 },
+ { .n = "udpck", .id = 7 },
+ { .n = "pck0", .id = 8 },
+ { .n = "pck1", .id = 9 },
+ { .n = "pck2", .id = 10 },
};
static const struct {
@@ -114,11 +114,12 @@ static const struct {
static void __init sama5d3_pmc_setup(struct device_node *np)
{
- const char *slck_name, *mainxtal_name;
+ struct clk_hw *main_rc_hw, *main_osc_hw, *mainck_hw;
+ const char *slow_clk_name, *main_xtal_name;
+ struct clk_hw *smdck_hw, *usbck_hw, *hw;
+ struct clk_parent_data parent_data[5];
struct pmc_data *sama5d3_pmc;
- const char *parent_names[5];
struct regmap *regmap;
- struct clk_hw *hw;
int i;
bool bypass;
@@ -126,12 +127,12 @@ static void __init sama5d3_pmc_setup(struct device_node *np)
if (i < 0)
return;
- slck_name = of_clk_get_parent_name(np, i);
+ slow_clk_name = of_clk_get_parent_name(np, i);
i = of_property_match_string(np, "clock-names", "main_xtal");
if (i < 0)
return;
- mainxtal_name = of_clk_get_parent_name(np, i);
+ main_xtal_name = of_clk_get_parent_name(np, i);
regmap = device_node_to_regmap(np);
if (IS_ERR(regmap))
@@ -143,54 +144,55 @@ static void __init sama5d3_pmc_setup(struct device_node *np)
if (!sama5d3_pmc)
return;
- hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
- 50000000);
- if (IS_ERR(hw))
+ main_rc_hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
+ 50000000);
+ if (IS_ERR(main_rc_hw))
goto err_free;
bypass = of_property_read_bool(np, "atmel,osc-bypass");
- hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
- bypass);
- if (IS_ERR(hw))
+ main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL,
+ &AT91_CLK_PD_NAME(main_xtal_name),
+ bypass);
+ if (IS_ERR(main_osc_hw))
goto err_free;
- parent_names[0] = "main_rc_osc";
- parent_names[1] = "main_osc";
- hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2);
- if (IS_ERR(hw))
+ parent_data[0] = AT91_CLK_PD_HW(main_rc_hw);
+ parent_data[1] = AT91_CLK_PD_HW(main_osc_hw);
+ mainck_hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_data, 2);
+ if (IS_ERR(mainck_hw))
goto err_free;
- hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
+ hw = at91_clk_register_pll(regmap, "pllack", NULL, &AT91_CLK_PD_HW(mainck_hw), 0,
&sama5d3_pll_layout, &plla_characteristics);
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack", NULL);
+ hw = at91_clk_register_plldiv(regmap, "plladivck", NULL, &AT91_CLK_PD_HW(hw));
if (IS_ERR(hw))
goto err_free;
sama5d3_pmc->chws[PMC_PLLACK] = hw;
- hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL);
+ hw = at91_clk_register_utmi(regmap, NULL, "utmick", NULL, &AT91_CLK_PD_HW(mainck_hw));
if (IS_ERR(hw))
goto err_free;
sama5d3_pmc->chws[PMC_UTMI] = hw;
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "plladivck";
- parent_names[3] = "utmick";
+ parent_data[0] = AT91_CLK_PD_NAME(slow_clk_name);
+ parent_data[1] = AT91_CLK_PD_HW(mainck_hw);
+ parent_data[2] = AT91_CLK_PD_HW(sama5d3_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(sama5d3_pmc->chws[PMC_UTMI]);
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
- parent_names, NULL,
+ NULL, parent_data,
&at91sam9x5_master_layout,
&mck_characteristics, &mck_lock);
if (IS_ERR(hw))
goto err_free;
hw = at91_clk_register_master_div(regmap, "masterck_div",
- "masterck_pres", NULL,
+ NULL, &AT91_CLK_PD_HW(hw),
&at91sam9x5_master_layout,
&mck_characteristics, &mck_lock,
CLK_SET_RATE_GATE, 0);
@@ -199,28 +201,30 @@ static void __init sama5d3_pmc_setup(struct device_node *np)
sama5d3_pmc->chws[PMC_MCK] = hw;
- parent_names[0] = "plladivck";
- parent_names[1] = "utmick";
- hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, NULL, 2);
- if (IS_ERR(hw))
+ parent_data[0] = AT91_CLK_PD_HW(sama5d3_pmc->chws[PMC_PLLACK]);
+ parent_data[1] = AT91_CLK_PD_HW(sama5d3_pmc->chws[PMC_UTMI]);
+ usbck_hw = at91sam9x5_clk_register_usb(regmap, "usbck", NULL, parent_data, 2);
+ if (IS_ERR(usbck_hw))
goto err_free;
- hw = at91sam9x5_clk_register_smd(regmap, "smdclk", parent_names, NULL, 2);
- if (IS_ERR(hw))
+ parent_data[0] = AT91_CLK_PD_HW(sama5d3_pmc->chws[PMC_PLLACK]);
+ parent_data[1] = AT91_CLK_PD_HW(sama5d3_pmc->chws[PMC_UTMI]);
+ smdck_hw = at91sam9x5_clk_register_smd(regmap, "smdclk", NULL, parent_data, 2);
+ if (IS_ERR(smdck_hw))
goto err_free;
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "plladivck";
- parent_names[3] = "utmick";
- parent_names[4] = "masterck_div";
+ parent_data[0] = AT91_CLK_PD_NAME(slow_clk_name);
+ parent_data[1] = AT91_CLK_PD_HW(mainck_hw);
+ parent_data[2] = AT91_CLK_PD_HW(sama5d3_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(sama5d3_pmc->chws[PMC_UTMI]);
+ parent_data[4] = AT91_CLK_PD_HW(sama5d3_pmc->chws[PMC_MCK]);
for (i = 0; i < 3; i++) {
char name[6];
snprintf(name, sizeof(name), "prog%d", i);
hw = at91_clk_register_programmable(regmap, name,
- parent_names, NULL, 5, i,
+ NULL, parent_data, 5, i,
&at91sam9x5_programmable_layout,
NULL);
if (IS_ERR(hw))
@@ -229,9 +233,18 @@ static void __init sama5d3_pmc_setup(struct device_node *np)
sama5d3_pmc->pchws[i] = hw;
}
+ /* Set systemck parent hws. */
+ sama5d3_systemck[0].parent_hw = sama5d3_pmc->chws[PMC_MCK];
+ sama5d3_systemck[1].parent_hw = sama5d3_pmc->chws[PMC_MCK];
+ sama5d3_systemck[2].parent_hw = smdck_hw;
+ sama5d3_systemck[3].parent_hw = usbck_hw;
+ sama5d3_systemck[4].parent_hw = usbck_hw;
+ sama5d3_systemck[5].parent_hw = sama5d3_pmc->pchws[0];
+ sama5d3_systemck[6].parent_hw = sama5d3_pmc->pchws[1];
+ sama5d3_systemck[7].parent_hw = sama5d3_pmc->pchws[2];
for (i = 0; i < ARRAY_SIZE(sama5d3_systemck); i++) {
- hw = at91_clk_register_system(regmap, sama5d3_systemck[i].n,
- sama5d3_systemck[i].p, NULL,
+ hw = at91_clk_register_system(regmap, sama5d3_systemck[i].n, NULL,
+ &AT91_CLK_PD_HW(sama5d3_systemck[i].parent_hw),
sama5d3_systemck[i].id,
sama5d3_systemck[i].flags);
if (IS_ERR(hw))
@@ -244,7 +257,8 @@ static void __init sama5d3_pmc_setup(struct device_node *np)
hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
&sama5d3_pcr_layout,
sama5d3_periphck[i].n,
- "masterck_div", NULL,
+ NULL,
+ &AT91_CLK_PD_HW(sama5d3_pmc->chws[PMC_MCK]),
sama5d3_periphck[i].id,
&sama5d3_periphck[i].r,
INT_MIN,
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 25/31] clk: at91: sama5d4: switch to parent_hw and parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (23 preceding siblings ...)
2025-09-18 21:16 ` [PATCH v4 24/31] clk: at91: sama5d3: " Ryan.Wanner
@ 2025-09-18 21:16 ` Ryan.Wanner
2025-09-18 21:16 ` [PATCH v4 26/31] clk: at91: at91sam9x5: " Ryan.Wanner
` (5 subsequent siblings)
30 siblings, 0 replies; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:16 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Switch SAMA5D4 clocks to use parent_hw and parent_data. Having
parent_hw instead of parent names improves to clock registration
speed and re-parenting.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/sama5d4.c | 118 ++++++++++++++++++++-----------------
1 file changed, 65 insertions(+), 53 deletions(-)
diff --git a/drivers/clk/at91/sama5d4.c b/drivers/clk/at91/sama5d4.c
index 1ff9286148da..788683e87ccf 100644
--- a/drivers/clk/at91/sama5d4.c
+++ b/drivers/clk/at91/sama5d4.c
@@ -36,9 +36,9 @@ static const struct clk_pcr_layout sama5d4_pcr_layout = {
.pid_mask = GENMASK(6, 0),
};
-static const struct {
+static struct {
char *n;
- char *p;
+ struct clk_hw *parent_hw;
unsigned long flags;
u8 id;
} sama5d4_systemck[] = {
@@ -46,14 +46,14 @@ static const struct {
* ddrck feeds DDR controller and is enabled by bootloader thus we need
* to keep it enabled in case there is no Linux consumer for it.
*/
- { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL },
- { .n = "lcdck", .p = "masterck_div", .id = 3 },
- { .n = "smdck", .p = "smdclk", .id = 4 },
- { .n = "uhpck", .p = "usbck", .id = 6 },
- { .n = "udpck", .p = "usbck", .id = 7 },
- { .n = "pck0", .p = "prog0", .id = 8 },
- { .n = "pck1", .p = "prog1", .id = 9 },
- { .n = "pck2", .p = "prog2", .id = 10 },
+ { .n = "ddrck", .id = 2, .flags = CLK_IS_CRITICAL },
+ { .n = "lcdck", .id = 3 },
+ { .n = "smdck", .id = 4 },
+ { .n = "uhpck", .id = 6 },
+ { .n = "udpck", .id = 7 },
+ { .n = "pck0", .id = 8 },
+ { .n = "pck1", .id = 9 },
+ { .n = "pck2", .id = 10 },
};
static const struct {
@@ -128,12 +128,13 @@ static const struct {
static void __init sama5d4_pmc_setup(struct device_node *np)
{
+ struct clk_hw *main_rc_hw, *main_osc_hw, *mainck_hw;
+ const char *slow_clk_name, *main_xtal_name;
+ struct clk_hw *smdck_hw, *usbck_hw, *hw;
struct clk_range range = CLK_RANGE(0, 0);
- const char *slck_name, *mainxtal_name;
+ struct clk_parent_data parent_data[5];
struct pmc_data *sama5d4_pmc;
- const char *parent_names[5];
struct regmap *regmap;
- struct clk_hw *hw;
int i;
bool bypass;
@@ -141,12 +142,12 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
if (i < 0)
return;
- slck_name = of_clk_get_parent_name(np, i);
+ slow_clk_name = of_clk_get_parent_name(np, i);
i = of_property_match_string(np, "clock-names", "main_xtal");
if (i < 0)
return;
- mainxtal_name = of_clk_get_parent_name(np, i);
+ main_xtal_name = of_clk_get_parent_name(np, i);
regmap = device_node_to_regmap(np);
if (IS_ERR(regmap))
@@ -158,54 +159,53 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
if (!sama5d4_pmc)
return;
- hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
- 100000000);
- if (IS_ERR(hw))
+ main_rc_hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
+ 100000000);
+ if (IS_ERR(main_rc_hw))
goto err_free;
bypass = of_property_read_bool(np, "atmel,osc-bypass");
- hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
- bypass);
- if (IS_ERR(hw))
+ main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL,
+ &AT91_CLK_PD_NAME(main_xtal_name), bypass);
+ if (IS_ERR(main_osc_hw))
goto err_free;
- parent_names[0] = "main_rc_osc";
- parent_names[1] = "main_osc";
- hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2);
+ parent_data[0] = AT91_CLK_PD_HW(main_rc_hw);
+ parent_data[1] = AT91_CLK_PD_HW(main_osc_hw);
+ mainck_hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_data, 2);
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
+ hw = at91_clk_register_pll(regmap, "pllack", NULL, &AT91_CLK_PD_HW(mainck_hw), 0,
&sama5d3_pll_layout, &plla_characteristics);
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack", NULL);
+ hw = at91_clk_register_plldiv(regmap, "plladivck", NULL, &AT91_CLK_PD_HW(hw));
if (IS_ERR(hw))
goto err_free;
sama5d4_pmc->chws[PMC_PLLACK] = hw;
- hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL);
+ hw = at91_clk_register_utmi(regmap, NULL, "utmick", NULL, &AT91_CLK_PD_HW(mainck_hw));
if (IS_ERR(hw))
goto err_free;
sama5d4_pmc->chws[PMC_UTMI] = hw;
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "plladivck";
- parent_names[3] = "utmick";
+ parent_data[0] = AT91_CLK_PD_NAME(slow_clk_name);
+ parent_data[1] = AT91_CLK_PD_HW(mainck_hw);
+ parent_data[2] = AT91_CLK_PD_HW(sama5d4_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(sama5d4_pmc->chws[PMC_UTMI]);
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
- parent_names, NULL,
+ NULL, parent_data,
&at91sam9x5_master_layout,
&mck_characteristics, &mck_lock);
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_master_div(regmap, "masterck_div",
- "masterck_pres", NULL,
+ hw = at91_clk_register_master_div(regmap, "masterck_div", NULL, &AT91_CLK_PD_HW(hw),
&at91sam9x5_master_layout,
&mck_characteristics, &mck_lock,
CLK_SET_RATE_GATE, 0);
@@ -214,36 +214,37 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
sama5d4_pmc->chws[PMC_MCK] = hw;
- hw = at91_clk_register_h32mx(regmap, "h32mxck", "masterck_div", NULL);
+ hw = at91_clk_register_h32mx(regmap, "h32mxck", NULL,
+ &AT91_CLK_PD_HW(sama5d4_pmc->chws[PMC_MCK]));
if (IS_ERR(hw))
goto err_free;
sama5d4_pmc->chws[PMC_MCK2] = hw;
- parent_names[0] = "plladivck";
- parent_names[1] = "utmick";
- hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, NULL, 2);
- if (IS_ERR(hw))
+ parent_data[0] = AT91_CLK_PD_HW(sama5d4_pmc->chws[PMC_PLLACK]);
+ parent_data[1] = AT91_CLK_PD_HW(sama5d4_pmc->chws[PMC_UTMI]);
+ usbck_hw = at91sam9x5_clk_register_usb(regmap, "usbck", NULL, parent_data, 2);
+ if (IS_ERR(usbck_hw))
goto err_free;
- parent_names[0] = "plladivck";
- parent_names[1] = "utmick";
- hw = at91sam9x5_clk_register_smd(regmap, "smdclk", parent_names, NULL, 2);
- if (IS_ERR(hw))
+ parent_data[0] = AT91_CLK_PD_HW(sama5d4_pmc->chws[PMC_PLLACK]);
+ parent_data[1] = AT91_CLK_PD_HW(sama5d4_pmc->chws[PMC_UTMI]);
+ smdck_hw = at91sam9x5_clk_register_smd(regmap, "smdclk", NULL, parent_data, 2);
+ if (IS_ERR(smdck_hw))
goto err_free;
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "plladivck";
- parent_names[3] = "utmick";
- parent_names[4] = "masterck_div";
+ parent_data[0] = AT91_CLK_PD_NAME(slow_clk_name);
+ parent_data[1] = AT91_CLK_PD_HW(mainck_hw);
+ parent_data[2] = AT91_CLK_PD_HW(sama5d4_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(sama5d4_pmc->chws[PMC_UTMI]);
+ parent_data[4] = AT91_CLK_PD_HW(sama5d4_pmc->chws[PMC_MCK]);
for (i = 0; i < 3; i++) {
char name[6];
snprintf(name, sizeof(name), "prog%d", i);
hw = at91_clk_register_programmable(regmap, name,
- parent_names, NULL, 5, i,
+ NULL, parent_data, 5, i,
&at91sam9x5_programmable_layout,
NULL);
if (IS_ERR(hw))
@@ -252,9 +253,18 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
sama5d4_pmc->pchws[i] = hw;
}
+ /* Set systemck parent hws. */
+ sama5d4_systemck[0].parent_hw = sama5d4_pmc->chws[PMC_MCK];
+ sama5d4_systemck[1].parent_hw = sama5d4_pmc->chws[PMC_MCK];
+ sama5d4_systemck[2].parent_hw = smdck_hw;
+ sama5d4_systemck[3].parent_hw = usbck_hw;
+ sama5d4_systemck[4].parent_hw = usbck_hw;
+ sama5d4_systemck[5].parent_hw = sama5d4_pmc->pchws[0];
+ sama5d4_systemck[6].parent_hw = sama5d4_pmc->pchws[1];
+ sama5d4_systemck[7].parent_hw = sama5d4_pmc->pchws[2];
for (i = 0; i < ARRAY_SIZE(sama5d4_systemck); i++) {
- hw = at91_clk_register_system(regmap, sama5d4_systemck[i].n,
- sama5d4_systemck[i].p, NULL,
+ hw = at91_clk_register_system(regmap, sama5d4_systemck[i].n, NULL,
+ &AT91_CLK_PD_HW(sama5d4_systemck[i].parent_hw),
sama5d4_systemck[i].id,
sama5d4_systemck[i].flags);
if (IS_ERR(hw))
@@ -267,7 +277,8 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
&sama5d4_pcr_layout,
sama5d4_periphck[i].n,
- "masterck_div", NULL,
+ NULL,
+ &AT91_CLK_PD_HW(sama5d4_pmc->chws[PMC_MCK]),
sama5d4_periphck[i].id,
&range, INT_MIN,
sama5d4_periphck[i].flags);
@@ -281,7 +292,8 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
&sama5d4_pcr_layout,
sama5d4_periph32ck[i].n,
- "h32mxck", NULL,
+ NULL,
+ &AT91_CLK_PD_HW(sama5d4_pmc->chws[PMC_MCK2]),
sama5d4_periph32ck[i].id,
&range, INT_MIN, 0);
if (IS_ERR(hw))
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 26/31] clk: at91: at91sam9x5: switch to parent_hw and parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (24 preceding siblings ...)
2025-09-18 21:16 ` [PATCH v4 25/31] clk: at91: sama5d4: " Ryan.Wanner
@ 2025-09-18 21:16 ` Ryan.Wanner
2025-10-20 19:19 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 27/31] clk: at91: at91rm9200: " Ryan.Wanner
` (4 subsequent siblings)
30 siblings, 1 reply; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:16 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Switch AT91SAM9X5 clocks to use parent_hw and parent_data. Having
parent_hw instead of parent names improves to clock registration
speed and re-parenting.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/at91sam9x5.c | 108 +++++++++++++++++++---------------
1 file changed, 61 insertions(+), 47 deletions(-)
diff --git a/drivers/clk/at91/at91sam9x5.c b/drivers/clk/at91/at91sam9x5.c
index 13331e015dd7..46d5ea2e6417 100644
--- a/drivers/clk/at91/at91sam9x5.c
+++ b/drivers/clk/at91/at91sam9x5.c
@@ -38,9 +38,9 @@ static const struct clk_pll_characteristics plla_characteristics = {
.out = plla_out,
};
-static const struct {
+static struct {
char *n;
- char *p;
+ struct clk_hw *parent_hw;
unsigned long flags;
u8 id;
} at91sam9x5_systemck[] = {
@@ -48,12 +48,12 @@ static const struct {
* ddrck feeds DDR controller and is enabled by bootloader thus we need
* to keep it enabled in case there is no Linux consumer for it.
*/
- { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL },
- { .n = "smdck", .p = "smdclk", .id = 4 },
- { .n = "uhpck", .p = "usbck", .id = 6 },
- { .n = "udpck", .p = "usbck", .id = 7 },
- { .n = "pck0", .p = "prog0", .id = 8 },
- { .n = "pck1", .p = "prog1", .id = 9 },
+ { .n = "ddrck", .id = 2, .flags = CLK_IS_CRITICAL },
+ { .n = "smdck", .id = 4 },
+ { .n = "uhpck", .id = 6 },
+ { .n = "udpck", .id = 7 },
+ { .n = "pck0", .id = 8 },
+ { .n = "pck1", .id = 9 },
};
static const struct clk_pcr_layout at91sam9x5_pcr_layout = {
@@ -133,12 +133,13 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
const struct pck *extra_pcks,
bool has_lcdck)
{
+ struct clk_hw *main_rc_hw, *main_osc_hw, *hw;
struct clk_range range = CLK_RANGE(0, 0);
const char *slck_name, *mainxtal_name;
struct pmc_data *at91sam9x5_pmc;
- const char *parent_names[6];
+ struct clk_parent_data parent_data[6];
struct regmap *regmap;
- struct clk_hw *hw;
+ struct clk_hw *smdck_hw, *usbck_hw;
int i;
bool bypass;
@@ -162,56 +163,58 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
if (!at91sam9x5_pmc)
return;
- hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
- 50000000);
- if (IS_ERR(hw))
+ main_rc_hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
+ 50000000);
+ if (IS_ERR(main_rc_hw))
goto err_free;
bypass = of_property_read_bool(np, "atmel,osc-bypass");
- hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
- bypass);
- if (IS_ERR(hw))
+ main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL,
+ &AT91_CLK_PD_NAME(mainxtal_name), bypass);
+ if (IS_ERR(main_osc_hw))
goto err_free;
- parent_names[0] = "main_rc_osc";
- parent_names[1] = "main_osc";
- hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2);
+ parent_data[0] = AT91_CLK_PD_HW(main_rc_hw);
+ parent_data[1] = AT91_CLK_PD_HW(main_osc_hw);
+ hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_data, 2);
if (IS_ERR(hw))
goto err_free;
at91sam9x5_pmc->chws[PMC_MAIN] = hw;
- hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
+ hw = at91_clk_register_pll(regmap, "pllack", NULL,
+ &AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_MAIN]), 0,
&at91rm9200_pll_layout, &plla_characteristics);
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack", NULL);
+ hw = at91_clk_register_plldiv(regmap, "plladivck", NULL, &AT91_CLK_PD_HW(hw));
if (IS_ERR(hw))
goto err_free;
at91sam9x5_pmc->chws[PMC_PLLACK] = hw;
- hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL);
+ hw = at91_clk_register_utmi(regmap, NULL, "utmick", NULL,
+ &AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_MAIN]));
if (IS_ERR(hw))
goto err_free;
at91sam9x5_pmc->chws[PMC_UTMI] = hw;
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "plladivck";
- parent_names[3] = "utmick";
+ parent_data[0] = AT91_CLK_PD_NAME(slck_name);
+ parent_data[1] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_MAIN]);
+ parent_data[2] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_UTMI]);
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
- parent_names, NULL,
+ NULL, parent_data,
&at91sam9x5_master_layout,
&mck_characteristics, &mck_lock);
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_master_div(regmap, "masterck_div",
- "masterck_pres", NULL,
+ hw = at91_clk_register_master_div(regmap, "masterck_div", NULL,
+ &AT91_CLK_PD_HW(hw),
&at91sam9x5_master_layout,
&mck_characteristics, &mck_lock,
CLK_SET_RATE_GATE, 0);
@@ -220,28 +223,30 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
at91sam9x5_pmc->chws[PMC_MCK] = hw;
- parent_names[0] = "plladivck";
- parent_names[1] = "utmick";
- hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, NULL, 2);
- if (IS_ERR(hw))
+ parent_data[0] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_PLLACK]);
+ parent_data[1] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_UTMI]);
+ usbck_hw = at91sam9x5_clk_register_usb(regmap, "usbck", NULL, parent_data, 2);
+ if (IS_ERR(usbck_hw))
goto err_free;
- hw = at91sam9x5_clk_register_smd(regmap, "smdclk", parent_names, NULL, 2);
- if (IS_ERR(hw))
+ parent_data[0] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_PLLACK]);
+ parent_data[1] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_UTMI]);
+ smdck_hw = at91sam9x5_clk_register_smd(regmap, "smdclk", NULL, parent_data, 2);
+ if (IS_ERR(smdck_hw))
goto err_free;
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "plladivck";
- parent_names[3] = "utmick";
- parent_names[4] = "masterck_div";
+ parent_data[0] = AT91_CLK_PD_NAME(slck_name);
+ parent_data[1] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_MAIN]);
+ parent_data[2] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_UTMI]);
+ parent_data[4] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_MCK]);
for (i = 0; i < 2; i++) {
char name[6];
snprintf(name, sizeof(name), "prog%d", i);
hw = at91_clk_register_programmable(regmap, name,
- parent_names, NULL, 5, i,
+ NULL, parent_data, 5, i,
&at91sam9x5_programmable_layout,
NULL);
if (IS_ERR(hw))
@@ -250,9 +255,16 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
at91sam9x5_pmc->pchws[i] = hw;
}
+ /* Set systemck parent hws. */
+ at91sam9x5_systemck[0].parent_hw = at91sam9x5_pmc->chws[PMC_MCK];
+ at91sam9x5_systemck[1].parent_hw = smdck_hw;
+ at91sam9x5_systemck[2].parent_hw = usbck_hw;
+ at91sam9x5_systemck[3].parent_hw = usbck_hw;
+ at91sam9x5_systemck[4].parent_hw = at91sam9x5_pmc->pchws[0];
+ at91sam9x5_systemck[5].parent_hw = at91sam9x5_pmc->pchws[1];
for (i = 0; i < ARRAY_SIZE(at91sam9x5_systemck); i++) {
- hw = at91_clk_register_system(regmap, at91sam9x5_systemck[i].n,
- at91sam9x5_systemck[i].p, NULL,
+ hw = at91_clk_register_system(regmap, at91sam9x5_systemck[i].n, NULL,
+ &AT91_CLK_PD_HW(at91sam9x5_systemck[i].parent_hw),
at91sam9x5_systemck[i].id,
at91sam9x5_systemck[i].flags);
if (IS_ERR(hw))
@@ -262,8 +274,8 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
}
if (has_lcdck) {
- hw = at91_clk_register_system(regmap, "lcdck", "masterck_div",
- NULL, 3, 0);
+ hw = at91_clk_register_system(regmap, "lcdck", NULL,
+ &AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_MCK]), 3, 0);
if (IS_ERR(hw))
goto err_free;
@@ -274,7 +286,8 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
&at91sam9x5_pcr_layout,
at91sam9x5_periphck[i].n,
- "masterck_div", NULL,
+ NULL,
+ &AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_MCK]),
at91sam9x5_periphck[i].id,
&range, INT_MIN, 0);
if (IS_ERR(hw))
@@ -287,7 +300,8 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
&at91sam9x5_pcr_layout,
extra_pcks[i].n,
- "masterck_div", NULL,
+ NULL,
+ &AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_MCK]),
extra_pcks[i].id,
&range, INT_MIN, 0);
if (IS_ERR(hw))
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 27/31] clk: at91: at91rm9200: switch to parent_hw and parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (25 preceding siblings ...)
2025-09-18 21:16 ` [PATCH v4 26/31] clk: at91: at91sam9x5: " Ryan.Wanner
@ 2025-09-18 21:16 ` Ryan.Wanner
2025-09-18 21:16 ` [PATCH v4 28/31] clk: at91: at91sam9260: " Ryan.Wanner
` (3 subsequent siblings)
30 siblings, 0 replies; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:16 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Switch AT91RM9200 clocks to use parent_hw and parent_data. Having
parent_hw instead of parent names improves to clock registration
speed and re-parenting.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/at91rm9200.c | 79 ++++++++++++++++++++---------------
1 file changed, 46 insertions(+), 33 deletions(-)
diff --git a/drivers/clk/at91/at91rm9200.c b/drivers/clk/at91/at91rm9200.c
index 623e232ec9c6..20bb51ec683f 100644
--- a/drivers/clk/at91/at91rm9200.c
+++ b/drivers/clk/at91/at91rm9200.c
@@ -11,7 +11,7 @@ static DEFINE_SPINLOCK(rm9200_mck_lock);
struct sck {
char *n;
- char *p;
+ struct clk_hw *parent_hw;
u8 id;
};
@@ -39,13 +39,13 @@ static const struct clk_pll_characteristics rm9200_pll_characteristics = {
.out = rm9200_pll_out,
};
-static const struct sck at91rm9200_systemck[] = {
- { .n = "udpck", .p = "usbck", .id = 1 },
- { .n = "uhpck", .p = "usbck", .id = 4 },
- { .n = "pck0", .p = "prog0", .id = 8 },
- { .n = "pck1", .p = "prog1", .id = 9 },
- { .n = "pck2", .p = "prog2", .id = 10 },
- { .n = "pck3", .p = "prog3", .id = 11 },
+static struct sck at91rm9200_systemck[] = {
+ { .n = "udpck", .id = 1 },
+ { .n = "uhpck", .id = 4 },
+ { .n = "pck0", .id = 8 },
+ { .n = "pck1", .id = 9 },
+ { .n = "pck2", .id = 10 },
+ { .n = "pck3", .id = 11 },
};
static const struct pck at91rm9200_periphck[] = {
@@ -77,11 +77,11 @@ static const struct pck at91rm9200_periphck[] = {
static void __init at91rm9200_pmc_setup(struct device_node *np)
{
const char *slowxtal_name, *mainxtal_name;
+ struct clk_hw *usbck_hw, *main_osc_hw, *hw;
+ struct clk_parent_data parent_data[6];
struct pmc_data *at91rm9200_pmc;
u32 usb_div[] = { 1, 2, 0, 0 };
- const char *parent_names[6];
struct regmap *regmap;
- struct clk_hw *hw;
int i;
bool bypass;
@@ -108,18 +108,21 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
bypass = of_property_read_bool(np, "atmel,osc-bypass");
- hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
- bypass);
- if (IS_ERR(hw))
+ main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL,
+ &AT91_CLK_PD_NAME(mainxtal_name),
+ bypass);
+ if (IS_ERR(main_osc_hw))
goto err_free;
- hw = at91_clk_register_rm9200_main(regmap, "mainck", "main_osc", NULL);
+ hw = at91_clk_register_rm9200_main(regmap, "mainck", NULL,
+ &AT91_CLK_PD_HW(main_osc_hw));
if (IS_ERR(hw))
goto err_free;
at91rm9200_pmc->chws[PMC_MAIN] = hw;
- hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
+ hw = at91_clk_register_pll(regmap, "pllack", NULL,
+ &AT91_CLK_PD_HW(at91rm9200_pmc->chws[PMC_MAIN]), 0,
&at91rm9200_pll_layout,
&rm9200_pll_characteristics);
if (IS_ERR(hw))
@@ -127,7 +130,8 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
at91rm9200_pmc->chws[PMC_PLLACK] = hw;
- hw = at91_clk_register_pll(regmap, "pllbck", "mainck", NULL, 1,
+ hw = at91_clk_register_pll(regmap, "pllbck", NULL,
+ &AT91_CLK_PD_HW(at91rm9200_pmc->chws[PMC_MAIN]), 1,
&at91rm9200_pll_layout,
&rm9200_pll_characteristics);
if (IS_ERR(hw))
@@ -135,20 +139,19 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
at91rm9200_pmc->chws[PMC_PLLBCK] = hw;
- parent_names[0] = slowxtal_name;
- parent_names[1] = "mainck";
- parent_names[2] = "pllack";
- parent_names[3] = "pllbck";
+ parent_data[0] = AT91_CLK_PD_NAME(slowxtal_name);
+ parent_data[1] = AT91_CLK_PD_HW(at91rm9200_pmc->chws[PMC_MAIN]);
+ parent_data[2] = AT91_CLK_PD_HW(at91rm9200_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(at91rm9200_pmc->chws[PMC_PLLBCK]);
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
- parent_names, NULL,
+ NULL, parent_data,
&at91rm9200_master_layout,
&rm9200_mck_characteristics,
&rm9200_mck_lock);
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_master_div(regmap, "masterck_div",
- "masterck_pres", NULL,
+ hw = at91_clk_register_master_div(regmap, "masterck_div", NULL, &AT91_CLK_PD_HW(hw),
&at91rm9200_master_layout,
&rm9200_mck_characteristics,
&rm9200_mck_lock, CLK_SET_RATE_GATE, 0);
@@ -157,21 +160,23 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
at91rm9200_pmc->chws[PMC_MCK] = hw;
- hw = at91rm9200_clk_register_usb(regmap, "usbck", "pllbck", NULL, usb_div);
- if (IS_ERR(hw))
+ usbck_hw = at91rm9200_clk_register_usb(regmap, "usbck", NULL,
+ &AT91_CLK_PD_HW(at91rm9200_pmc->chws[PMC_PLLBCK]),
+ usb_div);
+ if (IS_ERR(usbck_hw))
goto err_free;
- parent_names[0] = slowxtal_name;
- parent_names[1] = "mainck";
- parent_names[2] = "pllack";
- parent_names[3] = "pllbck";
+ parent_data[0] = AT91_CLK_PD_NAME(slowxtal_name);
+ parent_data[1] = AT91_CLK_PD_HW(at91rm9200_pmc->chws[PMC_MAIN]);
+ parent_data[2] = AT91_CLK_PD_HW(at91rm9200_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(at91rm9200_pmc->chws[PMC_PLLBCK]);
for (i = 0; i < 4; i++) {
char name[6];
snprintf(name, sizeof(name), "prog%d", i);
hw = at91_clk_register_programmable(regmap, name,
- parent_names, NULL, 4, i,
+ NULL, parent_data, 4, i,
&at91rm9200_programmable_layout,
NULL);
if (IS_ERR(hw))
@@ -180,9 +185,16 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
at91rm9200_pmc->pchws[i] = hw;
}
+ /* Set systemck parent hws. */
+ at91rm9200_systemck[0].parent_hw = usbck_hw;
+ at91rm9200_systemck[1].parent_hw = usbck_hw;
+ at91rm9200_systemck[2].parent_hw = at91rm9200_pmc->pchws[0];
+ at91rm9200_systemck[3].parent_hw = at91rm9200_pmc->pchws[1];
+ at91rm9200_systemck[4].parent_hw = at91rm9200_pmc->pchws[2];
+ at91rm9200_systemck[5].parent_hw = at91rm9200_pmc->pchws[3];
for (i = 0; i < ARRAY_SIZE(at91rm9200_systemck); i++) {
- hw = at91_clk_register_system(regmap, at91rm9200_systemck[i].n,
- at91rm9200_systemck[i].p, NULL,
+ hw = at91_clk_register_system(regmap, at91rm9200_systemck[i].n, NULL,
+ &AT91_CLK_PD_HW(at91rm9200_systemck[i].parent_hw),
at91rm9200_systemck[i].id, 0);
if (IS_ERR(hw))
goto err_free;
@@ -193,7 +205,8 @@ static void __init at91rm9200_pmc_setup(struct device_node *np)
for (i = 0; i < ARRAY_SIZE(at91rm9200_periphck); i++) {
hw = at91_clk_register_peripheral(regmap,
at91rm9200_periphck[i].n,
- "masterck_div", NULL,
+ NULL,
+ &AT91_CLK_PD_HW(at91rm9200_pmc->chws[PMC_MCK]),
at91rm9200_periphck[i].id);
if (IS_ERR(hw))
goto err_free;
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 28/31] clk: at91: at91sam9260: switch to parent_hw and parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (26 preceding siblings ...)
2025-09-18 21:16 ` [PATCH v4 27/31] clk: at91: at91rm9200: " Ryan.Wanner
@ 2025-09-18 21:16 ` Ryan.Wanner
2025-10-20 19:35 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 29/31] clk: at91: at91sam9g45: " Ryan.Wanner
` (2 subsequent siblings)
30 siblings, 1 reply; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:16 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Switch AT91SAM92600 clocks to use parent_hw and parent_data. Having
parent_hw instead of parent names improves to clock registration
speed and re-parenting.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/at91sam9260.c | 120 ++++++++++++++++++---------------
1 file changed, 67 insertions(+), 53 deletions(-)
diff --git a/drivers/clk/at91/at91sam9260.c b/drivers/clk/at91/at91sam9260.c
index 55350331b07e..2ac2a340da2f 100644
--- a/drivers/clk/at91/at91sam9260.c
+++ b/drivers/clk/at91/at91sam9260.c
@@ -9,7 +9,7 @@
struct sck {
char *n;
- char *p;
+ struct clk_hw *parent_hw;
u8 id;
};
@@ -24,7 +24,7 @@ struct at91sam926x_data {
const struct clk_pll_layout *pllb_layout;
const struct clk_pll_characteristics *pllb_characteristics;
const struct clk_master_characteristics *mck_characteristics;
- const struct sck *sck;
+ struct sck *sck;
const struct pck *pck;
u8 num_sck;
u8 num_pck;
@@ -72,11 +72,11 @@ static const struct clk_pll_characteristics sam9260_pllb_characteristics = {
.out = sam9260_pllb_out,
};
-static const struct sck at91sam9260_systemck[] = {
- { .n = "uhpck", .p = "usbck", .id = 6 },
- { .n = "udpck", .p = "usbck", .id = 7 },
- { .n = "pck0", .p = "prog0", .id = 8 },
- { .n = "pck1", .p = "prog1", .id = 9 },
+static struct sck at91sam9260_systemck[] = {
+ { .n = "uhpck", .id = 6 },
+ { .n = "udpck", .id = 7 },
+ { .n = "pck0", .id = 8 },
+ { .n = "pck1", .id = 9 },
};
static const struct pck at91sam9260_periphck[] = {
@@ -213,15 +213,15 @@ static const struct clk_pll_characteristics sam9261_pllb_characteristics = {
.out = sam9261_pllb_out,
};
-static const struct sck at91sam9261_systemck[] = {
- { .n = "uhpck", .p = "usbck", .id = 6 },
- { .n = "udpck", .p = "usbck", .id = 7 },
- { .n = "pck0", .p = "prog0", .id = 8 },
- { .n = "pck1", .p = "prog1", .id = 9 },
- { .n = "pck2", .p = "prog2", .id = 10 },
- { .n = "pck3", .p = "prog3", .id = 11 },
- { .n = "hclk0", .p = "masterck_div", .id = 16 },
- { .n = "hclk1", .p = "masterck_div", .id = 17 },
+static struct sck at91sam9261_systemck[] = {
+ { .n = "uhpck", .id = 6 },
+ { .n = "udpck", .id = 7 },
+ { .n = "pck0", .id = 8 },
+ { .n = "pck1", .id = 9 },
+ { .n = "pck2", .id = 10 },
+ { .n = "pck3", .id = 11 },
+ { .n = "hclk0", .id = 16 },
+ { .n = "hclk1", .id = 17 },
};
static const struct pck at91sam9261_periphck[] = {
@@ -277,13 +277,13 @@ static const struct clk_pll_characteristics sam9263_pll_characteristics = {
.out = sam9260_plla_out,
};
-static const struct sck at91sam9263_systemck[] = {
- { .n = "uhpck", .p = "usbck", .id = 6 },
- { .n = "udpck", .p = "usbck", .id = 7 },
- { .n = "pck0", .p = "prog0", .id = 8 },
- { .n = "pck1", .p = "prog1", .id = 9 },
- { .n = "pck2", .p = "prog2", .id = 10 },
- { .n = "pck3", .p = "prog3", .id = 11 },
+static struct sck at91sam9263_systemck[] = {
+ { .n = "uhpck", .id = 6 },
+ { .n = "udpck", .id = 7 },
+ { .n = "pck0", .id = 8 },
+ { .n = "pck1", .id = 9 },
+ { .n = "pck2", .id = 10 },
+ { .n = "pck3", .id = 11 },
};
static const struct pck at91sam9263_periphck[] = {
@@ -330,12 +330,11 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
struct at91sam926x_data *data)
{
const char *slowxtal_name, *mainxtal_name;
+ struct clk_parent_data parent_data[4];
struct pmc_data *at91sam9260_pmc;
u32 usb_div[] = { 1, 2, 4, 0 };
- const char *parent_names[6];
- const char *slck_name;
+ struct clk_hw *usbck_hw, *hw;
struct regmap *regmap;
- struct clk_hw *hw;
int i;
bool bypass;
@@ -363,12 +362,13 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
bypass = of_property_read_bool(np, "atmel,osc-bypass");
- hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
+ hw = at91_clk_register_main_osc(regmap, "main_osc", NULL,
+ &AT91_CLK_PD_NAME(mainxtal_name),
bypass);
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_rm9200_main(regmap, "mainck", "main_osc", NULL);
+ hw = at91_clk_register_rm9200_main(regmap, "mainck", NULL, &AT91_CLK_PD_HW(hw));
if (IS_ERR(hw))
goto err_free;
@@ -382,20 +382,17 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
if (IS_ERR(hw))
goto err_free;
- parent_names[0] = "slow_rc_osc";
- parent_names[1] = "slow_xtal";
- hw = at91_clk_register_sam9260_slow(regmap, "slck",
- parent_names, NULL, 2);
+ parent_data[0] = AT91_CLK_PD_HW(hw);
+ parent_data[1] = AT91_CLK_PD_NAME(slowxtal_name);
+ hw = at91_clk_register_sam9260_slow(regmap, "slck", NULL, parent_data, 2);
if (IS_ERR(hw))
goto err_free;
at91sam9260_pmc->chws[PMC_SLOW] = hw;
- slck_name = "slck";
- } else {
- slck_name = slowxtal_name;
}
- hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
+ hw = at91_clk_register_pll(regmap, "pllack", NULL,
+ &AT91_CLK_PD_HW(at91sam9260_pmc->chws[PMC_MAIN]), 0,
data->plla_layout,
data->plla_characteristics);
if (IS_ERR(hw))
@@ -403,7 +400,8 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
at91sam9260_pmc->chws[PMC_PLLACK] = hw;
- hw = at91_clk_register_pll(regmap, "pllbck", "mainck", NULL, 1,
+ hw = at91_clk_register_pll(regmap, "pllbck", NULL,
+ &AT91_CLK_PD_HW(at91sam9260_pmc->chws[PMC_MAIN]), 1,
data->pllb_layout,
data->pllb_characteristics);
if (IS_ERR(hw))
@@ -411,12 +409,12 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
at91sam9260_pmc->chws[PMC_PLLBCK] = hw;
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "pllack";
- parent_names[3] = "pllbck";
+ parent_data[0] = AT91_CLK_PD_NAME(slowxtal_name);
+ parent_data[1] = AT91_CLK_PD_HW(at91sam9260_pmc->chws[PMC_MAIN]);
+ parent_data[2] = AT91_CLK_PD_HW(at91sam9260_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(at91sam9260_pmc->chws[PMC_PLLACK]);
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
- parent_names, NULL,
+ NULL, parent_data,
&at91rm9200_master_layout,
data->mck_characteristics,
&at91sam9260_mck_lock);
@@ -424,7 +422,7 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
goto err_free;
hw = at91_clk_register_master_div(regmap, "masterck_div",
- "masterck_pres", NULL,
+ NULL, &AT91_CLK_PD_HW(hw),
&at91rm9200_master_layout,
data->mck_characteristics,
&at91sam9260_mck_lock,
@@ -434,21 +432,23 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
at91sam9260_pmc->chws[PMC_MCK] = hw;
- hw = at91rm9200_clk_register_usb(regmap, "usbck", "pllbck", NULL, usb_div);
- if (IS_ERR(hw))
+ usbck_hw = at91rm9200_clk_register_usb(regmap, "usbck", NULL,
+ &AT91_CLK_PD_HW(at91sam9260_pmc->chws[PMC_PLLBCK]),
+ usb_div);
+ if (IS_ERR(usbck_hw))
goto err_free;
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "pllack";
- parent_names[3] = "pllbck";
+ parent_data[0] = AT91_CLK_PD_NAME(slowxtal_name);
+ parent_data[1] = AT91_CLK_PD_HW(at91sam9260_pmc->chws[PMC_MAIN]);
+ parent_data[2] = AT91_CLK_PD_HW(at91sam9260_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(at91sam9260_pmc->chws[PMC_PLLBCK]);
for (i = 0; i < data->num_progck; i++) {
char name[6];
snprintf(name, sizeof(name), "prog%d", i);
hw = at91_clk_register_programmable(regmap, name,
- parent_names, NULL, 4, i,
+ NULL, parent_data, 4, i,
&at91rm9200_programmable_layout,
NULL);
if (IS_ERR(hw))
@@ -457,9 +457,22 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
at91sam9260_pmc->pchws[i] = hw;
}
+ /* Set systemck parent hws. */
+ data->sck[0].parent_hw = usbck_hw;
+ data->sck[1].parent_hw = usbck_hw;
+ data->sck[2].parent_hw = at91sam9260_pmc->pchws[0];
+ data->sck[3].parent_hw = at91sam9260_pmc->pchws[1];
+ if (data->num_sck == 6) {
+ data->sck[4].parent_hw = at91sam9260_pmc->pchws[2];
+ data->sck[5].parent_hw = at91sam9260_pmc->pchws[3];
+ }
+ if (data->num_sck == 8) {
+ data->sck[6].parent_hw = at91sam9260_pmc->chws[PMC_MCK];
+ data->sck[7].parent_hw = at91sam9260_pmc->chws[PMC_MCK];
+ }
for (i = 0; i < data->num_sck; i++) {
- hw = at91_clk_register_system(regmap, data->sck[i].n,
- data->sck[i].p, NULL,
+ hw = at91_clk_register_system(regmap, data->sck[i].n, NULL,
+ &AT91_CLK_PD_HW(data->sck[i].parent_hw),
data->sck[i].id, 0);
if (IS_ERR(hw))
goto err_free;
@@ -470,7 +483,8 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
for (i = 0; i < data->num_pck; i++) {
hw = at91_clk_register_peripheral(regmap,
data->pck[i].n,
- "masterck_div", NULL,
+ NULL,
+ &AT91_CLK_PD_HW(at91sam9260_pmc->chws[PMC_MCK]),
data->pck[i].id);
if (IS_ERR(hw))
goto err_free;
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 29/31] clk: at91: at91sam9g45: switch to parent_hw and parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (27 preceding siblings ...)
2025-09-18 21:16 ` [PATCH v4 28/31] clk: at91: at91sam9260: " Ryan.Wanner
@ 2025-09-18 21:16 ` Ryan.Wanner
2025-09-18 21:16 ` [PATCH v4 30/31] clk: at91: at91sam9n12: " Ryan.Wanner
2025-09-18 21:16 ` [PATCH v4 31/31] clk: at91: at91sam9rl: switch to clk_parent_data Ryan.Wanner
30 siblings, 0 replies; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:16 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Switch AT91SAM9G45 clocks to use parent_hw and parent_data. Having
parent_hw instead of parent names improves to clock registration
speed and re-parenting.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/at91sam9g45.c | 73 +++++++++++++++++++---------------
1 file changed, 41 insertions(+), 32 deletions(-)
diff --git a/drivers/clk/at91/at91sam9g45.c b/drivers/clk/at91/at91sam9g45.c
index cb98d22c2e30..b74e2dee8e4c 100644
--- a/drivers/clk/at91/at91sam9g45.c
+++ b/drivers/clk/at91/at91sam9g45.c
@@ -37,9 +37,9 @@ static const struct clk_pll_characteristics plla_characteristics = {
.out = plla_out,
};
-static const struct {
+static struct {
char *n;
- char *p;
+ struct clk_hw *parent_hw;
unsigned long flags;
u8 id;
} at91sam9g45_systemck[] = {
@@ -47,10 +47,10 @@ static const struct {
* ddrck feeds DDR controller and is enabled by bootloader thus we need
* to keep it enabled in case there is no Linux consumer for it.
*/
- { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL },
- { .n = "uhpck", .p = "usbck", .id = 6 },
- { .n = "pck0", .p = "prog0", .id = 8 },
- { .n = "pck1", .p = "prog1", .id = 9 },
+ { .n = "ddrck", .id = 2, .flags = CLK_IS_CRITICAL },
+ { .n = "uhpck", .id = 6 },
+ { .n = "pck0", .id = 8 },
+ { .n = "pck1", .id = 9 },
};
struct pck {
@@ -93,10 +93,10 @@ static const struct pck at91sam9g45_periphck[] = {
static void __init at91sam9g45_pmc_setup(struct device_node *np)
{
const char *slck_name, *mainxtal_name;
+ struct clk_parent_data parent_data[5];
struct pmc_data *at91sam9g45_pmc;
- const char *parent_names[6];
+ struct clk_hw *usbck_hw, *hw;
struct regmap *regmap;
- struct clk_hw *hw;
int i;
bool bypass;
@@ -123,40 +123,43 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np)
bypass = of_property_read_bool(np, "atmel,osc-bypass");
- hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
+ hw = at91_clk_register_main_osc(regmap, "main_osc", NULL,
+ &AT91_CLK_PD_NAME(mainxtal_name),
bypass);
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_rm9200_main(regmap, "mainck", "main_osc", NULL);
+ hw = at91_clk_register_rm9200_main(regmap, "mainck", NULL, &AT91_CLK_PD_HW(hw));
if (IS_ERR(hw))
goto err_free;
at91sam9g45_pmc->chws[PMC_MAIN] = hw;
- hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
+ hw = at91_clk_register_pll(regmap, "pllack", NULL,
+ &AT91_CLK_PD_HW(at91sam9g45_pmc->chws[PMC_MAIN]), 0,
&at91rm9200_pll_layout, &plla_characteristics);
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack", NULL);
+ hw = at91_clk_register_plldiv(regmap, "plladivck", NULL, &AT91_CLK_PD_HW(hw));
if (IS_ERR(hw))
goto err_free;
at91sam9g45_pmc->chws[PMC_PLLACK] = hw;
- hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL);
+ hw = at91_clk_register_utmi(regmap, NULL, "utmick", NULL,
+ &AT91_CLK_PD_HW(at91sam9g45_pmc->chws[PMC_MAIN]));
if (IS_ERR(hw))
goto err_free;
at91sam9g45_pmc->chws[PMC_UTMI] = hw;
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "plladivck";
- parent_names[3] = "utmick";
+ parent_data[0] = AT91_CLK_PD_NAME(slck_name);
+ parent_data[1] = AT91_CLK_PD_HW(at91sam9g45_pmc->chws[PMC_MAIN]);
+ parent_data[2] = AT91_CLK_PD_HW(at91sam9g45_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(at91sam9g45_pmc->chws[PMC_UTMI]);
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
- parent_names, NULL,
+ NULL, parent_data,
&at91rm9200_master_layout,
&mck_characteristics,
&at91sam9g45_mck_lock);
@@ -164,7 +167,7 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np)
goto err_free;
hw = at91_clk_register_master_div(regmap, "masterck_div",
- "masterck_pres", NULL,
+ NULL, &AT91_CLK_PD_HW(hw),
&at91rm9200_master_layout,
&mck_characteristics,
&at91sam9g45_mck_lock,
@@ -174,24 +177,24 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np)
at91sam9g45_pmc->chws[PMC_MCK] = hw;
- parent_names[0] = "plladivck";
- parent_names[1] = "utmick";
- hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, NULL, 2);
- if (IS_ERR(hw))
+ parent_data[0] = AT91_CLK_PD_HW(at91sam9g45_pmc->chws[PMC_PLLACK]);
+ parent_data[1] = AT91_CLK_PD_HW(at91sam9g45_pmc->chws[PMC_UTMI]);
+ usbck_hw = at91sam9x5_clk_register_usb(regmap, "usbck", NULL, parent_data, 2);
+ if (IS_ERR(usbck_hw))
goto err_free;
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "plladivck";
- parent_names[3] = "utmick";
- parent_names[4] = "masterck_div";
+ parent_data[0] = AT91_CLK_PD_NAME(slck_name);
+ parent_data[1] = AT91_CLK_PD_HW(at91sam9g45_pmc->chws[PMC_MAIN]);
+ parent_data[2] = AT91_CLK_PD_HW(at91sam9g45_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(at91sam9g45_pmc->chws[PMC_UTMI]);
+ parent_data[4] = AT91_CLK_PD_HW(at91sam9g45_pmc->chws[PMC_MCK]);
for (i = 0; i < 2; i++) {
char name[6];
snprintf(name, sizeof(name), "prog%d", i);
hw = at91_clk_register_programmable(regmap, name,
- parent_names, NULL, 5, i,
+ NULL, parent_data, 5, i,
&at91sam9g45_programmable_layout,
NULL);
if (IS_ERR(hw))
@@ -200,9 +203,14 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np)
at91sam9g45_pmc->pchws[i] = hw;
}
+ /* Set systemck parent hws. */
+ at91sam9g45_systemck[0].parent_hw = at91sam9g45_pmc->chws[PMC_MCK];
+ at91sam9g45_systemck[1].parent_hw = usbck_hw;
+ at91sam9g45_systemck[2].parent_hw = at91sam9g45_pmc->pchws[0];
+ at91sam9g45_systemck[3].parent_hw = at91sam9g45_pmc->pchws[1];
for (i = 0; i < ARRAY_SIZE(at91sam9g45_systemck); i++) {
- hw = at91_clk_register_system(regmap, at91sam9g45_systemck[i].n,
- at91sam9g45_systemck[i].p, NULL,
+ hw = at91_clk_register_system(regmap, at91sam9g45_systemck[i].n, NULL,
+ &AT91_CLK_PD_HW(at91sam9g45_systemck[i].parent_hw),
at91sam9g45_systemck[i].id,
at91sam9g45_systemck[i].flags);
if (IS_ERR(hw))
@@ -214,7 +222,8 @@ static void __init at91sam9g45_pmc_setup(struct device_node *np)
for (i = 0; i < ARRAY_SIZE(at91sam9g45_periphck); i++) {
hw = at91_clk_register_peripheral(regmap,
at91sam9g45_periphck[i].n,
- "masterck_div", NULL,
+ NULL,
+ &AT91_CLK_PD_HW(at91sam9g45_pmc->chws[PMC_MCK]),
at91sam9g45_periphck[i].id);
if (IS_ERR(hw))
goto err_free;
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 30/31] clk: at91: at91sam9n12: switch to parent_hw and parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (28 preceding siblings ...)
2025-09-18 21:16 ` [PATCH v4 29/31] clk: at91: at91sam9g45: " Ryan.Wanner
@ 2025-09-18 21:16 ` Ryan.Wanner
2025-09-18 21:16 ` [PATCH v4 31/31] clk: at91: at91sam9rl: switch to clk_parent_data Ryan.Wanner
30 siblings, 0 replies; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:16 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Switch AT91SAM9N12 clocks to use parent_hw and parent_data. Having
parent_hw instead of parent names improves to clock registration
speed and re-parenting.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/at91sam9n12.c | 90 +++++++++++++++++++---------------
1 file changed, 51 insertions(+), 39 deletions(-)
diff --git a/drivers/clk/at91/at91sam9n12.c b/drivers/clk/at91/at91sam9n12.c
index 34dd7645f964..87c28d34f98d 100644
--- a/drivers/clk/at91/at91sam9n12.c
+++ b/drivers/clk/at91/at91sam9n12.c
@@ -51,9 +51,9 @@ static const struct clk_pll_characteristics pllb_characteristics = {
.out = pllb_out,
};
-static const struct {
+static struct {
char *n;
- char *p;
+ struct clk_hw *parent_hw;
unsigned long flags;
u8 id;
} at91sam9n12_systemck[] = {
@@ -61,12 +61,12 @@ static const struct {
* ddrck feeds DDR controller and is enabled by bootloader thus we need
* to keep it enabled in case there is no Linux consumer for it.
*/
- { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL },
- { .n = "lcdck", .p = "masterck_div", .id = 3 },
- { .n = "uhpck", .p = "usbck", .id = 6 },
- { .n = "udpck", .p = "usbck", .id = 7 },
- { .n = "pck0", .p = "prog0", .id = 8 },
- { .n = "pck1", .p = "prog1", .id = 9 },
+ { .n = "ddrck", .id = 2, .flags = CLK_IS_CRITICAL },
+ { .n = "lcdck", .id = 3 },
+ { .n = "uhpck", .id = 6 },
+ { .n = "udpck", .id = 7 },
+ { .n = "pck0", .id = 8 },
+ { .n = "pck1", .id = 9 },
};
static const struct clk_pcr_layout at91sam9n12_pcr_layout = {
@@ -111,12 +111,12 @@ static const struct pck at91sam9n12_periphck[] = {
static void __init at91sam9n12_pmc_setup(struct device_node *np)
{
+ struct clk_hw *usbck_hw, *hw, *main_rc_hw, *main_osc_hw;
struct clk_range range = CLK_RANGE(0, 0);
const char *slck_name, *mainxtal_name;
+ struct clk_parent_data parent_data[5];
struct pmc_data *at91sam9n12_pmc;
- const char *parent_names[6];
struct regmap *regmap;
- struct clk_hw *hw;
int i;
bool bypass;
@@ -140,50 +140,53 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np)
if (!at91sam9n12_pmc)
return;
- hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
- 50000000);
- if (IS_ERR(hw))
+ main_rc_hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
+ 50000000);
+ if (IS_ERR(main_rc_hw))
goto err_free;
bypass = of_property_read_bool(np, "atmel,osc-bypass");
- hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
- bypass);
- if (IS_ERR(hw))
+ main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL,
+ &AT91_CLK_PD_NAME(mainxtal_name),
+ bypass);
+ if (IS_ERR(main_osc_hw))
goto err_free;
- parent_names[0] = "main_rc_osc";
- parent_names[1] = "main_osc";
- hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2);
+ parent_data[0] = AT91_CLK_PD_HW(main_rc_hw);
+ parent_data[1] = AT91_CLK_PD_HW(main_osc_hw);
+ hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_data, 2);
if (IS_ERR(hw))
goto err_free;
at91sam9n12_pmc->chws[PMC_MAIN] = hw;
- hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
+ hw = at91_clk_register_pll(regmap, "pllack", NULL,
+ &AT91_CLK_PD_HW(at91sam9n12_pmc->chws[PMC_MAIN]), 0,
&at91rm9200_pll_layout, &plla_characteristics);
if (IS_ERR(hw))
goto err_free;
- hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack", NULL);
+ hw = at91_clk_register_plldiv(regmap, "plladivck", NULL, &AT91_CLK_PD_HW(hw));
if (IS_ERR(hw))
goto err_free;
at91sam9n12_pmc->chws[PMC_PLLACK] = hw;
- hw = at91_clk_register_pll(regmap, "pllbck", "mainck", NULL, 1,
+ hw = at91_clk_register_pll(regmap, "pllbck", NULL,
+ &AT91_CLK_PD_HW(at91sam9n12_pmc->chws[PMC_MAIN]), 1,
&at91rm9200_pll_layout, &pllb_characteristics);
if (IS_ERR(hw))
goto err_free;
at91sam9n12_pmc->chws[PMC_PLLBCK] = hw;
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "plladivck";
- parent_names[3] = "pllbck";
+ parent_data[0] = AT91_CLK_PD_NAME(slck_name);
+ parent_data[1] = AT91_CLK_PD_HW(at91sam9n12_pmc->chws[PMC_MAIN]);
+ parent_data[2] = AT91_CLK_PD_HW(at91sam9n12_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(at91sam9n12_pmc->chws[PMC_PLLBCK]);
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
- parent_names, NULL,
+ NULL, parent_data,
&at91sam9x5_master_layout,
&mck_characteristics,
&at91sam9n12_mck_lock);
@@ -191,7 +194,7 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np)
goto err_free;
hw = at91_clk_register_master_div(regmap, "masterck_div",
- "masterck_pres", NULL,
+ NULL, &AT91_CLK_PD_HW(hw),
&at91sam9x5_master_layout,
&mck_characteristics,
&at91sam9n12_mck_lock,
@@ -201,22 +204,23 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np)
at91sam9n12_pmc->chws[PMC_MCK] = hw;
- hw = at91sam9n12_clk_register_usb(regmap, "usbck", "pllbck", NULL);
- if (IS_ERR(hw))
+ usbck_hw = at91sam9n12_clk_register_usb(regmap, "usbck", NULL,
+ &AT91_CLK_PD_HW(at91sam9n12_pmc->chws[PMC_PLLBCK]));
+ if (IS_ERR(usbck_hw))
goto err_free;
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "plladivck";
- parent_names[3] = "pllbck";
- parent_names[4] = "masterck_div";
+ parent_data[0] = AT91_CLK_PD_NAME(slck_name);
+ parent_data[1] = AT91_CLK_PD_HW(at91sam9n12_pmc->chws[PMC_MAIN]);
+ parent_data[2] = AT91_CLK_PD_HW(at91sam9n12_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(at91sam9n12_pmc->chws[PMC_PLLBCK]);
+ parent_data[4] = AT91_CLK_PD_HW(at91sam9n12_pmc->chws[PMC_MCK]);
for (i = 0; i < 2; i++) {
char name[6];
snprintf(name, sizeof(name), "prog%d", i);
hw = at91_clk_register_programmable(regmap, name,
- parent_names, NULL, 5, i,
+ NULL, parent_data, 5, i,
&at91sam9x5_programmable_layout,
NULL);
if (IS_ERR(hw))
@@ -225,9 +229,16 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np)
at91sam9n12_pmc->pchws[i] = hw;
}
+ /* Set systemck parent hws. */
+ at91sam9n12_systemck[0].parent_hw = at91sam9n12_pmc->chws[PMC_MCK];
+ at91sam9n12_systemck[1].parent_hw = at91sam9n12_pmc->chws[PMC_MCK];
+ at91sam9n12_systemck[2].parent_hw = usbck_hw;
+ at91sam9n12_systemck[3].parent_hw = usbck_hw;
+ at91sam9n12_systemck[4].parent_hw = at91sam9n12_pmc->pchws[0];
+ at91sam9n12_systemck[5].parent_hw = at91sam9n12_pmc->pchws[1];
for (i = 0; i < ARRAY_SIZE(at91sam9n12_systemck); i++) {
- hw = at91_clk_register_system(regmap, at91sam9n12_systemck[i].n,
- at91sam9n12_systemck[i].p, NULL,
+ hw = at91_clk_register_system(regmap, at91sam9n12_systemck[i].n, NULL,
+ &AT91_CLK_PD_HW(at91sam9n12_systemck[i].parent_hw),
at91sam9n12_systemck[i].id,
at91sam9n12_systemck[i].flags);
if (IS_ERR(hw))
@@ -240,7 +251,8 @@ static void __init at91sam9n12_pmc_setup(struct device_node *np)
hw = at91_clk_register_sam9x5_peripheral(regmap, &pmc_pcr_lock,
&at91sam9n12_pcr_layout,
at91sam9n12_periphck[i].n,
- "masterck_div", NULL,
+ NULL,
+ &AT91_CLK_PD_HW(at91sam9n12_pmc->chws[PMC_MCK]),
at91sam9n12_periphck[i].id,
&range, INT_MIN, 0);
if (IS_ERR(hw))
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* [PATCH v4 31/31] clk: at91: at91sam9rl: switch to clk_parent_data
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
` (29 preceding siblings ...)
2025-09-18 21:16 ` [PATCH v4 30/31] clk: at91: at91sam9n12: " Ryan.Wanner
@ 2025-09-18 21:16 ` Ryan.Wanner
30 siblings, 0 replies; 54+ messages in thread
From: Ryan.Wanner @ 2025-09-18 21:16 UTC (permalink / raw)
To: mturquette, sboyd, alexandre.belloni, claudiu.beznea,
nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Switch AT91SAM9RL clocks to use parent_hw and parent_data. Having
parent_hw instead of parent names improves to clock registration
speed and re-parenting.
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
---
drivers/clk/at91/at91sam9rl.c | 49 +++++++++++++++++++----------------
1 file changed, 26 insertions(+), 23 deletions(-)
diff --git a/drivers/clk/at91/at91sam9rl.c b/drivers/clk/at91/at91sam9rl.c
index 0e8657aac491..a5cc0c1ed194 100644
--- a/drivers/clk/at91/at91sam9rl.c
+++ b/drivers/clk/at91/at91sam9rl.c
@@ -28,13 +28,12 @@ static const struct clk_pll_characteristics sam9rl_plla_characteristics = {
.out = sam9rl_plla_out,
};
-static const struct {
+static struct {
char *n;
- char *p;
u8 id;
} at91sam9rl_systemck[] = {
- { .n = "pck0", .p = "prog0", .id = 8 },
- { .n = "pck1", .p = "prog1", .id = 9 },
+ { .n = "pck0", .id = 8 },
+ { .n = "pck1", .id = 9 },
};
static const struct {
@@ -68,8 +67,8 @@ static const struct {
static void __init at91sam9rl_pmc_setup(struct device_node *np)
{
const char *slck_name, *mainxtal_name;
+ struct clk_parent_data parent_data[6];
struct pmc_data *at91sam9rl_pmc;
- const char *parent_names[6];
struct regmap *regmap;
struct clk_hw *hw;
int i;
@@ -95,13 +94,15 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
if (!at91sam9rl_pmc)
return;
- hw = at91_clk_register_rm9200_main(regmap, "mainck", mainxtal_name, NULL);
+ hw = at91_clk_register_rm9200_main(regmap, "mainck", NULL,
+ &AT91_CLK_PD_NAME(mainxtal_name));
if (IS_ERR(hw))
goto err_free;
at91sam9rl_pmc->chws[PMC_MAIN] = hw;
- hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
+ hw = at91_clk_register_pll(regmap, "pllack", NULL,
+ &AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_MAIN]), 0,
&at91rm9200_pll_layout,
&sam9rl_plla_characteristics);
if (IS_ERR(hw))
@@ -109,18 +110,19 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
at91sam9rl_pmc->chws[PMC_PLLACK] = hw;
- hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL);
+ hw = at91_clk_register_utmi(regmap, NULL, "utmick", NULL,
+ &AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_MAIN]));
if (IS_ERR(hw))
goto err_free;
at91sam9rl_pmc->chws[PMC_UTMI] = hw;
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "pllack";
- parent_names[3] = "utmick";
+ parent_data[0] = AT91_CLK_PD_NAME(slck_name);
+ parent_data[1] = AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_MAIN]);
+ parent_data[2] = AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_UTMI]);
hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
- parent_names, NULL,
+ NULL, parent_data,
&at91rm9200_master_layout,
&sam9rl_mck_characteristics,
&sam9rl_mck_lock);
@@ -128,7 +130,7 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
goto err_free;
hw = at91_clk_register_master_div(regmap, "masterck_div",
- "masterck_pres", NULL,
+ NULL, &AT91_CLK_PD_HW(hw),
&at91rm9200_master_layout,
&sam9rl_mck_characteristics,
&sam9rl_mck_lock, CLK_SET_RATE_GATE, 0);
@@ -137,18 +139,18 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
at91sam9rl_pmc->chws[PMC_MCK] = hw;
- parent_names[0] = slck_name;
- parent_names[1] = "mainck";
- parent_names[2] = "pllack";
- parent_names[3] = "utmick";
- parent_names[4] = "masterck_div";
+ parent_data[0] = AT91_CLK_PD_NAME(slck_name);
+ parent_data[1] = AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_MAIN]);
+ parent_data[2] = AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_PLLACK]);
+ parent_data[3] = AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_UTMI]);
+ parent_data[4] = AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_MCK]);
for (i = 0; i < 2; i++) {
char name[6];
snprintf(name, sizeof(name), "prog%d", i);
hw = at91_clk_register_programmable(regmap, name,
- parent_names, NULL, 5, i,
+ NULL, parent_data, 5, i,
&at91rm9200_programmable_layout,
NULL);
if (IS_ERR(hw))
@@ -158,8 +160,8 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
}
for (i = 0; i < ARRAY_SIZE(at91sam9rl_systemck); i++) {
- hw = at91_clk_register_system(regmap, at91sam9rl_systemck[i].n,
- at91sam9rl_systemck[i].p, NULL,
+ hw = at91_clk_register_system(regmap, at91sam9rl_systemck[i].n, NULL,
+ &AT91_CLK_PD_HW(at91sam9rl_pmc->pchws[0]),
at91sam9rl_systemck[i].id, 0);
if (IS_ERR(hw))
goto err_free;
@@ -170,7 +172,8 @@ static void __init at91sam9rl_pmc_setup(struct device_node *np)
for (i = 0; i < ARRAY_SIZE(at91sam9rl_periphck); i++) {
hw = at91_clk_register_peripheral(regmap,
at91sam9rl_periphck[i].n,
- "masterck_div", NULL,
+ NULL,
+ &AT91_CLK_PD_HW(at91sam9rl_pmc->chws[PMC_MCK]),
at91sam9rl_periphck[i].id);
if (IS_ERR(hw))
goto err_free;
--
2.43.0
^ permalink raw reply related [flat|nested] 54+ messages in thread
* Re: [PATCH v4 17/31] clk: at91: clk-h32mx: add support for parent_hw
2025-09-18 21:15 ` [PATCH v4 17/31] clk: at91: clk-h32mx: " Ryan.Wanner
@ 2025-10-20 19:12 ` Claudiu Beznea
0 siblings, 0 replies; 54+ messages in thread
From: Claudiu Beznea @ 2025-10-20 19:12 UTC (permalink / raw)
To: Ryan.Wanner, mturquette, sboyd, alexandre.belloni, nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
Hi, Ryan,
On 9/19/25 00:15, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>
> Add support for parent_hw in h32mx clock driver.
s/parent_hw/parent_data. Same for the patch title. And the above paragraph
should be updated accordingly.
The rest LGTM.
> With this parent-child relation is described with pointers rather
> than strings making registration a bit faster.
>
> All the SoC based drivers that rely on clk-h32mx were adapted
> to the new API change. The switch itself for SoCs will be done
> in subsequent patches.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
> drivers/clk/at91/clk-h32mx.c | 11 +++++++----
> drivers/clk/at91/dt-compat.c | 2 +-
> drivers/clk/at91/pmc.h | 2 +-
> drivers/clk/at91/sama5d2.c | 2 +-
> drivers/clk/at91/sama5d4.c | 2 +-
> 5 files changed, 11 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/clk/at91/clk-h32mx.c b/drivers/clk/at91/clk-h32mx.c
> index 1e6c12eeda10..4b709f9bd831 100644
> --- a/drivers/clk/at91/clk-h32mx.c
> +++ b/drivers/clk/at91/clk-h32mx.c
> @@ -83,10 +83,10 @@ static const struct clk_ops h32mx_ops = {
>
> struct clk_hw * __init
> at91_clk_register_h32mx(struct regmap *regmap, const char *name,
> - const char *parent_name)
> + const char *parent_name, struct clk_parent_data *parent_data)
> {
> struct clk_sama5d4_h32mx *h32mxclk;
> - struct clk_init_data init;
> + struct clk_init_data init = {};
> int ret;
>
> h32mxclk = kzalloc(sizeof(*h32mxclk), GFP_KERNEL);
> @@ -95,8 +95,11 @@ at91_clk_register_h32mx(struct regmap *regmap, const char *name,
>
> init.name = name;
> init.ops = &h32mx_ops;
> - init.parent_names = parent_name ? &parent_name : NULL;
> - init.num_parents = parent_name ? 1 : 0;
> + if (parent_data)
> + init.parent_data = (const struct clk_parent_data *)parent_data;
> + else
> + init.parent_names = &parent_name;
> + init.num_parents = 1;
> init.flags = CLK_SET_RATE_GATE;
>
> h32mxclk->hw.init = &init;
> diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c
> index 3285e3110b58..ccdeba3a1130 100644
> --- a/drivers/clk/at91/dt-compat.c
> +++ b/drivers/clk/at91/dt-compat.c
> @@ -201,7 +201,7 @@ static void __init of_sama5d4_clk_h32mx_setup(struct device_node *np)
>
> parent_name = of_clk_get_parent_name(np, 0);
>
> - hw = at91_clk_register_h32mx(regmap, name, parent_name);
> + hw = at91_clk_register_h32mx(regmap, name, parent_name, NULL);
> if (IS_ERR(hw))
> return;
>
> diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
> index db067177e6ef..64faaa8123c9 100644
> --- a/drivers/clk/at91/pmc.h
> +++ b/drivers/clk/at91/pmc.h
> @@ -180,7 +180,7 @@ at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock,
>
> struct clk_hw * __init
> at91_clk_register_h32mx(struct regmap *regmap, const char *name,
> - const char *parent_name);
> + const char *parent_name, struct clk_parent_data *parent_data);
>
> struct clk_hw * __init
> at91_clk_i2s_mux_register(struct regmap *regmap, const char *name,
> diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c
> index 7904f2122ed7..8c7ff0108b41 100644
> --- a/drivers/clk/at91/sama5d2.c
> +++ b/drivers/clk/at91/sama5d2.c
> @@ -276,7 +276,7 @@ static void __init sama5d2_pmc_setup(struct device_node *np)
>
> sama5d2_pmc->chws[PMC_MCK] = hw;
>
> - hw = at91_clk_register_h32mx(regmap, "h32mxck", "masterck_div");
> + hw = at91_clk_register_h32mx(regmap, "h32mxck", "masterck_div", NULL);
> if (IS_ERR(hw))
> goto err_free;
>
> diff --git a/drivers/clk/at91/sama5d4.c b/drivers/clk/at91/sama5d4.c
> index 7cda8032653e..04c848cd7001 100644
> --- a/drivers/clk/at91/sama5d4.c
> +++ b/drivers/clk/at91/sama5d4.c
> @@ -214,7 +214,7 @@ static void __init sama5d4_pmc_setup(struct device_node *np)
>
> sama5d4_pmc->chws[PMC_MCK] = hw;
>
> - hw = at91_clk_register_h32mx(regmap, "h32mxck", "masterck_div");
> + hw = at91_clk_register_h32mx(regmap, "h32mxck", "masterck_div", NULL);
> if (IS_ERR(hw))
> goto err_free;
>
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 16/31] clk: at91: clk-plldiv: add support for parent_hw
2025-09-18 21:15 ` [PATCH v4 16/31] clk: at91: clk-plldiv: " Ryan.Wanner
@ 2025-10-20 19:12 ` Claudiu Beznea
0 siblings, 0 replies; 54+ messages in thread
From: Claudiu Beznea @ 2025-10-20 19:12 UTC (permalink / raw)
To: Ryan.Wanner, mturquette, sboyd, alexandre.belloni, nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
Hi, Ryan,
On 9/19/25 00:15, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>
> Add support for parent_hw in plldiv clock driver.
s/parent_hw/parent_data. Same for the patch title.
> With this parent-child relation is described with pointers rather
> than strings making registration a bit faster.
>
> All the SoC based drivers that rely on clk-plldiv were adapted
> to the new API change. The switch itself for SoCs will be done
> in subsequent patches.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 18/31] clk: at91: clk-i2s-mux: add support for parent_hw
2025-09-18 21:16 ` [PATCH v4 18/31] clk: at91: clk-i2s-mux: " Ryan.Wanner
@ 2025-10-20 19:13 ` Claudiu Beznea
0 siblings, 0 replies; 54+ messages in thread
From: Claudiu Beznea @ 2025-10-20 19:13 UTC (permalink / raw)
To: Ryan.Wanner, mturquette, sboyd, alexandre.belloni, nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
On 9/19/25 00:16, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>
> Add support for parent_hw in i2s mux clock driver.
s/parent_hw/parent_data. Same for the patch title.
> With this parent-child relation is described with pointers rather
> than strings making registration a bit faster.
>
> All the SoC based drivers that rely on clk-i2s-mux were adapted
> to the new API change. The switch itself for SoCs will be done
> in subsequent patches.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 13/31] clk: at91: sama7d65: switch to parent_hw and parent_data
2025-09-18 21:15 ` [PATCH v4 13/31] clk: at91: sama7d65: switch to parent_hw and parent_data Ryan.Wanner
@ 2025-10-20 19:14 ` Claudiu Beznea
0 siblings, 0 replies; 54+ messages in thread
From: Claudiu Beznea @ 2025-10-20 19:14 UTC (permalink / raw)
To: Ryan.Wanner, mturquette, sboyd, alexandre.belloni, nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
Hi, Ryan,
In title: s/switch/switch system clocks"
On 9/19/25 00:15, Ryan.Wanner@microchip.com wrote:
> From: Ryan Wanner <Ryan.Wanner@microchip.com>
>
> Switch the system clocks to use parent_hw and parent_data. Having this
> allows the driver to conform to the new clk-system API.
>
> The parent registration is after the USBCK registration due to one of
> the system clocks being dependent on USBCK.
>
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
> drivers/clk/at91/sama7d65.c | 36 +++++++++++++++++++++++-------------
> 1 file changed, 23 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
> index 986e8ef57dea..38c44b5d5d42 100644
> --- a/drivers/clk/at91/sama7d65.c
> +++ b/drivers/clk/at91/sama7d65.c
> @@ -537,23 +537,23 @@ static struct {
> /*
> * System clock description
> * @n: clock name
> - * @p: clock parent name
> + * @p: clock parent hw
> * @id: clock id
> */
> -static const struct {
> +static struct {
> const char *n;
> - const char *p;
> + struct clk_hw *parent_hw;
> u8 id;
> } sama7d65_systemck[] = {
> - { .n = "uhpck", .p = "usbck", .id = 6 },
> - { .n = "pck0", .p = "prog0", .id = 8, },
> - { .n = "pck1", .p = "prog1", .id = 9, },
> - { .n = "pck2", .p = "prog2", .id = 10, },
> - { .n = "pck3", .p = "prog3", .id = 11, },
> - { .n = "pck4", .p = "prog4", .id = 12, },
> - { .n = "pck5", .p = "prog5", .id = 13, },
> - { .n = "pck6", .p = "prog6", .id = 14, },
> - { .n = "pck7", .p = "prog7", .id = 15, },
> + { .n = "uhpck", .id = 6 },
> + { .n = "pck0", .id = 8, },
> + { .n = "pck1", .id = 9, },
> + { .n = "pck2", .id = 10, },
> + { .n = "pck3", .id = 11, },
> + { .n = "pck4", .id = 12, },
> + { .n = "pck5", .id = 13, },
> + { .n = "pck6", .id = 14, },
> + { .n = "pck7", .id = 15, },
> };
>
> /* Mux table for programmable clocks. */
> @@ -1299,9 +1299,19 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
> sama7d65_pmc->pchws[i] = hw;
> }
>
> + /* Set systemck parent hws. */
> + sama7d65_systemck[0].parent_hw = usbck_hw;
> + sama7d65_systemck[1].parent_hw = sama7d65_pmc->pchws[0];
> + sama7d65_systemck[2].parent_hw = sama7d65_pmc->pchws[1];
> + sama7d65_systemck[3].parent_hw = sama7d65_pmc->pchws[2];
> + sama7d65_systemck[4].parent_hw = sama7d65_pmc->pchws[3];
> + sama7d65_systemck[5].parent_hw = sama7d65_pmc->pchws[4];
> + sama7d65_systemck[6].parent_hw = sama7d65_pmc->pchws[5];
> + sama7d65_systemck[7].parent_hw = sama7d65_pmc->pchws[6];
> + sama7d65_systemck[8].parent_hw = sama7d65_pmc->pchws[7];
> for (i = 0; i < ARRAY_SIZE(sama7d65_systemck); i++) {
> hw = at91_clk_register_system(regmap, sama7d65_systemck[i].n,
> - sama7d65_systemck[i].p, NULL,
> + NULL, &AT91_CLK_PD_HW(sama7d65_systemck[i].parent_hw),
> sama7d65_systemck[i].id, 0);
Just saying: we could have been used parent_hw only for system clocks (and
some other clocks updated in this series) if we wouldn't have the dt-compat.c.
> if (IS_ERR(hw))
> goto err_free;
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 19/31] clk: at91: clk-smd: add support for clk_parent_data
2025-09-18 21:16 ` [PATCH v4 19/31] clk: at91: clk-smd: add support for clk_parent_data Ryan.Wanner
@ 2025-10-20 19:14 ` Claudiu Beznea
0 siblings, 0 replies; 54+ messages in thread
From: Claudiu Beznea @ 2025-10-20 19:14 UTC (permalink / raw)
To: Ryan.Wanner, mturquette, sboyd, alexandre.belloni, nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
Hi, Ryan,
On 9/19/25 00:16, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>
> Add support for parent_hw in smd clock drivers.
s/parent_hw/parent_data
> With this parent-child relation is described with pointers rather
> than strings making registration a bit faster.
>
> All the SoC based drivers that rely on clk-smd were adapted
> to the new API change. The switch itself for SoCs will be done
> in subsequent patches.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
>
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 21/31] clk: at91: dt-compat: switch to parent_hw and parent_data
2025-09-18 21:16 ` [PATCH v4 21/31] clk: at91: dt-compat: switch to parent_hw and parent_data Ryan.Wanner
@ 2025-10-20 19:15 ` Claudiu Beznea
0 siblings, 0 replies; 54+ messages in thread
From: Claudiu Beznea @ 2025-10-20 19:15 UTC (permalink / raw)
To: Ryan.Wanner, mturquette, sboyd, alexandre.belloni, nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
Hi, Ryan,
On 9/19/25 00:16, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>
> Switch old dt-compat clocks to use parent_hw and parent_data. Having
> parent_hw instead of parent names improves to clock registration
> speed and re-parenting.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
> drivers/clk/at91/dt-compat.c | 80 +++++++++++++++++++++++++-----------
> 1 file changed, 56 insertions(+), 24 deletions(-)
>
> diff --git a/drivers/clk/at91/dt-compat.c b/drivers/clk/at91/dt-compat.c
> index fa8658d3be7b..9ca871b817e0 100644
> --- a/drivers/clk/at91/dt-compat.c
> +++ b/drivers/clk/at91/dt-compat.c
> @@ -43,7 +43,8 @@ static void __init of_sama5d2_clk_audio_pll_frac_setup(struct device_node *np)
>
> parent_name = of_clk_get_parent_name(np, 0);
>
> - hw = at91_clk_register_audio_pll_frac(regmap, name, parent_name, NULL);
> + hw = at91_clk_register_audio_pll_frac(regmap, name, NULL,
> + &AT91_CLK_PD_NAME(parent_name));
> if (IS_ERR(hw))
> return;
>
> @@ -69,7 +70,8 @@ static void __init of_sama5d2_clk_audio_pll_pad_setup(struct device_node *np)
>
> parent_name = of_clk_get_parent_name(np, 0);
>
> - hw = at91_clk_register_audio_pll_pad(regmap, name, parent_name, NULL);
> + hw = at91_clk_register_audio_pll_pad(regmap, name, NULL,
> + &AT91_CLK_PD_NAME(parent_name));
> if (IS_ERR(hw))
> return;
>
> @@ -95,7 +97,7 @@ static void __init of_sama5d2_clk_audio_pll_pmc_setup(struct device_node *np)
>
> parent_name = of_clk_get_parent_name(np, 0);
>
> - hw = at91_clk_register_audio_pll_pmc(regmap, name, parent_name, NULL);
> + hw = at91_clk_register_audio_pll_pmc(regmap, name, NULL, &AT91_CLK_PD_NAME(parent_name));
> if (IS_ERR(hw))
> return;
>
> @@ -129,6 +131,7 @@ static void __init of_sama5d2_clk_generated_setup(struct device_node *np)
> struct clk_hw *hw;
> unsigned int num_parents;
> const char *parent_names[GENERATED_SOURCE_MAX];
> + struct clk_parent_data parent_data[GENERATED_SOURCE_MAX];
> struct device_node *gcknp, *parent_np;
> struct clk_range range = CLK_RANGE(0, 0);
> struct regmap *regmap;
> @@ -149,6 +152,8 @@ static void __init of_sama5d2_clk_generated_setup(struct device_node *np)
> if (IS_ERR(regmap))
> return;
>
> + for (unsigned int i = 0; i < num_parents; i++)
> + parent_data[i] = AT91_CLK_PD_NAME(parent_names[i]);
> for_each_child_of_node(np, gcknp) {
> int chg_pid = INT_MIN;
>
> @@ -171,7 +176,7 @@ static void __init of_sama5d2_clk_generated_setup(struct device_node *np)
>
> hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,
> &dt_pcr_layout, name,
> - parent_names, NULL, NULL,
> + NULL, parent_data, NULL,
> num_parents, id, &range,
> chg_pid);
> if (IS_ERR(hw))
> @@ -201,7 +206,7 @@ static void __init of_sama5d4_clk_h32mx_setup(struct device_node *np)
>
> parent_name = of_clk_get_parent_name(np, 0);
>
> - hw = at91_clk_register_h32mx(regmap, name, parent_name, NULL);
> + hw = at91_clk_register_h32mx(regmap, name, NULL, &AT91_CLK_PD_NAME(parent_name));
> if (IS_ERR(hw))
> return;
>
> @@ -228,6 +233,8 @@ static void __init of_sama5d2_clk_i2s_mux_setup(struct device_node *np)
> return;
>
> for_each_child_of_node(np, i2s_mux_np) {
> + struct clk_parent_data parent_data[2];
> +
> if (of_property_read_u8(i2s_mux_np, "reg", &bus_id))
> continue;
>
> @@ -238,8 +245,10 @@ static void __init of_sama5d2_clk_i2s_mux_setup(struct device_node *np)
> if (ret != 2)
> continue;
>
> + parent_data[0] = AT91_CLK_PD_NAME(parent_names[0]);
> + parent_data[1] = AT91_CLK_PD_NAME(parent_names[1]);
> hw = at91_clk_i2s_mux_register(regmap_sfr, i2s_mux_np->name,
> - parent_names, NULL, 2, bus_id);
> + NULL, parent_data, 2, bus_id);
> if (IS_ERR(hw))
> continue;
>
> @@ -269,7 +278,8 @@ static void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np)
> if (IS_ERR(regmap))
> return;
>
> - hw = at91_clk_register_main_osc(regmap, name, parent_name, NULL, bypass);
> + hw = at91_clk_register_main_osc(regmap, name, NULL,
> + &AT91_CLK_PD_NAME(parent_name), bypass);
> if (IS_ERR(hw))
> return;
>
> @@ -323,7 +333,7 @@ static void __init of_at91rm9200_clk_main_setup(struct device_node *np)
> if (IS_ERR(regmap))
> return;
>
> - hw = at91_clk_register_rm9200_main(regmap, name, parent_name, NULL);
> + hw = at91_clk_register_rm9200_main(regmap, name, NULL, &AT91_CLK_PD_NAME(parent_name));
> if (IS_ERR(hw))
> return;
>
> @@ -336,6 +346,7 @@ static void __init of_at91sam9x5_clk_main_setup(struct device_node *np)
> {
> struct clk_hw *hw;
> const char *parent_names[2];
> + struct clk_parent_data parent_data[2];
> unsigned int num_parents;
> const char *name = np->name;
> struct regmap *regmap;
> @@ -354,7 +365,9 @@ static void __init of_at91sam9x5_clk_main_setup(struct device_node *np)
>
> of_property_read_string(np, "clock-output-names", &name);
>
> - hw = at91_clk_register_sam9x5_main(regmap, name, parent_names, NULL,
> + parent_data[0] = AT91_CLK_PD_NAME(parent_names[0]);
> + parent_data[1] = AT91_CLK_PD_NAME(parent_names[1]);
> + hw = at91_clk_register_sam9x5_main(regmap, name, NULL, parent_data,
> num_parents);
> if (IS_ERR(hw))
> return;
> @@ -396,6 +409,7 @@ of_at91_clk_master_setup(struct device_node *np,
> struct clk_hw *hw;
> unsigned int num_parents;
> const char *parent_names[MASTER_SOURCE_MAX];
> + struct clk_parent_data parent_data[MASTER_SOURCE_MAX];
> const char *name = np->name;
> struct clk_master_characteristics *characteristics;
> struct regmap *regmap;
> @@ -419,13 +433,15 @@ of_at91_clk_master_setup(struct device_node *np,
> if (IS_ERR(regmap))
> return;
>
> + for (unsigned int i = 0; i < MASTER_SOURCE_MAX; i++)
> + parent_data[i] = AT91_CLK_PD_NAME(parent_names[i]);
> hw = at91_clk_register_master_pres(regmap, "masterck_pres", num_parents,
> - parent_names, NULL, layout,
> + NULL, parent_data, layout,
> characteristics, &mck_lock);
> if (IS_ERR(hw))
> goto out_free_characteristics;
>
> - hw = at91_clk_register_master_div(regmap, name, "masterck_pres", NULL,
> + hw = at91_clk_register_master_div(regmap, name, NULL, &AT91_CLK_PD_HW(hw),
> layout, characteristics,
> &mck_lock, CLK_SET_RATE_GATE, 0);
Looks like at91_clk_register_master_div() could be kept to use parent_hws
instead of parent_data.
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 11/31] clk: at91: clk-usb: add support for clk_parent_data
2025-09-18 21:15 ` [PATCH v4 11/31] clk: at91: clk-usb: add support for clk_parent_data Ryan.Wanner
@ 2025-10-20 19:17 ` Claudiu Beznea
2025-12-18 16:23 ` Ryan.Wanner
0 siblings, 1 reply; 54+ messages in thread
From: Claudiu Beznea @ 2025-10-20 19:17 UTC (permalink / raw)
To: Ryan.Wanner, mturquette, sboyd, alexandre.belloni, nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
Hi, Ryan,
On 9/19/25 00:15, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>
> Add support for clk_parent_data in usb clock driver.
>
> All the SoC based drivers that rely on clk-usb were adapted
> to the new API change. The switch itself for SoCs will be done
> in subsequent patches.
>
> Remove the use of __clk_get_hw() for the slow clocks.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> [ryan.wanner@microchip: Add SAMA7D65 and SAM9X75 SoCs to the changes.
> Change how the main_xtal and slcks are initialized so they match the
> parent_data API]
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
> drivers/clk/at91/at91rm9200.c | 2 +-
> drivers/clk/at91/at91sam9260.c | 2 +-
> drivers/clk/at91/at91sam9g45.c | 2 +-
> drivers/clk/at91/at91sam9n12.c | 2 +-
> drivers/clk/at91/at91sam9x5.c | 2 +-
> drivers/clk/at91/clk-usb.c | 41 ++++++++++++++++++++++------------
> drivers/clk/at91/dt-compat.c | 6 ++---
> drivers/clk/at91/pmc.h | 11 +++++----
> drivers/clk/at91/sam9x60.c | 2 +-
> drivers/clk/at91/sam9x7.c | 21 +++++++++--------
> drivers/clk/at91/sama5d2.c | 2 +-
> drivers/clk/at91/sama5d3.c | 2 +-
> drivers/clk/at91/sama5d4.c | 2 +-
> drivers/clk/at91/sama7d65.c | 24 +++++++++++---------
> 14 files changed, 72 insertions(+), 49 deletions(-)
>
[ ... ]
> @@ -882,10 +885,10 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
>
> sam9x7_pmc->chws[PMC_MCK] = hw;
>
> - parent_names[0] = "plla_divpmcck";
> - parent_names[1] = "upll_divpmcck";
> - parent_names[2] = "main_osc";
> - usbck_hw = sam9x60_clk_register_usb(regmap, "usbck", parent_names, 3);
> + parent_data[0] = AT91_CLK_PD_HW(sam9x7_plls[PLL_ID_PLLA][PLL_COMPID_DIV0].hw);
> + parent_data[1] = AT91_CLK_PD_HW(sam9x7_plls[PLL_ID_UPLL][PLL_COMPID_DIV0].hw);
> + parent_data[2] = AT91_CLK_PD_HW(main_osc_hw);
> + usbck_hw = sam9x60_clk_register_usb(regmap, "usbck", NULL, parent_data, 3);
sam9x60_clk_register_usb() could be converted to use parent_hws member of
struct clk_init_data instead of parent_data.
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 20/31] clk: at91: clk-slow: add support for parent_hw
2025-09-18 21:16 ` [PATCH v4 20/31] clk: at91: clk-slow: add support for parent_hw Ryan.Wanner
@ 2025-10-20 19:17 ` Claudiu Beznea
0 siblings, 0 replies; 54+ messages in thread
From: Claudiu Beznea @ 2025-10-20 19:17 UTC (permalink / raw)
To: Ryan.Wanner, mturquette, sboyd, alexandre.belloni, nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
On 9/19/25 00:16, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>
> Add support for parent_hw in slow clock drivers. With this parent-child
s/parent_hw/parent_data
> relation is described with pointers rather than strings making
> registration a bit faster.
>
> All the SoC based drivers that rely on clk-slow were adapted
> to the new API change. The switch itself for SoCs will be done
> in subsequent patches.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 23/31] clk: at91: sama5d2: switch to parent_hw and parent_data
2025-09-18 21:16 ` [PATCH v4 23/31] clk: at91: sama5d2: " Ryan.Wanner
@ 2025-10-20 19:19 ` Claudiu Beznea
0 siblings, 0 replies; 54+ messages in thread
From: Claudiu Beznea @ 2025-10-20 19:19 UTC (permalink / raw)
To: Ryan.Wanner, mturquette, sboyd, alexandre.belloni, nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
Hi, Ryan,
On 9/19/25 00:16, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>
> Switch SAMA5D2 clocks to use parent_hw and parent_data. Having
> parent_hw instead of parent names improves to clock registration
But only a small part of conversion uses parent_hw. Could you please
improve this description? Same for the other patches.
> speed and re-parenting.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> [ryan.wanner@microchip.com: Adjust commit message.]
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
> drivers/clk/at91/sama5d2.c | 157 ++++++++++++++++++++-----------------
> 1 file changed, 85 insertions(+), 72 deletions(-)
>
> diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c
> index f5d6c7a96cf2..231cec1f80e1 100644
> --- a/drivers/clk/at91/sama5d2.c
> +++ b/drivers/clk/at91/sama5d2.c
> @@ -37,9 +37,9 @@ static const struct clk_pcr_layout sama5d2_pcr_layout = {
> .pid_mask = GENMASK(6, 0),
> };
>
> -static const struct {
> +static struct {
> char *n;
> - char *p;
> + struct clk_hw *parent_hw;
> unsigned long flags;
> u8 id;
> } sama5d2_systemck[] = {
> @@ -47,14 +47,14 @@ static const struct {
> * ddrck feeds DDR controller and is enabled by bootloader thus we need
> * to keep it enabled in case there is no Linux consumer for it.
> */
> - { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL },
> - { .n = "lcdck", .p = "masterck_div", .id = 3 },
> - { .n = "uhpck", .p = "usbck", .id = 6 },
> - { .n = "udpck", .p = "usbck", .id = 7 },
> - { .n = "pck0", .p = "prog0", .id = 8 },
> - { .n = "pck1", .p = "prog1", .id = 9 },
> - { .n = "pck2", .p = "prog2", .id = 10 },
> - { .n = "iscck", .p = "masterck_div", .id = 18 },
> + { .n = "ddrck", .id = 2, .flags = CLK_IS_CRITICAL },
> + { .n = "lcdck", .id = 3 },
> + { .n = "uhpck", .id = 6 },
> + { .n = "udpck", .id = 7 },
> + { .n = "pck0", .id = 8 },
> + { .n = "pck1", .id = 9 },
> + { .n = "pck2", .id = 10 },
> + { .n = "iscck", .id = 18 },
> };
>
> static const struct {
> @@ -164,12 +164,12 @@ static const struct clk_programmable_layout sama5d2_programmable_layout = {
>
> static void __init sama5d2_pmc_setup(struct device_node *np)
> {
> + struct clk_hw *hw, *audio_fracck_hw, *usbck_hw, *main_rc_hw, *main_osc_hw;
> + const char *slow_clk_name, *main_xtal_name;
Please specify in the commit description why did you changed the variable
names or keep them as before. Valid for the other patches in this series
where this pattern appears.
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 26/31] clk: at91: at91sam9x5: switch to parent_hw and parent_data
2025-09-18 21:16 ` [PATCH v4 26/31] clk: at91: at91sam9x5: " Ryan.Wanner
@ 2025-10-20 19:19 ` Claudiu Beznea
0 siblings, 0 replies; 54+ messages in thread
From: Claudiu Beznea @ 2025-10-20 19:19 UTC (permalink / raw)
To: Ryan.Wanner, mturquette, sboyd, alexandre.belloni, nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
Hi, Ryan,
On 9/19/25 00:16, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>
> Switch AT91SAM9X5 clocks to use parent_hw and parent_data. Having
> parent_hw instead of parent names improves to clock registration
> speed and re-parenting.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
> drivers/clk/at91/at91sam9x5.c | 108 +++++++++++++++++++---------------
> 1 file changed, 61 insertions(+), 47 deletions(-)
>
> diff --git a/drivers/clk/at91/at91sam9x5.c b/drivers/clk/at91/at91sam9x5.c
> index 13331e015dd7..46d5ea2e6417 100644
> --- a/drivers/clk/at91/at91sam9x5.c
> +++ b/drivers/clk/at91/at91sam9x5.c
> @@ -38,9 +38,9 @@ static const struct clk_pll_characteristics plla_characteristics = {
> .out = plla_out,
> };
>
> -static const struct {
> +static struct {
> char *n;
> - char *p;
> + struct clk_hw *parent_hw;
> unsigned long flags;
> u8 id;
> } at91sam9x5_systemck[] = {
> @@ -48,12 +48,12 @@ static const struct {
> * ddrck feeds DDR controller and is enabled by bootloader thus we need
> * to keep it enabled in case there is no Linux consumer for it.
> */
> - { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL },
> - { .n = "smdck", .p = "smdclk", .id = 4 },
> - { .n = "uhpck", .p = "usbck", .id = 6 },
> - { .n = "udpck", .p = "usbck", .id = 7 },
> - { .n = "pck0", .p = "prog0", .id = 8 },
> - { .n = "pck1", .p = "prog1", .id = 9 },
> + { .n = "ddrck", .id = 2, .flags = CLK_IS_CRITICAL },
> + { .n = "smdck", .id = 4 },
> + { .n = "uhpck", .id = 6 },
> + { .n = "udpck", .id = 7 },
> + { .n = "pck0", .id = 8 },
> + { .n = "pck1", .id = 9 },
> };
>
> static const struct clk_pcr_layout at91sam9x5_pcr_layout = {
> @@ -133,12 +133,13 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
> const struct pck *extra_pcks,
> bool has_lcdck)
> {
> + struct clk_hw *main_rc_hw, *main_osc_hw, *hw;
> struct clk_range range = CLK_RANGE(0, 0);
> const char *slck_name, *mainxtal_name;
> struct pmc_data *at91sam9x5_pmc;
> - const char *parent_names[6];
> + struct clk_parent_data parent_data[6];
> struct regmap *regmap;
> - struct clk_hw *hw;
> + struct clk_hw *smdck_hw, *usbck_hw;
> int i;
> bool bypass;
>
> @@ -162,56 +163,58 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
> if (!at91sam9x5_pmc)
> return;
>
> - hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
> - 50000000);
> - if (IS_ERR(hw))
> + main_rc_hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
> + 50000000);
> + if (IS_ERR(main_rc_hw))
> goto err_free;
>
> bypass = of_property_read_bool(np, "atmel,osc-bypass");
>
> - hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
> - bypass);
> - if (IS_ERR(hw))
> + main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL,
> + &AT91_CLK_PD_NAME(mainxtal_name), bypass);
> + if (IS_ERR(main_osc_hw))
> goto err_free;
>
> - parent_names[0] = "main_rc_osc";
> - parent_names[1] = "main_osc";
> - hw = at91_clk_register_sam9x5_main(regmap, "mainck", parent_names, NULL, 2);
> + parent_data[0] = AT91_CLK_PD_HW(main_rc_hw);
> + parent_data[1] = AT91_CLK_PD_HW(main_osc_hw);
> + hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_data, 2);
> if (IS_ERR(hw))
> goto err_free;
>
> at91sam9x5_pmc->chws[PMC_MAIN] = hw;
>
> - hw = at91_clk_register_pll(regmap, "pllack", "mainck", NULL, 0,
> + hw = at91_clk_register_pll(regmap, "pllack", NULL,
> + &AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_MAIN]), 0,
> &at91rm9200_pll_layout, &plla_characteristics);
> if (IS_ERR(hw))
> goto err_free;
>
> - hw = at91_clk_register_plldiv(regmap, "plladivck", "pllack", NULL);
> + hw = at91_clk_register_plldiv(regmap, "plladivck", NULL, &AT91_CLK_PD_HW(hw));
> if (IS_ERR(hw))
> goto err_free;
>
> at91sam9x5_pmc->chws[PMC_PLLACK] = hw;
>
> - hw = at91_clk_register_utmi(regmap, NULL, "utmick", "mainck", NULL);
> + hw = at91_clk_register_utmi(regmap, NULL, "utmick", NULL,
> + &AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_MAIN]));
> if (IS_ERR(hw))
> goto err_free;
>
> at91sam9x5_pmc->chws[PMC_UTMI] = hw;
>
> - parent_names[0] = slck_name;
> - parent_names[1] = "mainck";
> - parent_names[2] = "plladivck";
> - parent_names[3] = "utmick";
> + parent_data[0] = AT91_CLK_PD_NAME(slck_name);
> + parent_data[1] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_MAIN]);
> + parent_data[2] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_PLLACK]);
> + parent_data[3] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_UTMI]);
> hw = at91_clk_register_master_pres(regmap, "masterck_pres", 4,
> - parent_names, NULL,
> + NULL, parent_data,
> &at91sam9x5_master_layout,
> &mck_characteristics, &mck_lock);
> if (IS_ERR(hw))
> goto err_free;
>
> - hw = at91_clk_register_master_div(regmap, "masterck_div",
> - "masterck_pres", NULL,
> + hw = at91_clk_register_master_div(regmap, "masterck_div", NULL,
> + &AT91_CLK_PD_HW(hw),
> &at91sam9x5_master_layout,
> &mck_characteristics, &mck_lock,
> CLK_SET_RATE_GATE, 0);
> @@ -220,28 +223,30 @@ static void __init at91sam9x5_pmc_setup(struct device_node *np,
>
> at91sam9x5_pmc->chws[PMC_MCK] = hw;
>
> - parent_names[0] = "plladivck";
> - parent_names[1] = "utmick";
> - hw = at91sam9x5_clk_register_usb(regmap, "usbck", parent_names, NULL, 2);
> - if (IS_ERR(hw))
> + parent_data[0] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_PLLACK]);
> + parent_data[1] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_UTMI]);
> + usbck_hw = at91sam9x5_clk_register_usb(regmap, "usbck", NULL, parent_data, 2);
> + if (IS_ERR(usbck_hw))
> goto err_free;
>
> - hw = at91sam9x5_clk_register_smd(regmap, "smdclk", parent_names, NULL, 2);
> - if (IS_ERR(hw))
> + parent_data[0] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_PLLACK]);
> + parent_data[1] = AT91_CLK_PD_HW(at91sam9x5_pmc->chws[PMC_UTMI]);
No need for these. parent_data[] is already filled from the USB clk
registration.
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 28/31] clk: at91: at91sam9260: switch to parent_hw and parent_data
2025-09-18 21:16 ` [PATCH v4 28/31] clk: at91: at91sam9260: " Ryan.Wanner
@ 2025-10-20 19:35 ` Claudiu Beznea
0 siblings, 0 replies; 54+ messages in thread
From: Claudiu Beznea @ 2025-10-20 19:35 UTC (permalink / raw)
To: Ryan.Wanner, mturquette, sboyd, alexandre.belloni, nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
Hi, Ryan,
On 9/19/25 00:16, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>
> Switch AT91SAM92600 clocks to use parent_hw and parent_data. Having
> parent_hw instead of parent names improves to clock registration
> speed and re-parenting.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
> drivers/clk/at91/at91sam9260.c | 120 ++++++++++++++++++---------------
> 1 file changed, 67 insertions(+), 53 deletions(-)
>
> diff --git a/drivers/clk/at91/at91sam9260.c b/drivers/clk/at91/at91sam9260.c
> index 55350331b07e..2ac2a340da2f 100644
> --- a/drivers/clk/at91/at91sam9260.c
> +++ b/drivers/clk/at91/at91sam9260.c
> @@ -9,7 +9,7 @@
>
> struct sck {
> char *n;
> - char *p;
> + struct clk_hw *parent_hw;
> u8 id;
> };
>
> @@ -24,7 +24,7 @@ struct at91sam926x_data {
> const struct clk_pll_layout *pllb_layout;
> const struct clk_pll_characteristics *pllb_characteristics;
> const struct clk_master_characteristics *mck_characteristics;
> - const struct sck *sck;
> + struct sck *sck;
> const struct pck *pck;
> u8 num_sck;
> u8 num_pck;
> @@ -72,11 +72,11 @@ static const struct clk_pll_characteristics sam9260_pllb_characteristics = {
> .out = sam9260_pllb_out,
> };
>
> -static const struct sck at91sam9260_systemck[] = {
> - { .n = "uhpck", .p = "usbck", .id = 6 },
> - { .n = "udpck", .p = "usbck", .id = 7 },
> - { .n = "pck0", .p = "prog0", .id = 8 },
> - { .n = "pck1", .p = "prog1", .id = 9 },
> +static struct sck at91sam9260_systemck[] = {
> + { .n = "uhpck", .id = 6 },
> + { .n = "udpck", .id = 7 },
> + { .n = "pck0", .id = 8 },
> + { .n = "pck1", .id = 9 },
> };
>
> static const struct pck at91sam9260_periphck[] = {
> @@ -213,15 +213,15 @@ static const struct clk_pll_characteristics sam9261_pllb_characteristics = {
> .out = sam9261_pllb_out,
> };
>
> -static const struct sck at91sam9261_systemck[] = {
> - { .n = "uhpck", .p = "usbck", .id = 6 },
> - { .n = "udpck", .p = "usbck", .id = 7 },
> - { .n = "pck0", .p = "prog0", .id = 8 },
> - { .n = "pck1", .p = "prog1", .id = 9 },
> - { .n = "pck2", .p = "prog2", .id = 10 },
> - { .n = "pck3", .p = "prog3", .id = 11 },
> - { .n = "hclk0", .p = "masterck_div", .id = 16 },
> - { .n = "hclk1", .p = "masterck_div", .id = 17 },
> +static struct sck at91sam9261_systemck[] = {
> + { .n = "uhpck", .id = 6 },
> + { .n = "udpck", .id = 7 },
> + { .n = "pck0", .id = 8 },
> + { .n = "pck1", .id = 9 },
> + { .n = "pck2", .id = 10 },
> + { .n = "pck3", .id = 11 },
> + { .n = "hclk0", .id = 16 },
> + { .n = "hclk1", .id = 17 },
> };
>
> static const struct pck at91sam9261_periphck[] = {
> @@ -277,13 +277,13 @@ static const struct clk_pll_characteristics sam9263_pll_characteristics = {
> .out = sam9260_plla_out,
> };
>
> -static const struct sck at91sam9263_systemck[] = {
> - { .n = "uhpck", .p = "usbck", .id = 6 },
> - { .n = "udpck", .p = "usbck", .id = 7 },
> - { .n = "pck0", .p = "prog0", .id = 8 },
> - { .n = "pck1", .p = "prog1", .id = 9 },
> - { .n = "pck2", .p = "prog2", .id = 10 },
> - { .n = "pck3", .p = "prog3", .id = 11 },
> +static struct sck at91sam9263_systemck[] = {
> + { .n = "uhpck", .id = 6 },
> + { .n = "udpck", .id = 7 },
> + { .n = "pck0", .id = 8 },
> + { .n = "pck1", .id = 9 },
> + { .n = "pck2", .id = 10 },
> + { .n = "pck3", .id = 11 },
> };
>
> static const struct pck at91sam9263_periphck[] = {
> @@ -330,12 +330,11 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
> struct at91sam926x_data *data)
> {
> const char *slowxtal_name, *mainxtal_name;
> + struct clk_parent_data parent_data[4];
> struct pmc_data *at91sam9260_pmc;
> u32 usb_div[] = { 1, 2, 4, 0 };
> - const char *parent_names[6];
> - const char *slck_name;
> + struct clk_hw *usbck_hw, *hw;
> struct regmap *regmap;
> - struct clk_hw *hw;
> int i;
> bool bypass;
>
> @@ -363,12 +362,13 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
>
> bypass = of_property_read_bool(np, "atmel,osc-bypass");
>
> - hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL,
> + hw = at91_clk_register_main_osc(regmap, "main_osc", NULL,
> + &AT91_CLK_PD_NAME(mainxtal_name),
> bypass);
> if (IS_ERR(hw))
> goto err_free;
>
> - hw = at91_clk_register_rm9200_main(regmap, "mainck", "main_osc", NULL);
> + hw = at91_clk_register_rm9200_main(regmap, "mainck", NULL, &AT91_CLK_PD_HW(hw));
> if (IS_ERR(hw))
> goto err_free;
>
> @@ -382,20 +382,17 @@ static void __init at91sam926x_pmc_setup(struct device_node *np,
> if (IS_ERR(hw))
> goto err_free;
>
> - parent_names[0] = "slow_rc_osc";
> - parent_names[1] = "slow_xtal";
> - hw = at91_clk_register_sam9260_slow(regmap, "slck",
> - parent_names, NULL, 2);
> + parent_data[0] = AT91_CLK_PD_HW(hw);
> + parent_data[1] = AT91_CLK_PD_NAME(slowxtal_name);
> + hw = at91_clk_register_sam9260_slow(regmap, "slck", NULL, parent_data, 2);
> if (IS_ERR(hw))
> goto err_free;
>
> at91sam9260_pmc->chws[PMC_SLOW] = hw;
> - slck_name = "slck";
> - } else {
> - slck_name = slowxtal_name;
This section here should be kept.
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 03/31] clk: at91: sam9x75: switch to parent_hw and parent_data
2025-09-18 21:15 ` [PATCH v4 03/31] clk: at91: sam9x75: switch to parent_hw and parent_data Ryan.Wanner
@ 2025-10-20 19:38 ` Claudiu Beznea
0 siblings, 0 replies; 54+ messages in thread
From: Claudiu Beznea @ 2025-10-20 19:38 UTC (permalink / raw)
To: Ryan.Wanner, mturquette, sboyd, alexandre.belloni, nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
Hi, Ryan,
On 9/19/25 00:15, Ryan.Wanner@microchip.com wrote:
> From: Ryan Wanner <Ryan.Wanner@microchip.com>
>
> Switch SAM9X75 clocks to use parent_hw and parent_data. Having
> parent_hw instead of parent names improves to clock registration
> speed and re-parenting.
>
> The USBCLK will be updated in subsequent patches that update the clock
> registration functions to use parent_hw and parent_data.
>
> __clk_get_hw() will be removed in subsequent patches in this series.
>
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
> drivers/clk/at91/sam9x7.c | 308 +++++++++++++++++++++-----------------
> 1 file changed, 173 insertions(+), 135 deletions(-)
>
> diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
> index 89868a0aeaba..cb5849da494f 100644
> --- a/drivers/clk/at91/sam9x7.c
> +++ b/drivers/clk/at91/sam9x7.c
> @@ -33,10 +33,22 @@ enum pll_ids {
> PLL_ID_UPLL,
> PLL_ID_AUDIO,
> PLL_ID_LVDS,
> - PLL_ID_PLLA_DIV2,
> PLL_ID_MAX,
> };
>
> +/*
> + * PLL component identifier
> + * @PLL_COMPID_FRAC: Fractional PLL component identifier
> + * @PLL_COMPID_DIV0: 1st PLL divider component identifier
> + * @PLL_COMPID_DIV1: 2nd PLL divider component identifier
> + */
> +enum pll_component_id {
> + PLL_COMPID_FRAC,
> + PLL_COMPID_DIV0,
> + PLL_COMPID_DIV1,
> + PLL_COMPID_MAX,
> +};
> +
> /**
> * enum pll_type - PLL type identifiers
> * @PLL_TYPE_FRAC: fractional PLL identifier
> @@ -185,6 +197,18 @@ static const struct clk_pll_layout pll_divio_layout = {
> .endiv_shift = 30,
> };
>
> +/*
> + * SAM9X7 PLL possible parents
> + * @SAM9X7_PLL_PARENT_MAINCK: MAINCK is PLL a parent
> + * @SAM9X7_PLL_PARENT_MAIN_XTAL: MAIN XTAL is a PLL parent
> + * @SAM9X7_PLL_PARENT_FRACCK: Frac PLL is a PLL parent (for PLL dividers)
> + */
> +enum sam9x7_pll_parent {
> + SAM9X7_PLL_PARENT_MAINCK,
> + SAM9X7_PLL_PARENT_MAIN_XTAL,
> + SAM9X7_PLL_PARENT_FRACCK
> +};
> +
> /*
> * PLL clocks description
> * @n: clock name
> @@ -192,22 +216,24 @@ static const struct clk_pll_layout pll_divio_layout = {
> * @l: clock layout
> * @t: clock type
> * @c: pll characteristics
> + * @hw: pointer to clk_hw
> * @f: clock flags
> * @eid: export index in sam9x7->chws[] array
> */
> -static const struct {
> +static struct {
> const char *n;
> - const char *p;
> const struct clk_pll_layout *l;
> u8 t;
> const struct clk_pll_characteristics *c;
> + struct clk_hw *hw;
> unsigned long f;
> + enum sam9x7_pll_parent p;
> u8 eid;
> -} sam9x7_plls[][3] = {
> +} sam9x7_plls[][PLL_COMPID_MAX] = {
> [PLL_ID_PLLA] = {
> - {
> + [PLL_COMPID_FRAC] = {
> .n = "plla_fracck",
> - .p = "mainck",
> + .p = SAM9X7_PLL_PARENT_MAINCK,
> .l = &plla_frac_layout,
> .t = PLL_TYPE_FRAC,
> /*
> @@ -218,9 +244,9 @@ static const struct {
> .c = &plla_characteristics,
> },
>
> - {
> + [PLL_COMPID_DIV0] = {
> .n = "plla_divpmcck",
> - .p = "plla_fracck",
> + .p = SAM9X7_PLL_PARENT_FRACCK,
> .l = &pll_divpmc_layout,
> .t = PLL_TYPE_DIV,
> /* This feeds CPU. It should not be disabled */
> @@ -228,21 +254,35 @@ static const struct {
> .eid = PMC_PLLACK,
> .c = &plla_characteristics,
> },
> +
> + [PLL_COMPID_DIV1] = {
> + .n = "plla_div2pmcck",
> + .p = SAM9X7_PLL_PARENT_FRACCK,
> + .l = &plladiv2_divpmc_layout,
> + /*
> + * This may feed critical parts of the system like timers.
> + * It should not be disabled.
> + */
> + .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
> + .c = &plladiv2_characteristics,
> + .eid = PMC_PLLADIV2,
> + .t = PLL_TYPE_DIV,
> + },
> },
>
> [PLL_ID_UPLL] = {
> - {
> + [PLL_COMPID_FRAC] = {
> .n = "upll_fracck",
> - .p = "main_osc",
> + .p = SAM9X7_PLL_PARENT_MAIN_XTAL,
> .l = &pll_frac_layout,
> .t = PLL_TYPE_FRAC,
> .f = CLK_SET_RATE_GATE,
> .c = &upll_characteristics,
> },
>
> - {
> + [PLL_COMPID_DIV0] = {
> .n = "upll_divpmcck",
> - .p = "upll_fracck",
> + .p = SAM9X7_PLL_PARENT_FRACCK,
> .l = &pll_divpmc_layout,
> .t = PLL_TYPE_DIV,
> .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
> @@ -253,18 +293,18 @@ static const struct {
> },
>
> [PLL_ID_AUDIO] = {
> - {
> + [PLL_COMPID_FRAC] = {
> .n = "audiopll_fracck",
> - .p = "main_osc",
> + .p = SAM9X7_PLL_PARENT_MAIN_XTAL,
> .l = &pll_frac_layout,
> .f = CLK_SET_RATE_GATE,
> .c = &audiopll_characteristics,
> .t = PLL_TYPE_FRAC,
> },
>
> - {
> + [PLL_COMPID_DIV0] = {
> .n = "audiopll_divpmcck",
> - .p = "audiopll_fracck",
> + .p = SAM9X7_PLL_PARENT_FRACCK,
> .l = &pll_divpmc_layout,
> .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
> CLK_SET_RATE_PARENT,
> @@ -273,9 +313,9 @@ static const struct {
> .t = PLL_TYPE_DIV,
> },
>
> - {
> + [PLL_COMPID_DIV1] = {
> .n = "audiopll_diviock",
> - .p = "audiopll_fracck",
> + .p = SAM9X7_PLL_PARENT_FRACCK,
> .l = &pll_divio_layout,
> .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
> CLK_SET_RATE_PARENT,
> @@ -286,18 +326,18 @@ static const struct {
> },
>
> [PLL_ID_LVDS] = {
> - {
> + [PLL_COMPID_FRAC] = {
> .n = "lvdspll_fracck",
> - .p = "main_osc",
> + .p = SAM9X7_PLL_PARENT_MAIN_XTAL,
> .l = &pll_frac_layout,
> .f = CLK_SET_RATE_GATE,
> .c = &lvdspll_characteristics,
> .t = PLL_TYPE_FRAC,
> },
>
> - {
> + [PLL_COMPID_DIV0] = {
> .n = "lvdspll_divpmcck",
> - .p = "lvdspll_fracck",
> + .p = SAM9X7_PLL_PARENT_FRACCK,
> .l = &pll_divpmc_layout,
> .f = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
> CLK_SET_RATE_PARENT,
> @@ -306,22 +346,6 @@ static const struct {
> .t = PLL_TYPE_DIV,
> },
> },
> -
> - [PLL_ID_PLLA_DIV2] = {
> - {
> - .n = "plla_div2pmcck",
> - .p = "plla_fracck",
> - .l = &plladiv2_divpmc_layout,
> - /*
> - * This may feed critical parts of the system like timers.
> - * It should not be disabled.
> - */
> - .f = CLK_IS_CRITICAL | CLK_SET_RATE_GATE,
> - .c = &plladiv2_characteristics,
> - .eid = PMC_PLLADIV2,
> - .t = PLL_TYPE_DIV,
> - },
> - },
> };
>
> static const struct clk_programmable_layout sam9x7_programmable_layout = {
> @@ -339,9 +363,9 @@ static const struct clk_pcr_layout sam9x7_pcr_layout = {
> .pid_mask = GENMASK(6, 0),
> };
>
> -static const struct {
> +static struct {
> char *n;
> - char *p;
> + struct clk_hw *parent_hw;
> u8 id;
> unsigned long flags;
> } sam9x7_systemck[] = {
> @@ -349,10 +373,10 @@ static const struct {
> * ddrck feeds DDR controller and is enabled by bootloader thus we need
> * to keep it enabled in case there is no Linux consumer for it.
> */
> - { .n = "ddrck", .p = "masterck_div", .id = 2, .flags = CLK_IS_CRITICAL },
> - { .n = "uhpck", .p = "usbck", .id = 6 },
> - { .n = "pck0", .p = "prog0", .id = 8 },
> - { .n = "pck1", .p = "prog1", .id = 9 },
> + { .n = "ddrck", .id = 2, .flags = CLK_IS_CRITICAL },
> + { .n = "uhpck", .id = 6 },
> + { .n = "pck0", .id = 8 },
> + { .n = "pck1", .id = 9 },
> };
>
> /*
> @@ -426,7 +450,8 @@ static const struct {
> /*
> * Generic clock description
> * @n: clock name
> - * @pp: PLL parents
> + * @pp: PLL parents (entry formed by PLL components identifiers
> + * (see enum pll_component_id))
> * @pp_mux_table: PLL parents mux table
> * @r: clock output range
> * @pp_chg_id: id in parent array of changeable PLL parent
> @@ -435,7 +460,10 @@ static const struct {
> */
> static const struct {
> const char *n;
> - const char *pp[8];
> + struct {
> + int pll_id;
> + int pll_compid;
2 tabs here should be enough.
> + } pp[8];
> const char pp_mux_table[8];
> struct clk_range r;
> int pp_chg_id;
> @@ -445,7 +473,7 @@ static const struct {
> {
> .n = "flex0_gclk",
> .id = 5,
> - .pp = { "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 8, },
> .pp_count = 1,
> .pp_chg_id = INT_MIN,
> @@ -454,7 +482,7 @@ static const struct {
> {
> .n = "flex1_gclk",
> .id = 6,
> - .pp = { "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 8, },
> .pp_count = 1,
> .pp_chg_id = INT_MIN,
> @@ -463,7 +491,7 @@ static const struct {
> {
> .n = "flex2_gclk",
> .id = 7,
> - .pp = { "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 8, },
> .pp_count = 1,
> .pp_chg_id = INT_MIN,
> @@ -472,7 +500,7 @@ static const struct {
> {
> .n = "flex3_gclk",
> .id = 8,
> - .pp = { "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 8, },
> .pp_count = 1,
> .pp_chg_id = INT_MIN,
> @@ -481,7 +509,7 @@ static const struct {
> {
> .n = "flex6_gclk",
> .id = 9,
> - .pp = { "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 8, },
> .pp_count = 1,
> .pp_chg_id = INT_MIN,
> @@ -490,7 +518,7 @@ static const struct {
> {
> .n = "flex7_gclk",
> .id = 10,
> - .pp = { "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 8, },
> .pp_count = 1,
> .pp_chg_id = INT_MIN,
> @@ -499,7 +527,7 @@ static const struct {
> {
> .n = "flex8_gclk",
> .id = 11,
> - .pp = { "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 8, },
> .pp_count = 1,
> .pp_chg_id = INT_MIN,
> @@ -509,7 +537,7 @@ static const struct {
> .n = "sdmmc0_gclk",
> .id = 12,
> .r = { .max = 105000000 },
> - .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 6, 8, },
> .pp_count = 2,
> .pp_chg_id = INT_MIN,
> @@ -518,7 +546,7 @@ static const struct {
> {
> .n = "flex4_gclk",
> .id = 13,
> - .pp = { "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 8, },
> .pp_count = 1,
> .pp_chg_id = INT_MIN,
> @@ -527,7 +555,7 @@ static const struct {
> {
> .n = "flex5_gclk",
> .id = 14,
> - .pp = { "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 8, },
> .pp_count = 1,
> .pp_chg_id = INT_MIN,
> @@ -536,7 +564,7 @@ static const struct {
> {
> .n = "flex9_gclk",
> .id = 15,
> - .pp = { "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 8, },
> .pp_count = 1,
> .pp_chg_id = INT_MIN,
> @@ -545,7 +573,7 @@ static const struct {
> {
> .n = "flex10_gclk",
> .id = 16,
> - .pp = { "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 8, },
> .pp_count = 1,
> .pp_chg_id = INT_MIN,
> @@ -554,7 +582,7 @@ static const struct {
> {
> .n = "tcb0_gclk",
> .id = 17,
> - .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 6, 8, },
> .pp_count = 2,
> .pp_chg_id = INT_MIN,
> @@ -563,7 +591,7 @@ static const struct {
> {
> .n = "adc_gclk",
> .id = 19,
> - .pp = { "upll_divpmcck", "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(UPLL, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 5, 8, },
> .pp_count = 2,
> .pp_chg_id = INT_MIN,
> @@ -573,7 +601,7 @@ static const struct {
> .n = "lcd_gclk",
> .id = 25,
> .r = { .max = 75000000 },
> - .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 6, 8, },
> .pp_count = 2,
> .pp_chg_id = INT_MIN,
> @@ -583,7 +611,7 @@ static const struct {
> .n = "sdmmc1_gclk",
> .id = 26,
> .r = { .max = 105000000 },
> - .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 6, 8, },
> .pp_count = 2,
> .pp_chg_id = INT_MIN,
> @@ -593,7 +621,7 @@ static const struct {
> .n = "mcan0_gclk",
> .id = 29,
> .r = { .max = 80000000 },
> - .pp = { "upll_divpmcck", "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(UPLL, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 5, 8, },
> .pp_count = 2,
> .pp_chg_id = INT_MIN,
> @@ -603,7 +631,7 @@ static const struct {
> .n = "mcan1_gclk",
> .id = 30,
> .r = { .max = 80000000 },
> - .pp = { "upll_divpmcck", "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(UPLL, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 5, 8, },
> .pp_count = 2,
> .pp_chg_id = INT_MIN,
> @@ -612,7 +640,7 @@ static const struct {
> {
> .n = "flex11_gclk",
> .id = 32,
> - .pp = { "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 8, },
> .pp_count = 1,
> .pp_chg_id = INT_MIN,
> @@ -621,7 +649,7 @@ static const struct {
> {
> .n = "flex12_gclk",
> .id = 33,
> - .pp = { "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 8, },
> .pp_count = 1,
> .pp_chg_id = INT_MIN,
> @@ -631,7 +659,7 @@ static const struct {
> .n = "i2s_gclk",
> .id = 34,
> .r = { .max = 100000000 },
> - .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 6, 8, },
> .pp_count = 2,
> .pp_chg_id = INT_MIN,
> @@ -641,7 +669,7 @@ static const struct {
> .n = "qspi_gclk",
> .id = 35,
> .r = { .max = 200000000 },
> - .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 6, 8, },
> .pp_count = 2,
> .pp_chg_id = INT_MIN,
> @@ -650,7 +678,7 @@ static const struct {
> {
> .n = "pit64b0_gclk",
> .id = 37,
> - .pp = { "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 8, },
> .pp_count = 1,
> .pp_chg_id = INT_MIN,
> @@ -660,7 +688,7 @@ static const struct {
> .n = "classd_gclk",
> .id = 42,
> .r = { .max = 100000000 },
> - .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 6, 8, },
> .pp_count = 2,
> .pp_chg_id = INT_MIN,
> @@ -669,7 +697,7 @@ static const struct {
> {
> .n = "tcb1_gclk",
> .id = 45,
> - .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 6, 8, },
> .pp_count = 2,
> .pp_chg_id = INT_MIN,
> @@ -678,7 +706,7 @@ static const struct {
> {
> .n = "dbgu_gclk",
> .id = 47,
> - .pp = { "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 8, },
> .pp_count = 1,
> .pp_chg_id = INT_MIN,
> @@ -688,7 +716,7 @@ static const struct {
> .n = "mipiphy_gclk",
> .id = 55,
> .r = { .max = 27000000 },
> - .pp = { "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 8, },
> .pp_count = 1,
> .pp_chg_id = INT_MIN,
> @@ -697,7 +725,7 @@ static const struct {
> {
> .n = "pit64b1_gclk",
> .id = 58,
> - .pp = { "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 8, },
> .pp_count = 1,
> .pp_chg_id = INT_MIN,
> @@ -706,7 +734,7 @@ static const struct {
> {
> .n = "gmac_gclk",
> .id = 67,
> - .pp = { "audiopll_divpmcck", "plla_div2pmcck", },
> + .pp = { PLL_IDS_TO_ARR_ENTRY(AUDIO, DIV0), PLL_IDS_TO_ARR_ENTRY(PLLA, DIV1), },
> .pp_mux_table = { 6, 8, },
> .pp_count = 2,
> .pp_chg_id = INT_MIN,
> @@ -716,33 +744,25 @@ static const struct {
> static void __init sam9x7_pmc_setup(struct device_node *np)
> {
> struct clk_range range = CLK_RANGE(0, 0);
> - const char *td_slck_name, *md_slck_name, *mainxtal_name;
> + const char *main_xtal_name;
> struct pmc_data *sam9x7_pmc;
> const char *parent_names[9];
> void **clk_mux_buffer = NULL;
> int clk_mux_buffer_size = 0;
> - struct clk_hw *main_osc_hw;
> struct regmap *regmap;
> - struct clk_hw *hw;
> + struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
> + struct clk_hw *td_slck_hw, *md_slck_hw, *usbck_hw;
> + struct clk_hw *parent_hws[9];
> int i, j;
>
> - i = of_property_match_string(np, "clock-names", "td_slck");
> - if (i < 0)
> - return;
> -
> - td_slck_name = of_clk_get_parent_name(np, i);
> -
> - i = of_property_match_string(np, "clock-names", "md_slck");
> - if (i < 0)
> - return;
> -
> - md_slck_name = of_clk_get_parent_name(np, i);
> -
> + td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "td_slck"));
> + md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "md_slck"));
> i = of_property_match_string(np, "clock-names", "main_xtal");
Could you please move this above:
main_xtal_name = of_clk_get_parent_name(np, i);
and have it like:
i = of_property_match_string(np, "clock-names", "main_xtal");
if (i < 0)
return;
mainxtal_name = of_clk_get_parent_name(np, i);
> - if (i < 0)
> +
> + if (!td_slck_hw || !md_slck_hw || !i)
I would keep the checking of i close to of_property_match_string(). Also,
you changed check only zero as invalid value. Is that right?
of_property_match_string() can return negative error numbers as well.
> return;
> - mainxtal_name = of_clk_get_parent_name(np, i);
>
> + main_xtal_name = of_clk_get_parent_name(np, i);
> regmap = device_node_to_regmap(np);
> if (IS_ERR(regmap))
> return;
> @@ -760,26 +780,25 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
> if (!clk_mux_buffer)
> goto err_free;
>
> - hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
> - 50000000);
> - if (IS_ERR(hw))
> + main_rc_hw = at91_clk_register_main_rc_osc(regmap, "main_rc_osc", 12000000,
> + 50000000);
> + if (IS_ERR(main_rc_hw))
> goto err_free;
>
> - hw = at91_clk_register_main_osc(regmap, "main_osc", mainxtal_name, NULL, 0);
> - if (IS_ERR(hw))
> + main_osc_hw = at91_clk_register_main_osc(regmap, "main_osc", NULL, &AT91_CLK_PD_NAME(main_xtal_name), 0);
Could you please add a line break before &AT91_CLK_PD_NAME() ?
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 10/31] clk: at91: clk-generated: use clk_parent_data
2025-09-18 21:15 ` [PATCH v4 10/31] clk: at91: clk-generated: " Ryan.Wanner
@ 2025-10-20 19:39 ` Claudiu Beznea
2025-10-20 19:45 ` Claudiu Beznea
1 sibling, 0 replies; 54+ messages in thread
From: Claudiu Beznea @ 2025-10-20 19:39 UTC (permalink / raw)
To: Ryan.Wanner, mturquette, sboyd, alexandre.belloni, nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
Hi, Ryan,
On 9/19/25 00:15, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>
> Use struct clk_parent_data instead of struct parent_hw as this leads
> to less usage of __clk_get_hw() in SoC specific clock drivers and simpler
> conversion of existing SoC specific clock drivers from parent_names to
> modern clk_parent_data structures.
>
> Remove the last of the usage of __clk_get_hw().
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> [ryan.wanner@microchip.com: Added SAMA7D65 and SAM9X75 SoCs to the
> clk-generated changes. Adjust clk name variable order.]
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
> drivers/clk/at91/clk-generated.c | 8 +++----
> drivers/clk/at91/pmc.h | 2 +-
> drivers/clk/at91/sam9x7.c | 38 ++++++++++++++---------------
> drivers/clk/at91/sama7d65.c | 41 +++++++++++++++++---------------
> drivers/clk/at91/sama7g5.c | 39 ++++++++++++++++--------------
> 5 files changed, 67 insertions(+), 61 deletions(-)
>
[...]
> static void __init sama7d65_pmc_setup(struct device_node *np)
> {
> - const char *main_xtal_name;
> + const char *main_xtal_name, *md_slck_name, *td_slck_name;
> struct pmc_data *sama7d65_pmc;
> const char *parent_names[11];
> void **alloc_mem = NULL;
> int alloc_mem_size = 0;
> struct regmap *regmap;
> struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
> - struct clk_hw *td_slck_hw, *md_slck_hw;
> struct clk_parent_data parent_data[10];
> - struct clk_hw *parent_hws[10];
> bool bypass;
> int i, j;
>
> - td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "td_slck"));
> - md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "md_slck"));
> + i = of_property_match_string(np, "clock-names", "td_slck");
> + if (i < 0)
> + return;
> + td_slck_name = of_clk_get_parent_name(np, i);
> +
> + i = of_property_match_string(np, "clock-names", "md_slck");
> + if (i < 0)
> + return;
> + md_slck_name = of_clk_get_parent_name(np, i);
> +
> i = of_property_match_string(np, "clock-names", "main_xtal");
>
Please drop the resulting empty line here.
> - if (!td_slck_hw || !md_slck_hw || !i)
> + if (i < 0)
> return;
> main_xtal_name = of_clk_get_parent_name(np, i);
>
> @@ -1218,8 +1224,8 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
> sama7d65_pmc->chws[PMC_MCK] = hw;
> sama7d65_mckx[PCK_PARENT_HW_MCK0].hw = hw;
>
> - parent_data[0] = AT91_CLK_PD_NAME("md_slck");
> - parent_data[1] = AT91_CLK_PD_NAME("td_slck");
> + parent_data[0] = AT91_CLK_PD_NAME(md_slck_name);
> + parent_data[1] = AT91_CLK_PD_NAME(td_slck_name);
> parent_data[2] = AT91_CLK_PD_HW(sama7d65_pmc->chws[PMC_MAIN]);
> for (i = PCK_PARENT_HW_MCK1; i < ARRAY_SIZE(sama7d65_mckx); i++) {
> u8 num_parents = 3 + sama7d65_mckx[i].ep_count;
> @@ -1264,8 +1270,8 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
> if (IS_ERR(hw))
> goto err_free;
>
> - parent_data[0] = AT91_CLK_PD_NAME("md_slck");
> - parent_data[1] = AT91_CLK_PD_NAME("td_slck");
> + parent_data[0] = AT91_CLK_PD_NAME(md_slck_name);
> + parent_data[1] = AT91_CLK_PD_NAME(td_slck_name);
> parent_data[2] = AT91_CLK_PD_HW(sama7d65_pmc->chws[PMC_MAIN]);
> parent_data[3] = AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_SYS][PLL_COMPID_DIV0].hw);
> parent_data[4] = AT91_CLK_PD_HW(sama7d65_plls[PLL_ID_DDR][PLL_COMPID_DIV0].hw);
> @@ -1315,13 +1321,12 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
> sama7d65_pmc->phws[sama7d65_periphck[i].id] = hw;
> }
>
> - parent_hws[0] = md_slck_hw;
> - parent_hws[1] = td_slck_hw;
> - parent_hws[2] = sama7d65_pmc->chws[PMC_MAIN];
> - parent_hws[3] = sama7d65_pmc->chws[PMC_MCK1];
> + parent_data[0] = AT91_CLK_PD_NAME(md_slck_name);
> + parent_data[1] = AT91_CLK_PD_NAME(td_slck_name);
> + parent_data[2] = AT91_CLK_PD_HW(sama7d65_pmc->chws[PMC_MAIN]);
> + parent_data[3] = AT91_CLK_PD_HW(sama7d65_pmc->chws[PMC_MCK1]);
> for (i = 0; i < ARRAY_SIZE(sama7d65_gck); i++) {
> u8 num_parents = 4 + sama7d65_gck[i].pp_count;
> - struct clk_hw *tmp_parent_hws[8];
> u32 *mux_table;
>
> mux_table = kmalloc_array(num_parents, sizeof(*mux_table),
> @@ -1338,15 +1343,13 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
> u8 pll_id = sama7d65_gck[i].pp[j].pll_id;
> u8 pll_compid = sama7d65_gck[i].pp[j].pll_compid;
>
> - tmp_parent_hws[j] = sama7d65_plls[pll_id][pll_compid].hw;
> + parent_data[4 + j] = AT91_CLK_PD_HW(sama7d65_plls[pll_id][pll_compid].hw);
> }
> - PMC_FILL_TABLE(&parent_hws[4], tmp_parent_hws,
> - sama7d65_gck[i].pp_count);
>
> hw = at91_clk_register_generated(regmap, &pmc_pcr_lock,
> &sama7d65_pcr_layout,
> sama7d65_gck[i].n, NULL,
> - parent_hws, mux_table,
> + parent_data, mux_table,
> num_parents,
> sama7d65_gck[i].id,
> &sama7d65_gck[i].r,
> diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
> index ddd5ad318990..ddbf69beb495 100644
> --- a/drivers/clk/at91/sama7g5.c
> +++ b/drivers/clk/at91/sama7g5.c
> @@ -971,24 +971,30 @@ static const struct clk_pcr_layout sama7g5_pcr_layout = {
>
> static void __init sama7g5_pmc_setup(struct device_node *np)
> {
> - const char *main_xtal_name;
> + const char *main_xtal_name, *md_slck_name, *td_slck_name;
> struct pmc_data *sama7g5_pmc;
> void **alloc_mem = NULL;
> int alloc_mem_size = 0;
> struct regmap *regmap;
> struct clk_hw *hw, *main_rc_hw, *main_osc_hw;
> - struct clk_hw *td_slck_hw, *md_slck_hw;
> struct clk_parent_data parent_data[10];
> - struct clk_hw *parent_hws[10];
> struct clk *main_xtal;
> bool bypass;
> int i, j;
>
> - td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "td_slck"));
> - md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "md_slck"));
> + i = of_property_match_string(np, "clock-names", "td_slck");
> + if (i < 0)
> + return;
> + td_slck_name = of_clk_get_parent_name(np, i);
> +
> + i = of_property_match_string(np, "clock-names", "md_slck");
> + if (i < 0)
> + return;
> + md_slck_name = of_clk_get_parent_name(np, i);
> +
> i = of_property_match_string(np, "clock-names", "main_xtal");
>
Please drop the resulting empty line here.
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 01/31] clk: at91: pmc: add macros for clk_parent_data
2025-09-18 21:15 ` [PATCH v4 01/31] clk: at91: pmc: add macros for clk_parent_data Ryan.Wanner
@ 2025-10-20 19:40 ` Claudiu Beznea
0 siblings, 0 replies; 54+ messages in thread
From: Claudiu Beznea @ 2025-10-20 19:40 UTC (permalink / raw)
To: Ryan.Wanner, mturquette, sboyd, alexandre.belloni, nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
Hi, Ryan,
On 9/19/25 00:15, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>
> Add helpers to set parent_data objects in platform specific drivers.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> [ryan.wanner@microchip.com: enclose complex macro with parentheses.]
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
> drivers/clk/at91/pmc.h | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
> index 5daa32c4cf25..4a416d227c50 100644
> --- a/drivers/clk/at91/pmc.h
> +++ b/drivers/clk/at91/pmc.h
> @@ -15,6 +15,14 @@
>
> #include <dt-bindings/clock/at91.h>
>
> +#define AT91_CLK_PD_NAME(n) ((struct clk_parent_data){ \
> + .hw = NULL, .name = (n), .fw_name = NULL, .index = -1, \
> +})
> +
> +#define AT91_CLK_PD_HW(h) ((struct clk_parent_data){\
Missing one space here -------------------------------^
> + .hw = (h), .name = NULL, .fw_name = NULL, .index = -1, \
> +})
> +
> extern spinlock_t pmc_pcr_lock;
>
> struct pmc_data {
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 04/31] clk: at91: clk-sam9x60-pll: use clk_parent_data
2025-09-18 21:15 ` [PATCH v4 04/31] clk: at91: clk-sam9x60-pll: use clk_parent_data Ryan.Wanner
@ 2025-10-20 19:41 ` Claudiu Beznea
0 siblings, 0 replies; 54+ messages in thread
From: Claudiu Beznea @ 2025-10-20 19:41 UTC (permalink / raw)
To: Ryan.Wanner, mturquette, sboyd, alexandre.belloni, nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
Hi, Ryan,
On 9/19/25 00:15, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>
> Use struct clk_parent_data instead of struct parent_hw as this leads
> to less usage of __clk_get_hw() in SoC specific clock drivers and simpler
> conversion of existing SoC specific clock drivers from parent_names to
> modern clk_parent_data structures. As clk-sam9x60-pll need to know
> parent's rate at initialization we pass it now from SoC specific drivers.
> This will lead in the end at removing __clk_get_hw() in SoC specific
> drivers (that will be solved by subsequent commits).
>
> Get the main_xtal name via of_clk_get_parent_name() to consistently get
> the correct name for the main_xtal.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> [ryan.wanner@microchip.com: Add SAMA7D65 and SAM9X75 SoCs to the change set.]
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
> drivers/clk/at91/clk-sam9x60-pll.c | 14 +++++---------
> drivers/clk/at91/pmc.h | 5 +++--
> drivers/clk/at91/sam9x60.c | 8 +++++---
> drivers/clk/at91/sam9x7.c | 16 +++++++++++-----
> drivers/clk/at91/sama7d65.c | 25 ++++++++++++++-----------
> drivers/clk/at91/sama7g5.c | 26 +++++++++++++++-----------
> 6 files changed, 53 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/clk/at91/clk-sam9x60-pll.c b/drivers/clk/at91/clk-sam9x60-pll.c
> index 3dc75a394ce1..9895881c67d7 100644
> --- a/drivers/clk/at91/clk-sam9x60-pll.c
> +++ b/drivers/clk/at91/clk-sam9x60-pll.c
> @@ -630,19 +630,19 @@ static const struct clk_ops sam9x60_fixed_div_pll_ops = {
>
> struct clk_hw * __init
> sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock,
> - const char *name, const char *parent_name,
> - struct clk_hw *parent_hw, u8 id,
> + const char *name, const struct clk_parent_data *parent_data,
> + unsigned long parent_rate, u8 id,
> const struct clk_pll_characteristics *characteristics,
> const struct clk_pll_layout *layout, u32 flags)
> {
> struct sam9x60_frac *frac;
> struct clk_hw *hw;
> struct clk_init_data init = {};
> - unsigned long parent_rate, irqflags;
> + unsigned long irqflags;
> unsigned int val;
> int ret;
>
> - if (id > PLL_MAX_ID || !lock || !parent_hw)
> + if (id > PLL_MAX_ID || !lock || !parent_data)
> return ERR_PTR(-EINVAL);
>
> frac = kzalloc(sizeof(*frac), GFP_KERNEL);
> @@ -650,10 +650,7 @@ sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock,
> return ERR_PTR(-ENOMEM);
>
> init.name = name;
> - if (parent_name)
> - init.parent_names = &parent_name;
> - else
> - init.parent_hws = (const struct clk_hw **)&parent_hw;
> + init.parent_data = (const struct clk_parent_data *)parent_data;
> init.num_parents = 1;
> if (flags & CLK_SET_RATE_GATE)
> init.ops = &sam9x60_frac_pll_ops;
> @@ -684,7 +681,6 @@ sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock,
> * its rate leading to enabling this PLL with unsupported
> * rate. This will lead to PLL not being locked at all.
> */
> - parent_rate = clk_hw_get_rate(parent_hw);
> if (!parent_rate) {
> hw = ERR_PTR(-EINVAL);
> goto free;
> diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
> index 16c2559889aa..d3fc38cf90eb 100644
> --- a/drivers/clk/at91/pmc.h
> +++ b/drivers/clk/at91/pmc.h
> @@ -258,8 +258,9 @@ sam9x60_clk_register_div_pll(struct regmap *regmap, spinlock_t *lock,
>
> struct clk_hw * __init
> sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock,
> - const char *name, const char *parent_name,
> - struct clk_hw *parent_hw, u8 id,
> + const char *name,
> + const struct clk_parent_data *parent_data,
> + unsigned long parent_rate, u8 id,
> const struct clk_pll_characteristics *characteristics,
> const struct clk_pll_layout *layout, u32 flags);
>
> diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
> index 18baf4a256f4..bee35c65aceb 100644
> --- a/drivers/clk/at91/sam9x60.c
> +++ b/drivers/clk/at91/sam9x60.c
> @@ -242,7 +242,8 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
> sam9x60_pmc->chws[PMC_MAIN] = hw;
>
> hw = sam9x60_clk_register_frac_pll(regmap, &pmc_pll_lock, "pllack_fracck",
> - "mainck", sam9x60_pmc->chws[PMC_MAIN],
> + &AT91_CLK_PD_HW(sam9x60_pmc->chws[PMC_MAIN]),
> + clk_hw_get_rate(sam9x60_pmc->chws[PMC_MAIN]),
> 0, &plla_characteristics,
> &pll_frac_layout,
> /*
> @@ -268,8 +269,9 @@ static void __init sam9x60_pmc_setup(struct device_node *np)
> sam9x60_pmc->chws[PMC_PLLACK] = hw;
>
> hw = sam9x60_clk_register_frac_pll(regmap, &pmc_pll_lock, "upllck_fracck",
> - "main_osc", main_osc_hw, 1,
> - &upll_characteristics,
> + &AT91_CLK_PD_HW(main_osc_hw),
> + clk_hw_get_rate(main_osc_hw),
> + 1, &upll_characteristics,
> &pll_frac_layout, CLK_SET_RATE_GATE);
> if (IS_ERR(hw))
> goto err_free;
> diff --git a/drivers/clk/at91/sam9x7.c b/drivers/clk/at91/sam9x7.c
> index cb5849da494f..c80306715d90 100644
> --- a/drivers/clk/at91/sam9x7.c
> +++ b/drivers/clk/at91/sam9x7.c
> @@ -752,6 +752,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
> struct regmap *regmap;
> struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
> struct clk_hw *td_slck_hw, *md_slck_hw, *usbck_hw;
> + static struct clk_parent_data parent_data;
> struct clk_hw *parent_hws[9];
> int i, j;
>
> @@ -799,7 +800,7 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
>
> for (i = 0; i < PLL_ID_MAX; i++) {
> for (j = 0; j < PLL_COMPID_MAX; j++) {
> - struct clk_hw *parent_hw;
> + unsigned long parent_rate;
>
> if (!sam9x7_plls[i][j].n)
> continue;
> @@ -808,21 +809,26 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
> case PLL_TYPE_FRAC:
> switch (sam9x7_plls[i][j].p) {
> case SAM9X7_PLL_PARENT_MAINCK:
> - parent_hw = sam9x7_pmc->chws[PMC_MAIN];
> + parent_data = AT91_CLK_PD_NAME("mainck");
> + hw = sam9x7_pmc->chws[PMC_MAIN];
> break;
> case SAM9X7_PLL_PARENT_MAIN_XTAL:
> - parent_hw = main_xtal_hw;
> + parent_data = AT91_CLK_PD_NAME(main_xtal_name);
> + hw = main_xtal_hw;
> break;
> default:
> /* Should not happen. */
> - parent_hw = NULL;
> break;
> }
>
> + parent_rate = clk_hw_get_rate(hw);
> + if (!parent_rate)
> + return;
> +
> hw = sam9x60_clk_register_frac_pll(regmap,
> &pmc_pll_lock,
> sam9x7_plls[i][j].n,
> - NULL, parent_hw, i,
> + &parent_data, parent_rate, i,
> sam9x7_plls[i][j].c,
> sam9x7_plls[i][j].l,
> sam9x7_plls[i][j].f);
> diff --git a/drivers/clk/at91/sama7d65.c b/drivers/clk/at91/sama7d65.c
> index ec2ef1a0249a..6229b7dfbea1 100644
> --- a/drivers/clk/at91/sama7d65.c
> +++ b/drivers/clk/at91/sama7d65.c
> @@ -1093,7 +1093,7 @@ static const struct clk_pcr_layout sama7d65_pcr_layout = {
>
> static void __init sama7d65_pmc_setup(struct device_node *np)
> {
> - const char *main_xtal_name = "main_xtal";
> + const char *main_xtal_name;
> struct pmc_data *sama7d65_pmc;
> const char *parent_names[11];
> void **alloc_mem = NULL;
> @@ -1108,10 +1108,11 @@ static void __init sama7d65_pmc_setup(struct device_node *np)
>
> td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "td_slck"));
> md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "md_slck"));
> - main_xtal_hw = __clk_get_hw(of_clk_get_by_name(np, main_xtal_name));
> + i = of_property_match_string(np, "clock-names", "main_xtal");
Same as in the previous patch, please keep it close to
of_clk_get_parent_name() for main_xtal above and check check also negative
error numbers return by of_property_match_string(). Valid for the other
similar occurrences in this or next patches.
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 05/31] clk: at91: clk-peripheral: switch to clk_parent_data
2025-09-18 21:15 ` [PATCH v4 05/31] clk: at91: clk-peripheral: switch to clk_parent_data Ryan.Wanner
@ 2025-10-20 19:41 ` Claudiu Beznea
0 siblings, 0 replies; 54+ messages in thread
From: Claudiu Beznea @ 2025-10-20 19:41 UTC (permalink / raw)
To: Ryan.Wanner, mturquette, sboyd, alexandre.belloni, nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
Hi, Ryan,
On 9/19/25 00:15, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>
> Use struct clk_parent_data instead of parent_hw for peripheral clocks.
Could you please explain also why as done in other patches?
The rest looks good to me.
Thank you,
Claudiu
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 06/31] clk: at91: clk-main: switch to clk parent data
2025-09-18 21:15 ` [PATCH v4 06/31] clk: at91: clk-main: switch to clk parent data Ryan.Wanner
@ 2025-10-20 19:42 ` Claudiu Beznea
0 siblings, 0 replies; 54+ messages in thread
From: Claudiu Beznea @ 2025-10-20 19:42 UTC (permalink / raw)
To: Ryan.Wanner, mturquette, sboyd, alexandre.belloni, nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
Hi, Ryan,
On 9/19/25 00:15, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>
> Use struct clk_parent_data instead of parent_hw for the main clock
> to less usage of __clk_get_hw() in SoC specific clock drivers and simpler
Probably missing "This" in front of "to less" or something similar?
> conversion of existing SoC specific clock drivers from parent_names to
> modern clk_parent_data structures. This will lead in the end at removing
> __clk_get_hw() in SoC specific drivers
> (that will be solved by subsequent commits).
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> [ryan.wanner@microchip: Add SAMA7D65 and SAM9X75 SoCs to use parent_data.]
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
[...]
> @@ -1020,9 +1020,9 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
> if (IS_ERR(main_osc_hw))
> goto err_free;
>
> - parent_hws[0] = main_rc_hw;
> - parent_hws[1] = main_osc_hw;
> - hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_hws, 2);
> + parent_data[0] = AT91_CLK_PD_HW(main_rc_hw);
> + parent_data[1] = AT91_CLK_PD_HW(main_osc_hw);
You missed to convert parent data to an array and adjust use it accordingly
in this file.
> + hw = at91_clk_register_sam9x5_main(regmap, "mainck", NULL, parent_data, 2);
> if (IS_ERR(hw))
> goto err_free;
>
> @@ -1057,7 +1057,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
>
> hw = sam9x60_clk_register_frac_pll(regmap,
> &pmc_pll_lock, sama7g5_plls[i][j].n,
> - &parent_data, parent_rate, i,
> + parent_data, parent_rate, i,
> sama7g5_plls[i][j].c,
> sama7g5_plls[i][j].l,
> sama7g5_plls[i][j].f);
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 07/31] clk: at91: clk-utmi: use clk_parent_data
2025-09-18 21:15 ` [PATCH v4 07/31] clk: at91: clk-utmi: use clk_parent_data Ryan.Wanner
@ 2025-10-20 19:43 ` Claudiu Beznea
0 siblings, 0 replies; 54+ messages in thread
From: Claudiu Beznea @ 2025-10-20 19:43 UTC (permalink / raw)
To: Ryan.Wanner, mturquette, sboyd, alexandre.belloni, nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
Hi, Ryan,
On 9/19/25 00:15, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>
> Use struct clk_parent_data instead of struct parent_hw as this leads
> to less usage of __clk_get_hw() in SoC specific clock drivers and simpler
> conversion of existing SoC specific clock drivers from parent_names to
> modern clk_parent_data structures.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
> drivers/clk/at91/clk-utmi.c | 16 ++++++++--------
> drivers/clk/at91/pmc.h | 4 ++--
> drivers/clk/at91/sama7g5.c | 21 +++++++++++++--------
> 3 files changed, 23 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/clk/at91/clk-utmi.c b/drivers/clk/at91/clk-utmi.c
> index b991180beea1..38ffe4d712a5 100644
> --- a/drivers/clk/at91/clk-utmi.c
> +++ b/drivers/clk/at91/clk-utmi.c
> @@ -144,7 +144,7 @@ static struct clk_hw * __init
> at91_clk_register_utmi_internal(struct regmap *regmap_pmc,
> struct regmap *regmap_sfr,
> const char *name, const char *parent_name,
> - struct clk_hw *parent_hw,
> + struct clk_parent_data *parent_data,
> const struct clk_ops *ops, unsigned long flags)
> {
> struct clk_utmi *utmi;
> @@ -152,7 +152,7 @@ at91_clk_register_utmi_internal(struct regmap *regmap_pmc,
> struct clk_init_data init = {};
> int ret;
>
> - if (!(parent_name || parent_hw))
> + if (!(parent_name || parent_data))
> return ERR_PTR(-EINVAL);
>
> utmi = kzalloc(sizeof(*utmi), GFP_KERNEL);
> @@ -161,8 +161,8 @@ at91_clk_register_utmi_internal(struct regmap *regmap_pmc,
>
> init.name = name;
> init.ops = ops;
> - if (parent_hw)
> - init.parent_hws = (const struct clk_hw **)&parent_hw;
> + if (parent_data)
> + init.parent_data = (const struct clk_parent_data *)parent_data;
> else
> init.parent_names = &parent_name;
> init.num_parents = 1;
> @@ -185,10 +185,10 @@ at91_clk_register_utmi_internal(struct regmap *regmap_pmc,
> struct clk_hw * __init
> at91_clk_register_utmi(struct regmap *regmap_pmc, struct regmap *regmap_sfr,
> const char *name, const char *parent_name,
> - struct clk_hw *parent_hw)
> + struct clk_parent_data *parent_data)
> {
> return at91_clk_register_utmi_internal(regmap_pmc, regmap_sfr, name,
> - parent_name, parent_hw, &utmi_ops, CLK_SET_RATE_GATE);
> + parent_name, parent_data, &utmi_ops, CLK_SET_RATE_GATE);
> }
>
> static int clk_utmi_sama7g5_prepare(struct clk_hw *hw)
> @@ -287,8 +287,8 @@ static const struct clk_ops sama7g5_utmi_ops = {
>
> struct clk_hw * __init
> at91_clk_sama7g5_register_utmi(struct regmap *regmap_pmc, const char *name,
> - const char *parent_name, struct clk_hw *parent_hw)
> + const char *parent_name, struct clk_parent_data *parent_data)
> {
> return at91_clk_register_utmi_internal(regmap_pmc, NULL, name,
> - parent_name, parent_hw, &sama7g5_utmi_ops, 0);
> + parent_name, parent_data, &sama7g5_utmi_ops, 0);
> }
> diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
> index 13d125793216..ee77c14e8b25 100644
> --- a/drivers/clk/at91/pmc.h
> +++ b/drivers/clk/at91/pmc.h
> @@ -302,10 +302,10 @@ at91rm9200_clk_register_usb(struct regmap *regmap, const char *name,
> struct clk_hw * __init
> at91_clk_register_utmi(struct regmap *regmap_pmc, struct regmap *regmap_sfr,
> const char *name, const char *parent_name,
> - struct clk_hw *parent_hw);
> + struct clk_parent_data *parent_data);
>
> struct clk_hw * __init
> at91_clk_sama7g5_register_utmi(struct regmap *regmap, const char *name,
> - const char *parent_name, struct clk_hw *parent_hw);
> + const char *parent_name, struct clk_parent_data *parent_data);
>
> #endif /* __PMC_H_ */
> diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
> index b1b0e9e67228..dde662a6133f 100644
> --- a/drivers/clk/at91/sama7g5.c
> +++ b/drivers/clk/at91/sama7g5.c
> @@ -976,10 +976,11 @@ static void __init sama7g5_pmc_setup(struct device_node *np)
> void **alloc_mem = NULL;
> int alloc_mem_size = 0;
> struct regmap *regmap;
> - struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
> + struct clk_hw *hw, *main_rc_hw, *main_osc_hw;
> struct clk_hw *td_slck_hw, *md_slck_hw;
> - static struct clk_parent_data parent_data;
> + struct clk_parent_data parent_data[2];
This should be part of patch 6/31.
> struct clk_hw *parent_hws[10];
> + struct clk *main_xtal;
This could be moved in the for block where of_clk_get_by_name(np,
main_xtal_name); is called.
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 08/31] clk: at91: clk-master: use clk_parent_data
2025-09-18 21:15 ` [PATCH v4 08/31] clk: at91: clk-master: " Ryan.Wanner
@ 2025-10-20 19:44 ` Claudiu Beznea
0 siblings, 0 replies; 54+ messages in thread
From: Claudiu Beznea @ 2025-10-20 19:44 UTC (permalink / raw)
To: Ryan.Wanner, mturquette, sboyd, alexandre.belloni, nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
Hi, Ryan,
On 9/19/25 00:15, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>
> Use struct clk_parent_data instead of struct parent_hw as this leads
> to less usage of __clk_get_hw() in SoC specific clock drivers and simpler
> conversion of existing SoC specific clock drivers from parent_names to
> modern clk_parent_data structures.
>
> __clk_get_hw will be removed in subsequent patches.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> [ryan.wanner@microchip.com: Add clk-master changes to SAM9X75 and
> SAMA7D65 SoCs. As well as add md_slck commit message.]
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
[...]
> @@ -752,15 +752,17 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
> struct regmap *regmap;
> struct clk_hw *hw, *main_rc_hw, *main_osc_hw, *main_xtal_hw;
> struct clk_hw *td_slck_hw, *md_slck_hw, *usbck_hw;
> - struct clk_parent_data parent_data[2];
> + struct clk_parent_data parent_data[9];
> struct clk_hw *parent_hws[9];
> int i, j;
>
> td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "td_slck"));
> md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "md_slck"));
> - i = of_property_match_string(np, "clock-names", "main_xtal");
> + if (!td_slck_hw || !md_slck_hw)
> + return;
>
> - if (!td_slck_hw || !md_slck_hw || !i)
> + i = of_property_match_string(np, "clock-names", "main_xtal");
> + if (i < 0)
> return;
The diff here should be gone from this patch if handled in previous
conversion patches.
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 10/31] clk: at91: clk-generated: use clk_parent_data
2025-09-18 21:15 ` [PATCH v4 10/31] clk: at91: clk-generated: " Ryan.Wanner
2025-10-20 19:39 ` Claudiu Beznea
@ 2025-10-20 19:45 ` Claudiu Beznea
1 sibling, 0 replies; 54+ messages in thread
From: Claudiu Beznea @ 2025-10-20 19:45 UTC (permalink / raw)
To: Ryan.Wanner, mturquette, sboyd, alexandre.belloni, nicolas.ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, varshini.rajendran
Hi, Ryan,
On 9/19/25 00:15, Ryan.Wanner@microchip.com wrote:
> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>
> Use struct clk_parent_data instead of struct parent_hw as this leads
> to less usage of __clk_get_hw() in SoC specific clock drivers and simpler
> conversion of existing SoC specific clock drivers from parent_names to
> modern clk_parent_data structures.
>
> Remove the last of the usage of __clk_get_hw().
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
> [ryan.wanner@microchip.com: Added SAMA7D65 and SAM9X75 SoCs to the
> clk-generated changes. Adjust clk name variable order.]
> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
> ---
[...]
> static void __init sama7g5_pmc_setup(struct device_node *np)
> {
> - const char *main_xtal_name;
> + const char *main_xtal_name, *md_slck_name, *td_slck_name;
> struct pmc_data *sama7g5_pmc;
> void **alloc_mem = NULL;
> int alloc_mem_size = 0;
> struct regmap *regmap;
> struct clk_hw *hw, *main_rc_hw, *main_osc_hw;
> - struct clk_hw *td_slck_hw, *md_slck_hw;
> struct clk_parent_data parent_data[10];
> - struct clk_hw *parent_hws[10];
> struct clk *main_xtal;
> bool bypass;
> int i, j;
>
> - td_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "td_slck"));
> - md_slck_hw = __clk_get_hw(of_clk_get_by_name(np, "md_slck"));
> + i = of_property_match_string(np, "clock-names", "td_slck");
> + if (i < 0)
> + return;
> + td_slck_name = of_clk_get_parent_name(np, i);
> +
> + i = of_property_match_string(np, "clock-names", "md_slck");
> + if (i < 0)
> + return;
> + md_slck_name = of_clk_get_parent_name(np, i);
> +
> i = of_property_match_string(np, "clock-names", "main_xtal");
>
Please drop the resulting empty line here.
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 11/31] clk: at91: clk-usb: add support for clk_parent_data
2025-10-20 19:17 ` Claudiu Beznea
@ 2025-12-18 16:23 ` Ryan.Wanner
2025-12-23 14:00 ` claudiu beznea
0 siblings, 1 reply; 54+ messages in thread
From: Ryan.Wanner @ 2025-12-18 16:23 UTC (permalink / raw)
To: claudiu.beznea, mturquette, sboyd, alexandre.belloni,
Nicolas.Ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, Varshini.Rajendran
On 10/20/25 12:17, Claudiu Beznea wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Hi, Ryan,
>
> On 9/19/25 00:15, Ryan.Wanner@microchip.com wrote:
>> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>>
>> Add support for clk_parent_data in usb clock driver.
>>
>> All the SoC based drivers that rely on clk-usb were adapted
>> to the new API change. The switch itself for SoCs will be done
>> in subsequent patches.
>>
>> Remove the use of __clk_get_hw() for the slow clocks.
>>
>> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>> [ryan.wanner@microchip: Add SAMA7D65 and SAM9X75 SoCs to the changes.
>> Change how the main_xtal and slcks are initialized so they match the
>> parent_data API]
>> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
>> ---
>> drivers/clk/at91/at91rm9200.c | 2 +-
>> drivers/clk/at91/at91sam9260.c | 2 +-
>> drivers/clk/at91/at91sam9g45.c | 2 +-
>> drivers/clk/at91/at91sam9n12.c | 2 +-
>> drivers/clk/at91/at91sam9x5.c | 2 +-
>> drivers/clk/at91/clk-usb.c | 41 ++++++++++++++++++++++------------
>> drivers/clk/at91/dt-compat.c | 6 ++---
>> drivers/clk/at91/pmc.h | 11 +++++----
>> drivers/clk/at91/sam9x60.c | 2 +-
>> drivers/clk/at91/sam9x7.c | 21 +++++++++--------
>> drivers/clk/at91/sama5d2.c | 2 +-
>> drivers/clk/at91/sama5d3.c | 2 +-
>> drivers/clk/at91/sama5d4.c | 2 +-
>> drivers/clk/at91/sama7d65.c | 24 +++++++++++---------
>> 14 files changed, 72 insertions(+), 49 deletions(-)
>>
>
> [ ... ]
>
>> @@ -882,10 +885,10 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
>>
>> sam9x7_pmc->chws[PMC_MCK] = hw;
>>
>> - parent_names[0] = "plla_divpmcck";
>> - parent_names[1] = "upll_divpmcck";
>> - parent_names[2] = "main_osc";
>> - usbck_hw = sam9x60_clk_register_usb(regmap, "usbck", parent_names, 3);
>> + parent_data[0] = AT91_CLK_PD_HW(sam9x7_plls[PLL_ID_PLLA][PLL_COMPID_DIV0].hw);
>> + parent_data[1] = AT91_CLK_PD_HW(sam9x7_plls[PLL_ID_UPLL][PLL_COMPID_DIV0].hw);
>> + parent_data[2] = AT91_CLK_PD_HW(main_osc_hw);
>> + usbck_hw = sam9x60_clk_register_usb(regmap, "usbck", NULL, parent_data, 3);
>
> sam9x60_clk_register_usb() could be converted to use parent_hws member of
> struct clk_init_data instead of parent_data.
So this would mean that I would pass in an array of the plls as
parent_hws, and use that to load the clk_init_data struct instead of
filling the array of parent_data as it is changed to in this patch set?
And this would be functionally the same since parent_data points to
clk_hw?>
^ permalink raw reply [flat|nested] 54+ messages in thread
* Re: [PATCH v4 11/31] clk: at91: clk-usb: add support for clk_parent_data
2025-12-18 16:23 ` Ryan.Wanner
@ 2025-12-23 14:00 ` claudiu beznea
0 siblings, 0 replies; 54+ messages in thread
From: claudiu beznea @ 2025-12-23 14:00 UTC (permalink / raw)
To: Ryan.Wanner, mturquette, sboyd, alexandre.belloni, Nicolas.Ferre
Cc: linux-clk, linux-arm-kernel, linux-kernel, Varshini.Rajendran
On 12/18/25 18:23, Ryan.Wanner@microchip.com wrote:
> On 10/20/25 12:17, Claudiu Beznea wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>
>> Hi, Ryan,
>>
>> On 9/19/25 00:15, Ryan.Wanner@microchip.com wrote:
>>> From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>>>
>>> Add support for clk_parent_data in usb clock driver.
>>>
>>> All the SoC based drivers that rely on clk-usb were adapted
>>> to the new API change. The switch itself for SoCs will be done
>>> in subsequent patches.
>>>
>>> Remove the use of __clk_get_hw() for the slow clocks.
>>>
>>> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
>>> [ryan.wanner@microchip: Add SAMA7D65 and SAM9X75 SoCs to the changes.
>>> Change how the main_xtal and slcks are initialized so they match the
>>> parent_data API]
>>> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
>>> ---
>>> drivers/clk/at91/at91rm9200.c | 2 +-
>>> drivers/clk/at91/at91sam9260.c | 2 +-
>>> drivers/clk/at91/at91sam9g45.c | 2 +-
>>> drivers/clk/at91/at91sam9n12.c | 2 +-
>>> drivers/clk/at91/at91sam9x5.c | 2 +-
>>> drivers/clk/at91/clk-usb.c | 41 ++++++++++++++++++++++------------
>>> drivers/clk/at91/dt-compat.c | 6 ++---
>>> drivers/clk/at91/pmc.h | 11 +++++----
>>> drivers/clk/at91/sam9x60.c | 2 +-
>>> drivers/clk/at91/sam9x7.c | 21 +++++++++--------
>>> drivers/clk/at91/sama5d2.c | 2 +-
>>> drivers/clk/at91/sama5d3.c | 2 +-
>>> drivers/clk/at91/sama5d4.c | 2 +-
>>> drivers/clk/at91/sama7d65.c | 24 +++++++++++---------
>>> 14 files changed, 72 insertions(+), 49 deletions(-)
>>>
>>
>> [ ... ]
>>
>>> @@ -882,10 +885,10 @@ static void __init sam9x7_pmc_setup(struct device_node *np)
>>>
>>> sam9x7_pmc->chws[PMC_MCK] = hw;
>>>
>>> - parent_names[0] = "plla_divpmcck";
>>> - parent_names[1] = "upll_divpmcck";
>>> - parent_names[2] = "main_osc";
>>> - usbck_hw = sam9x60_clk_register_usb(regmap, "usbck", parent_names, 3);
>>> + parent_data[0] = AT91_CLK_PD_HW(sam9x7_plls[PLL_ID_PLLA][PLL_COMPID_DIV0].hw);
>>> + parent_data[1] = AT91_CLK_PD_HW(sam9x7_plls[PLL_ID_UPLL][PLL_COMPID_DIV0].hw);
>>> + parent_data[2] = AT91_CLK_PD_HW(main_osc_hw);
>>> + usbck_hw = sam9x60_clk_register_usb(regmap, "usbck", NULL, parent_data, 3);
>>
>> sam9x60_clk_register_usb() could be converted to use parent_hws member of
>> struct clk_init_data instead of parent_data.
>
> So this would mean that I would pass in an array of the plls as
> parent_hws, and use that to load the clk_init_data struct instead of
> filling the array of parent_data as it is changed to in this patch set?
>
> And this would be functionally the same since parent_data points to
> clk_hw?>
>
It should be something like:
usb = kzalloc(sizeof(*usb), GFP_KERNEL);
@@ -235,7 +235,10 @@ _at91sam9x5_clk_register_usb(struct regmap *regmap, const
char *name, const clk_hw **parent_hws)
init.name = name;
init.ops = &at91sam9x5_usb_ops;
- init.parent_names = parent_names;
+ if (parent_hws)
+ init.parent_hws = parent_hws;
+ else
+ init.parent_names = parent_names;
Thank you,
Claudiu
^ permalink raw reply [flat|nested] 54+ messages in thread
end of thread, other threads:[~2025-12-23 14:01 UTC | newest]
Thread overview: 54+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-09-18 21:15 [PATCH v4 00/31] clk: at91: add support for parent_data and Ryan.Wanner
2025-09-18 21:15 ` [PATCH v4 01/31] clk: at91: pmc: add macros for clk_parent_data Ryan.Wanner
2025-10-20 19:40 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 02/31] clk: at91: pmc: Move macro to header file Ryan.Wanner
2025-09-18 21:15 ` [PATCH v4 03/31] clk: at91: sam9x75: switch to parent_hw and parent_data Ryan.Wanner
2025-10-20 19:38 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 04/31] clk: at91: clk-sam9x60-pll: use clk_parent_data Ryan.Wanner
2025-10-20 19:41 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 05/31] clk: at91: clk-peripheral: switch to clk_parent_data Ryan.Wanner
2025-10-20 19:41 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 06/31] clk: at91: clk-main: switch to clk parent data Ryan.Wanner
2025-10-20 19:42 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 07/31] clk: at91: clk-utmi: use clk_parent_data Ryan.Wanner
2025-10-20 19:43 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 08/31] clk: at91: clk-master: " Ryan.Wanner
2025-10-20 19:44 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 09/31] clk: at91: clk-programmable: " Ryan.Wanner
2025-09-18 21:15 ` [PATCH v4 10/31] clk: at91: clk-generated: " Ryan.Wanner
2025-10-20 19:39 ` Claudiu Beznea
2025-10-20 19:45 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 11/31] clk: at91: clk-usb: add support for clk_parent_data Ryan.Wanner
2025-10-20 19:17 ` Claudiu Beznea
2025-12-18 16:23 ` Ryan.Wanner
2025-12-23 14:00 ` claudiu beznea
2025-09-18 21:15 ` [PATCH v4 12/31] clk: at91: clk-system: use clk_parent_data Ryan.Wanner
2025-09-18 21:15 ` [PATCH v4 13/31] clk: at91: sama7d65: switch to parent_hw and parent_data Ryan.Wanner
2025-10-20 19:14 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 14/31] clk: at91: clk-pll: add support for parent_hw Ryan.Wanner
2025-09-18 21:15 ` [PATCH v4 15/31] clk: at91: clk-audio-pll: " Ryan.Wanner
2025-09-18 21:15 ` [PATCH v4 16/31] clk: at91: clk-plldiv: " Ryan.Wanner
2025-10-20 19:12 ` Claudiu Beznea
2025-09-18 21:15 ` [PATCH v4 17/31] clk: at91: clk-h32mx: " Ryan.Wanner
2025-10-20 19:12 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 18/31] clk: at91: clk-i2s-mux: " Ryan.Wanner
2025-10-20 19:13 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 19/31] clk: at91: clk-smd: add support for clk_parent_data Ryan.Wanner
2025-10-20 19:14 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 20/31] clk: at91: clk-slow: add support for parent_hw Ryan.Wanner
2025-10-20 19:17 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 21/31] clk: at91: dt-compat: switch to parent_hw and parent_data Ryan.Wanner
2025-10-20 19:15 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 22/31] clk: at91: sam9x60: " Ryan.Wanner
2025-09-18 21:16 ` [PATCH v4 23/31] clk: at91: sama5d2: " Ryan.Wanner
2025-10-20 19:19 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 24/31] clk: at91: sama5d3: " Ryan.Wanner
2025-09-18 21:16 ` [PATCH v4 25/31] clk: at91: sama5d4: " Ryan.Wanner
2025-09-18 21:16 ` [PATCH v4 26/31] clk: at91: at91sam9x5: " Ryan.Wanner
2025-10-20 19:19 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 27/31] clk: at91: at91rm9200: " Ryan.Wanner
2025-09-18 21:16 ` [PATCH v4 28/31] clk: at91: at91sam9260: " Ryan.Wanner
2025-10-20 19:35 ` Claudiu Beznea
2025-09-18 21:16 ` [PATCH v4 29/31] clk: at91: at91sam9g45: " Ryan.Wanner
2025-09-18 21:16 ` [PATCH v4 30/31] clk: at91: at91sam9n12: " Ryan.Wanner
2025-09-18 21:16 ` [PATCH v4 31/31] clk: at91: at91sam9rl: switch to clk_parent_data Ryan.Wanner
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