* [PATCH 1/3] arm64: errata: Reformat table for IDs
2026-02-26 18:10 [PATCH 0/3] Arm SMMU errata updates Robin Murphy
@ 2026-02-26 18:10 ` Robin Murphy
2026-03-19 14:51 ` Will Deacon
2026-02-26 18:10 ` [PATCH 2/3] iommu/arm-smmu-v3: Update Arm errata Robin Murphy
` (2 subsequent siblings)
3 siblings, 1 reply; 9+ messages in thread
From: Robin Murphy @ 2026-02-26 18:10 UTC (permalink / raw)
To: will, catalin.marinas, joro; +Cc: iommu, linux-arm-kernel, daizhiyuan
We have some inconsistency where multiple errata for the same component
share the same Kconfig workaround; some are one ID per line, some are
smooshed together, and some are entirely separate entries. Standardise
on the single entry, one ID per line format so that things render nice
and consistently in the HTML docs, and it's simple and clear to add new
IDs to existing workarounds without churning the table too much.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
---
Documentation/arch/arm64/silicon-errata.rst | 44 ++++++++++++---------
1 file changed, 25 insertions(+), 19 deletions(-)
diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst
index 4c300caad901..2e8f57657de7 100644
--- a/Documentation/arch/arm64/silicon-errata.rst
+++ b/Documentation/arch/arm64/silicon-errata.rst
@@ -116,7 +116,8 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A73 | #858921 | ARM64_ERRATUM_858921 |
+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Cortex-A76 | #1188873,1418040| ARM64_ERRATUM_1418040 |
+| ARM | Cortex-A76 | #1188873, | ARM64_ERRATUM_1418040 |
+| | | #1418040 | |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A76 | #1165522 | ARM64_ERRATUM_1165522 |
+----------------+-----------------+-----------------+-----------------------------+
@@ -136,7 +137,8 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A78 | #3324344 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Cortex-A78C | #3324346,3324347| ARM64_ERRATUM_3194386 |
+| ARM | Cortex-A78C | #3324346, | ARM64_ERRATUM_3194386 |
+| | | #3324347 | |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A710 | #2119858 | ARM64_ERRATUM_2119858 |
+----------------+-----------------+-----------------+-----------------------------+
@@ -172,11 +174,11 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-X925 | #3324334 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Neoverse-N1 | #1188873,1418040| ARM64_ERRATUM_1418040 |
+| ARM | Neoverse-N1 | #1188873, | ARM64_ERRATUM_1418040 |
+| | | #1418040 | |
+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Neoverse-N1 | #1349291 | N/A |
-+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Neoverse-N1 | #1490853 | N/A |
+| ARM | Neoverse-N1 | #1349291, | N/A |
+| | | #1490853 | |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Neoverse-N1 | #1542419 | ARM64_ERRATUM_1542419 |
+----------------+-----------------+-----------------+-----------------------------+
@@ -202,28 +204,34 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Neoverse-V3AE | #3312417 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
-| ARM | MMU-500 | #841119,826419 | ARM_SMMU_MMU_500_CPRE_ERRATA|
-| | | #562869,1047329 | |
+| ARM | MMU-500 | #562869, | ARM_SMMU_MMU_500_CPRE_ERRATA|
+| | | #841119, | |
+| | | #826419, | |
+| | | #1047329 | |
+----------------+-----------------+-----------------+-----------------------------+
-| ARM | MMU-600 | #1076982,1209401| N/A |
-+----------------+-----------------+-----------------+-----------------------------+
-| ARM | MMU-700 | #2268618,2812531| N/A |
+| ARM | MMU-600 | #1076982, | N/A |
+| | | #1209401 | |
+----------------+-----------------+-----------------+-----------------------------+
+| ARM | MMU-700 | #2268618, | N/A |
+| | | #2812531 | |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | GIC-700 | #2941627 | ARM64_ERRATUM_2941627 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | SI L1 | #4311569 | ARM64_ERRATUM_4311569 |
+----------------+-----------------+-----------------+-----------------------------+
++----------------+-----------------+-----------------+-----------------------------+
| Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_845719 |
+----------------+-----------------+-----------------+-----------------------------+
| Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_843419 |
+----------------+-----------------+-----------------+-----------------------------+
+----------------+-----------------+-----------------+-----------------------------+
-| Cavium | ThunderX ITS | #22375,24313 | CAVIUM_ERRATUM_22375 |
+| Cavium | ThunderX ITS | #22375, | CAVIUM_ERRATUM_22375 |
+| | | #24313 | |
+----------------+-----------------+-----------------+-----------------------------+
| Cavium | ThunderX ITS | #23144 | CAVIUM_ERRATUM_23144 |
+----------------+-----------------+-----------------+-----------------------------+
-| Cavium | ThunderX GICv3 | #23154,38545 | CAVIUM_ERRATUM_23154 |
+| Cavium | ThunderX GICv3 | #23154, | CAVIUM_ERRATUM_23154 |
+| | | #38545 | |
+----------------+-----------------+-----------------+-----------------------------+
| Cavium | ThunderX GICv3 | #38539 | N/A |
+----------------+-----------------+-----------------+-----------------------------+
@@ -233,9 +241,8 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| Cavium | ThunderX SMMUv2 | #27704 | N/A |
+----------------+-----------------+-----------------+-----------------------------+
-| Cavium | ThunderX2 SMMUv3| #74 | N/A |
-+----------------+-----------------+-----------------+-----------------------------+
-| Cavium | ThunderX2 SMMUv3| #126 | N/A |
+| Cavium | ThunderX2 SMMUv3| #74, | N/A |
+| | | #126 | |
+----------------+-----------------+-----------------+-----------------------------+
| Cavium | ThunderX2 Core | #219 | CAVIUM_TX2_ERRATUM_219 |
+----------------+-----------------+-----------------+-----------------------------+
@@ -253,9 +260,8 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| Hisilicon | Hip0{5,6,7} | #161010101 | HISILICON_ERRATUM_161010101 |
+----------------+-----------------+-----------------+-----------------------------+
-| Hisilicon | Hip0{6,7} | #161010701 | N/A |
-+----------------+-----------------+-----------------+-----------------------------+
-| Hisilicon | Hip0{6,7} | #161010803 | N/A |
+| Hisilicon | Hip0{6,7} | #161010701, | N/A |
+| | | #161010803 | |
+----------------+-----------------+-----------------+-----------------------------+
| Hisilicon | Hip07 | #161600802 | HISILICON_ERRATUM_161600802 |
+----------------+-----------------+-----------------+-----------------------------+
--
2.39.2.101.g768bb238c484.dirty
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH 1/3] arm64: errata: Reformat table for IDs
2026-02-26 18:10 ` [PATCH 1/3] arm64: errata: Reformat table for IDs Robin Murphy
@ 2026-03-19 14:51 ` Will Deacon
2026-03-19 15:32 ` Robin Murphy
0 siblings, 1 reply; 9+ messages in thread
From: Will Deacon @ 2026-03-19 14:51 UTC (permalink / raw)
To: Robin Murphy; +Cc: catalin.marinas, joro, iommu, linux-arm-kernel, daizhiyuan
On Thu, Feb 26, 2026 at 06:10:20PM +0000, Robin Murphy wrote:
> We have some inconsistency where multiple errata for the same component
> share the same Kconfig workaround; some are one ID per line, some are
> smooshed together, and some are entirely separate entries. Standardise
> on the single entry, one ID per line format so that things render nice
> and consistently in the HTML docs, and it's simple and clear to add new
> IDs to existing workarounds without churning the table too much.
>
> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> ---
> Documentation/arch/arm64/silicon-errata.rst | 44 ++++++++++++---------
> 1 file changed, 25 insertions(+), 19 deletions(-)
I think we're better off doing this at -rc1 in the Arm tree, so we avoid
unnecessary cross-tree conflicts for something that doesn't really matter
that much in the grand scheme of things.
For now, please can you send the SMMU patch on its own so that I can
pick it up?
Cheers,
Will
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/3] arm64: errata: Reformat table for IDs
2026-03-19 14:51 ` Will Deacon
@ 2026-03-19 15:32 ` Robin Murphy
2026-03-19 15:50 ` Will Deacon
0 siblings, 1 reply; 9+ messages in thread
From: Robin Murphy @ 2026-03-19 15:32 UTC (permalink / raw)
To: Will Deacon; +Cc: catalin.marinas, joro, iommu, linux-arm-kernel, daizhiyuan
On 2026-03-19 2:51 pm, Will Deacon wrote:
> On Thu, Feb 26, 2026 at 06:10:20PM +0000, Robin Murphy wrote:
>> We have some inconsistency where multiple errata for the same component
>> share the same Kconfig workaround; some are one ID per line, some are
>> smooshed together, and some are entirely separate entries. Standardise
>> on the single entry, one ID per line format so that things render nice
>> and consistently in the HTML docs, and it's simple and clear to add new
>> IDs to existing workarounds without churning the table too much.
>>
>> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
>> ---
>> Documentation/arch/arm64/silicon-errata.rst | 44 ++++++++++++---------
>> 1 file changed, 25 insertions(+), 19 deletions(-)
>
> I think we're better off doing this at -rc1 in the Arm tree, so we avoid
> unnecessary cross-tree conflicts for something that doesn't really matter
> that much in the grand scheme of things.
>
> For now, please can you send the SMMU patch on its own so that I can
> pick it up?
Yeah, that's fair enough, it's not like it's a real dependency that
would justify taking the SMMU patch through arm64 either. v2 sent, and
if I haven't forgotten all about this by -rc1, I'll rebase and re-send
this one then.
(And I did rather expect that patch #3 might end up getting dropped,
hence keeping it separate at the end. Oh well, worth a try.)
Cheers,
Robin.
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 1/3] arm64: errata: Reformat table for IDs
2026-03-19 15:32 ` Robin Murphy
@ 2026-03-19 15:50 ` Will Deacon
0 siblings, 0 replies; 9+ messages in thread
From: Will Deacon @ 2026-03-19 15:50 UTC (permalink / raw)
To: Robin Murphy; +Cc: catalin.marinas, joro, iommu, linux-arm-kernel, daizhiyuan
On Thu, Mar 19, 2026 at 03:32:22PM +0000, Robin Murphy wrote:
> On 2026-03-19 2:51 pm, Will Deacon wrote:
> > On Thu, Feb 26, 2026 at 06:10:20PM +0000, Robin Murphy wrote:
> > > We have some inconsistency where multiple errata for the same component
> > > share the same Kconfig workaround; some are one ID per line, some are
> > > smooshed together, and some are entirely separate entries. Standardise
> > > on the single entry, one ID per line format so that things render nice
> > > and consistently in the HTML docs, and it's simple and clear to add new
> > > IDs to existing workarounds without churning the table too much.
> > >
> > > Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> > > ---
> > > Documentation/arch/arm64/silicon-errata.rst | 44 ++++++++++++---------
> > > 1 file changed, 25 insertions(+), 19 deletions(-)
> >
> > I think we're better off doing this at -rc1 in the Arm tree, so we avoid
> > unnecessary cross-tree conflicts for something that doesn't really matter
> > that much in the grand scheme of things.
> >
> > For now, please can you send the SMMU patch on its own so that I can
> > pick it up?
>
> Yeah, that's fair enough, it's not like it's a real dependency that would
> justify taking the SMMU patch through arm64 either. v2 sent, and if I
> haven't forgotten all about this by -rc1, I'll rebase and re-send this one
> then.
Thank you!
Will
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 2/3] iommu/arm-smmu-v3: Update Arm errata
2026-02-26 18:10 [PATCH 0/3] Arm SMMU errata updates Robin Murphy
2026-02-26 18:10 ` [PATCH 1/3] arm64: errata: Reformat table for IDs Robin Murphy
@ 2026-02-26 18:10 ` Robin Murphy
2026-02-26 18:10 ` [PATCH 3/3] arm64: errata: Sort Arm entries Robin Murphy
2026-02-27 12:45 ` [PATCH 0/3] Arm SMMU errata updates Catalin Marinas
3 siblings, 0 replies; 9+ messages in thread
From: Robin Murphy @ 2026-02-26 18:10 UTC (permalink / raw)
To: will, catalin.marinas, joro; +Cc: iommu, linux-arm-kernel, daizhiyuan
MMU-700 r1p1 has subsequently fixed some of the errata for which we've
been applying the workarounds unconditionally, so we can now make those
conditional. However, there have also been some more new cases
identified where we must rely on range invalidation commands, and thus
still nominally avoid DVM being inadvertently enabled.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
---
Documentation/arch/arm64/silicon-errata.rst | 10 ++++++++--
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 18 ++++++++++++++----
2 files changed, 22 insertions(+), 6 deletions(-)
diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst
index 2e8f57657de7..745ff25f5854 100644
--- a/Documentation/arch/arm64/silicon-errata.rst
+++ b/Documentation/arch/arm64/silicon-errata.rst
@@ -212,8 +212,14 @@ stable kernels.
| ARM | MMU-600 | #1076982, | N/A |
| | | #1209401 | |
+----------------+-----------------+-----------------+-----------------------------+
-| ARM | MMU-700 | #2268618, | N/A |
-| | | #2812531 | |
+| ARM | MMU-700 | #2133013, | N/A |
+| | | #2268618, | |
+| | | #2812531, | |
+| | | #3777127 | |
++----------------+-----------------+-----------------+-----------------------------+
+| ARM | MMU L1 | #3878312 | N/A |
++----------------+-----------------+-----------------+-----------------------------+
+| ARM | MMU S3 | #3995052 | N/A |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | GIC-700 | #2941627 | ARM64_ERRATUM_2941627 |
+----------------+-----------------+-----------------+-----------------------------+
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
index 4d00d796f078..3d816c67508d 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
@@ -4308,6 +4308,8 @@ static int arm_smmu_device_reset(struct arm_smmu_device *smmu)
#define IIDR_IMPLEMENTER_ARM 0x43b
#define IIDR_PRODUCTID_ARM_MMU_600 0x483
#define IIDR_PRODUCTID_ARM_MMU_700 0x487
+#define IIDR_PRODUCTID_ARM_MMU_L1 0x48a
+#define IIDR_PRODUCTID_ARM_MMU_S3 0x498
static void arm_smmu_device_iidr_probe(struct arm_smmu_device *smmu)
{
@@ -4332,11 +4334,19 @@ static void arm_smmu_device_iidr_probe(struct arm_smmu_device *smmu)
smmu->features &= ~ARM_SMMU_FEAT_NESTING;
break;
case IIDR_PRODUCTID_ARM_MMU_700:
- /* Arm erratum 2812531 */
+ /* Many errata... */
+ smmu->features &= ~ARM_SMMU_FEAT_BTM;
+ if (variant < 1 || revision < 1) {
+ /* Arm erratum 2812531 */
+ smmu->options |= ARM_SMMU_OPT_CMDQ_FORCE_SYNC;
+ /* Arm errata 2268618, 2812531 */
+ smmu->features &= ~ARM_SMMU_FEAT_NESTING;
+ }
+ break;
+ case IIDR_PRODUCTID_ARM_MMU_L1:
+ case IIDR_PRODUCTID_ARM_MMU_S3:
+ /* Arm errata 3878312/3995052 */
smmu->features &= ~ARM_SMMU_FEAT_BTM;
- smmu->options |= ARM_SMMU_OPT_CMDQ_FORCE_SYNC;
- /* Arm errata 2268618, 2812531 */
- smmu->features &= ~ARM_SMMU_FEAT_NESTING;
break;
}
break;
--
2.39.2.101.g768bb238c484.dirty
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH 3/3] arm64: errata: Sort Arm entries
2026-02-26 18:10 [PATCH 0/3] Arm SMMU errata updates Robin Murphy
2026-02-26 18:10 ` [PATCH 1/3] arm64: errata: Reformat table for IDs Robin Murphy
2026-02-26 18:10 ` [PATCH 2/3] iommu/arm-smmu-v3: Update Arm errata Robin Murphy
@ 2026-02-26 18:10 ` Robin Murphy
2026-03-19 14:52 ` Will Deacon
2026-02-27 12:45 ` [PATCH 0/3] Arm SMMU errata updates Catalin Marinas
3 siblings, 1 reply; 9+ messages in thread
From: Robin Murphy @ 2026-02-26 18:10 UTC (permalink / raw)
To: will, catalin.marinas, joro; +Cc: iommu, linux-arm-kernel, daizhiyuan
The Arm errata entries are in a messy sort-of-consistent-but-not order
that's awkward for actual reading, rather than specifically searching.
For the sake of sanity, order them consistently by Component (but
keeping the distinction of CPU vs. system IP) and Erratum ID.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
---
Documentation/arch/arm64/silicon-errata.rst | 64 ++++++++++-----------
1 file changed, 32 insertions(+), 32 deletions(-)
diff --git a/Documentation/arch/arm64/silicon-errata.rst b/Documentation/arch/arm64/silicon-errata.rst
index 745ff25f5854..2b8e5c702cf4 100644
--- a/Documentation/arch/arm64/silicon-errata.rst
+++ b/Documentation/arch/arm64/silicon-errata.rst
@@ -60,38 +60,18 @@ stable kernels.
| Ampere | AmpereOne AC04 | AC04_CPU_23 | AMPERE_ERRATUM_AC04_CPU_23 |
+----------------+-----------------+-----------------+-----------------------------+
+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Cortex-A510 | #2457168 | ARM64_ERRATUM_2457168 |
+| ARM | Cortex-A53 | #819472 | ARM64_ERRATUM_819472 |
+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Cortex-A510 | #2064142 | ARM64_ERRATUM_2064142 |
-+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Cortex-A510 | #2038923 | ARM64_ERRATUM_2038923 |
-+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Cortex-A510 | #1902691 | ARM64_ERRATUM_1902691 |
-+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Cortex-A510 | #2051678 | ARM64_ERRATUM_2051678 |
-+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Cortex-A510 | #2077057 | ARM64_ERRATUM_2077057 |
-+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Cortex-A510 | #2441009 | ARM64_ERRATUM_2441009 |
-+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Cortex-A510 | #2658417 | ARM64_ERRATUM_2658417 |
-+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Cortex-A510 | #3117295 | ARM64_ERRATUM_3117295 |
-+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Cortex-A520 | #2966298 | ARM64_ERRATUM_2966298 |
+| ARM | Cortex-A53 | #824069 | ARM64_ERRATUM_824069 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A53 | #827319 | ARM64_ERRATUM_827319 |
+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Cortex-A53 | #824069 | ARM64_ERRATUM_824069 |
-+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Cortex-A53 | #819472 | ARM64_ERRATUM_819472 |
+| ARM | Cortex-A53 | #843419 | ARM64_ERRATUM_843419 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A53 | #845719 | ARM64_ERRATUM_845719 |
+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Cortex-A53 | #843419 | ARM64_ERRATUM_843419 |
-+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A55 | #1024718 | ARM64_ERRATUM_1024718 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A55 | #1530923 | ARM64_ERRATUM_1530923 |
@@ -100,10 +80,10 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A57 | #832075 | ARM64_ERRATUM_832075 |
+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Cortex-A57 | #852523 | N/A |
-+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A57 | #834220 | ARM64_ERRATUM_834220 |
+----------------+-----------------+-----------------+-----------------------------+
+| ARM | Cortex-A57 | #852523 | N/A |
++----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A57 | #1319537 | ARM64_ERRATUM_1319367 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A57 | #1742098 | ARM64_ERRATUM_1742098 |
@@ -116,11 +96,11 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A73 | #858921 | ARM64_ERRATUM_858921 |
+----------------+-----------------+-----------------+-----------------------------+
+| ARM | Cortex-A76 | #1165522 | ARM64_ERRATUM_1165522 |
++----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A76 | #1188873, | ARM64_ERRATUM_1418040 |
| | | #1418040 | |
+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Cortex-A76 | #1165522 | ARM64_ERRATUM_1165522 |
-+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A76 | #1286807 | ARM64_ERRATUM_1286807 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A76 | #1463225 | ARM64_ERRATUM_1463225 |
@@ -140,10 +120,30 @@ stable kernels.
| ARM | Cortex-A78C | #3324346, | ARM64_ERRATUM_3194386 |
| | | #3324347 | |
+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Cortex-A710 | #2119858 | ARM64_ERRATUM_2119858 |
+| ARM | Cortex-A510 | #1902691 | ARM64_ERRATUM_1902691 |
++----------------+-----------------+-----------------+-----------------------------+
+| ARM | Cortex-A510 | #2038923 | ARM64_ERRATUM_2038923 |
++----------------+-----------------+-----------------+-----------------------------+
+| ARM | Cortex-A510 | #2051678 | ARM64_ERRATUM_2051678 |
++----------------+-----------------+-----------------+-----------------------------+
+| ARM | Cortex-A510 | #2064142 | ARM64_ERRATUM_2064142 |
++----------------+-----------------+-----------------+-----------------------------+
+| ARM | Cortex-A510 | #2077057 | ARM64_ERRATUM_2077057 |
++----------------+-----------------+-----------------+-----------------------------+
+| ARM | Cortex-A510 | #2441009 | ARM64_ERRATUM_2441009 |
++----------------+-----------------+-----------------+-----------------------------+
+| ARM | Cortex-A510 | #2457168 | ARM64_ERRATUM_2457168 |
++----------------+-----------------+-----------------+-----------------------------+
+| ARM | Cortex-A510 | #2658417 | ARM64_ERRATUM_2658417 |
++----------------+-----------------+-----------------+-----------------------------+
+| ARM | Cortex-A510 | #3117295 | ARM64_ERRATUM_3117295 |
++----------------+-----------------+-----------------+-----------------------------+
+| ARM | Cortex-A520 | #2966298 | ARM64_ERRATUM_2966298 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A710 | #2054223 | ARM64_ERRATUM_2054223 |
+----------------+-----------------+-----------------+-----------------------------+
+| ARM | Cortex-A710 | #2119858 | ARM64_ERRATUM_2119858 |
++----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A710 | #2224489 | ARM64_ERRATUM_2224489 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Cortex-A710 | #3324338 | ARM64_ERRATUM_3194386 |
@@ -184,10 +184,10 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Neoverse-N1 | #3324349 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
-| ARM | Neoverse-N2 | #2139208 | ARM64_ERRATUM_2139208 |
-+----------------+-----------------+-----------------+-----------------------------+
| ARM | Neoverse-N2 | #2067961 | ARM64_ERRATUM_2067961 |
+----------------+-----------------+-----------------+-----------------------------+
+| ARM | Neoverse-N2 | #2139208 | ARM64_ERRATUM_2139208 |
++----------------+-----------------+-----------------+-----------------------------+
| ARM | Neoverse-N2 | #2253138 | ARM64_ERRATUM_2253138 |
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Neoverse-N2 | #3324339 | ARM64_ERRATUM_3194386 |
@@ -204,6 +204,8 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| ARM | Neoverse-V3AE | #3312417 | ARM64_ERRATUM_3194386 |
+----------------+-----------------+-----------------+-----------------------------+
+| ARM | GIC-700 | #2941627 | ARM64_ERRATUM_2941627 |
++----------------+-----------------+-----------------+-----------------------------+
| ARM | MMU-500 | #562869, | ARM_SMMU_MMU_500_CPRE_ERRATA|
| | | #841119, | |
| | | #826419, | |
@@ -221,8 +223,6 @@ stable kernels.
+----------------+-----------------+-----------------+-----------------------------+
| ARM | MMU S3 | #3995052 | N/A |
+----------------+-----------------+-----------------+-----------------------------+
-| ARM | GIC-700 | #2941627 | ARM64_ERRATUM_2941627 |
-+----------------+-----------------+-----------------+-----------------------------+
| ARM | SI L1 | #4311569 | ARM64_ERRATUM_4311569 |
+----------------+-----------------+-----------------+-----------------------------+
+----------------+-----------------+-----------------+-----------------------------+
--
2.39.2.101.g768bb238c484.dirty
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH 3/3] arm64: errata: Sort Arm entries
2026-02-26 18:10 ` [PATCH 3/3] arm64: errata: Sort Arm entries Robin Murphy
@ 2026-03-19 14:52 ` Will Deacon
0 siblings, 0 replies; 9+ messages in thread
From: Will Deacon @ 2026-03-19 14:52 UTC (permalink / raw)
To: Robin Murphy; +Cc: catalin.marinas, joro, iommu, linux-arm-kernel, daizhiyuan
On Thu, Feb 26, 2026 at 06:10:22PM +0000, Robin Murphy wrote:
> The Arm errata entries are in a messy sort-of-consistent-but-not order
> that's awkward for actual reading, rather than specifically searching.
> For the sake of sanity, order them consistently by Component (but
> keeping the distinction of CPU vs. system IP) and Erratum ID.
>
> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
> ---
> Documentation/arch/arm64/silicon-errata.rst | 64 ++++++++++-----------
> 1 file changed, 32 insertions(+), 32 deletions(-)
I don't think this is worth the hassle. It's just going to create
unnecessary friction when backporting errata workarounds.
Will
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 0/3] Arm SMMU errata updates
2026-02-26 18:10 [PATCH 0/3] Arm SMMU errata updates Robin Murphy
` (2 preceding siblings ...)
2026-02-26 18:10 ` [PATCH 3/3] arm64: errata: Sort Arm entries Robin Murphy
@ 2026-02-27 12:45 ` Catalin Marinas
3 siblings, 0 replies; 9+ messages in thread
From: Catalin Marinas @ 2026-02-27 12:45 UTC (permalink / raw)
To: Robin Murphy; +Cc: will, joro, iommu, linux-arm-kernel, daizhiyuan
On Thu, Feb 26, 2026 at 06:10:19PM +0000, Robin Murphy wrote:
> As promised (well OK, it's not Monday...), here's a more comprehensive
> SMMU errata update since I finally found time to pick through all the
> latest SDENs in detail. Includes some bonus cleanup since I despair at
> just adding to a messy table, but that could be split up if you have a
> preference for what to base on what.
>
> Cheers,
> Robin.
>
>
> Robin Murphy (3):
> arm64: errata: Reformat table for IDs
> iommu/arm-smmu-v3: Update Arm errata
> arm64: errata: Sort Arm entries
>
> Documentation/arch/arm64/silicon-errata.rst | 114 +++++++++++---------
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 18 +++-
> 2 files changed, 77 insertions(+), 55 deletions(-)
For the errata doc changes:
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
^ permalink raw reply [flat|nested] 9+ messages in thread