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Thu, 26 Feb 2026 21:35:46 -0800 (PST) Received: from geday ([2804:7f2:800b:feb1::dead:c001]) by smtp.gmail.com with ESMTPSA id 71dfb90a1353d-56a9204b91esm5028673e0c.11.2026.02.26.21.35.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Feb 2026 21:35:44 -0800 (PST) Date: Fri, 27 Feb 2026 02:35:31 -0300 From: Geraldo Nascimento To: Shawn Lin , Lorenzo Pieralisi , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Heiko Stuebner , Geraldo Nascimento , Dragan Simic Cc: linux-rockchip@lists.infradead.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 0/4] PCI: rockchip: 5.0 GT/s speed discouraged by Rockchip Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260226_213548_382469_83C63617 X-CRM114-Status: GOOD ( 11.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Dragan Simic already had warned me of potential issues with 5.0 GT/s speed operation in Rockchip PCIe. However, in recent interactions with Shawn Lin from Rockchip it came to my attention there's grave danger in the unknown errata regarding 5.0 GT/s operational speed of their PCIe core. Drop all code related to 5.0 GT/s operational speed from this driver. Endpoint Mode driver was not tested. There's a bit of redundancy in the commit messages but it's the best I could do to ensure people will actually understand why perfectly working code is being dropped. --- Changes in v4: - Incorporate suggestion by Bjorn and refined by Dragan to drop the "catastrophic" code - Link to v3: https://lore.kernel.org/linux-rockchip/cover.1772057799.git.geraldogabriel@gmail.com/T/ Changes in v3: - Clarify warning message even though Rockchip won't disclose details - Drop DT changes as they were applied as subset by Heiko - Link to v2: https://lore.kernel.org/all/cover.1763415705.git.geraldogabriel@gmail.com/T/ Changes in v2: - hard limit to 2.5 GT/s, not just warn - add Reported-by: and Reviewed-by: Dragan Simic - remove redundant declaration of max-link-speed from helios64 dts - fix Link: of helios64 patch - simplify RC mode comment - Link to v1: https://lore.kernel.org/all/aRhR79u5BPtRRFw3@geday/T/ --- Geraldo Nascimento (4): PCI: rockchip: drop 2.5 GT/s defines PCI: rockchip: drive at 2.5 GT/s only and error out other speeds PCI: rockchip-host: do not attempt 5.0 GT/s retraining PCI: rockchip-ep: do not attempt 5.0 GT/s retraining drivers/pci/controller/pcie-rockchip-ep.c | 13 ------------- drivers/pci/controller/pcie-rockchip-host.c | 20 -------------------- drivers/pci/controller/pcie-rockchip.c | 13 +++++-------- drivers/pci/controller/pcie-rockchip.h | 3 --- 4 files changed, 5 insertions(+), 44 deletions(-) -- 2.52.0