From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E742BC3DA63 for ; Tue, 23 Jul 2024 23:15:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Date:To:Cc:From:Subject: References:In-Reply-To:Content-Transfer-Encoding:MIME-Version:Content-Type: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=h9qd5lq9yo+EsGmydvFj44825BZ9b4p6ysC1b9mPc7g=; b=i0b9MvV/u7xOcFZqLN3Wy+jCu9 eEo+sSwxk+Q5iV4yq4Q/lfh6D5L6sv3lxqIf3gWXf5SUoZOwVNOXQSfGH9cv4zPbd5F3f0fFw08I2 I+M+DmP58fGBpKtUtLCiVOF903AzvkXDpgKOMtaAHmu6gXPFP0WGnNNbbU2HyO6mNnwwV7awmte5A kevVAbHW3dM1aAGljBnOkeN/CUbJ8C8Xa8kEqqTeWpmpvToDuH28etQYfnzG9BVUDm0yphVKNMlnY jTa6VGLUjTlSZT5wCArMYWYn/UrK4mNfpxqrU6/qSCCMPX8gDNo8boreYcudVT3cPpIyZTM640Mqc hpv1/gCA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sWOj0-0000000DlIH-1CCJ; Tue, 23 Jul 2024 23:15:18 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sWOib-0000000DlCr-3UK0 for linux-arm-kernel@lists.infradead.org; Tue, 23 Jul 2024 23:14:55 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id EA94360F12; Tue, 23 Jul 2024 23:14:52 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 59F61C4AF0A; Tue, 23 Jul 2024 23:14:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721776492; bh=1pFvVOYdC3aG8zafwOAeBQz7+yiKYaLx3PgD1yCE4yY=; h=In-Reply-To:References:Subject:From:Cc:To:Date:From; b=UwSMX40ZQhju15eYYxKsc/VCfDx0/F18eNe3DNl8NKRZ8DFP3D6ambxC94LKSghnN OGqcUCdjdWnnJT6r7y+lpTLYUA5l4lDga2ux7r8I0E/f4y08FzKn5odoh4JJQa3c/f iQoS8lWPTKaGUCxbtvAP0piDmLjBIMqsdHdZRuoyFfUz0g+zLWy172iPIfsmGTTWMb pfje9z1O/xAq1CXVKUxKnDZ5OreOM8B8kAILKcPk4elCtgvnGt56zeOl76xGbLdxJa lsxltH3gxMBPtV7X+f5FO/1Rh6d25Oc8J07JzOanadkXnBwldHcWhpiM9CVJ+PWGme vmvwybi3IV0ng== Message-ID: Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: <20240720120048.36758-3-hpausten@protonmail.com> References: <20240720120048.36758-1-hpausten@protonmail.com> <20240720120048.36758-3-hpausten@protonmail.com> Subject: Re: [PATCH 2/7] clk: clocking-wizard: use newer clk_hw API From: Stephen Boyd Cc: Shubhrajyoti Datta , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Harry Austen To: Conor Dooley , Harry Austen , Krzysztof Kozlowski , Michael Turquette , Michal Simek , Rob Herring Date: Tue, 23 Jul 2024 16:14:50 -0700 User-Agent: alot/0.10 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240723_161454_025344_9410D6AA X-CRM114-Status: GOOD ( 17.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org General comment: do one thing in one patch, i.e. use clk_hw API and don't also migrate to devm in one patch. Quoting Harry Austen (2024-07-20 05:01:36) > diff --git a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c b/drivers/clk/xil= inx/clk-xlnx-clock-wizard.c > index 0ca045849ea3e..30c5cc9dcd7e9 100644 > --- a/drivers/clk/xilinx/clk-xlnx-clock-wizard.c > +++ b/drivers/clk/xilinx/clk-xlnx-clock-wizard.c > @@ -17,6 +17,7 @@ > #include > #include > #include > +#include What is this include for? __counted_by()? > #include > #include > =20 > @@ -121,24 +122,22 @@ enum clk_wzrd_int_clks { > /** > * struct clk_wzrd - Clock wizard private data structure > * > - * @clk_data: Clock data > + * @clk_data: Output clock data > * @nb: Notifier block > * @base: Memory base > * @clk_in1: Handle to input clock 'clk_in1' > * @axi_clk: Handle to input clock 's_axi_aclk' > * @clks_internal: Internal clocks > - * @clkout: Output clocks > * @speed_grade: Speed grade of the device > * @suspended: Flag indicating power state of the device > */ > struct clk_wzrd { > - struct clk_onecell_data clk_data; > + struct clk_hw_onecell_data *clk_data; It could be placed at the end and then one allocation could be used instead of two. > struct notifier_block nb; > void __iomem *base; > struct clk *clk_in1; > struct clk *axi_clk; > - struct clk *clks_internal[wzrd_clk_int_max]; > - struct clk *clkout[WZRD_NUM_OUTPUTS]; > + struct clk_hw *clks_internal[wzrd_clk_int_max]; > unsigned int speed_grade; > bool suspended; > }; > @@ -1108,35 +1110,32 @@ static int clk_wzrd_probe(struct platform_device = *pdev) > if (!div) > div =3D 1; > =20 > - clk_mul_name =3D __clk_get_name(clk_wzrd->clks_internal[w= zrd_clk_mul]); > + clk_mul_name =3D clk_hw_get_name(clk_wzrd->clks_internal[= wzrd_clk_mul]); > clk_wzrd->clks_internal[wzrd_clk_mul_div] =3D > - clk_register_fixed_factor(&pdev->dev, clk_name, > - clk_mul_name, 0, 1, div= ); > + clk_hw_register_fixed_factor(&pdev->dev, clk_name, > + clk_mul_name, 0, 1, = div); > } else { > ctrl_reg =3D clk_wzrd->base + WZRD_CLK_CFG_REG(is_versal,= 0); > - clk_wzrd->clks_internal[wzrd_clk_mul_div] =3D clk_registe= r_divider > + clk_wzrd->clks_internal[wzrd_clk_mul_div] =3D clk_hw_regi= ster_divider Are these going to be using devm so that on failure they get unregistered? > (&pdev->dev, clk_name, > - __clk_get_name(clk_wzrd->clks_internal[wzrd_clk_= mul]), > + clk_hw_get_name(clk_wzrd->clks_internal[wzrd_clk= _mul]), > flags, ctrl_reg, 0, 8, CLK_DIVIDER_ONE_BASED | > CLK_DIVIDER_ALLOW_ZERO, &clkwzrd_lock); > } > if (IS_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div])) { > dev_err(&pdev->dev, "unable to register divider clock\n"); > - ret =3D PTR_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div]= ); > - goto err_rm_int_clk; > + return PTR_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div]); > }