From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 321FEC47073 for ; Wed, 3 Jan 2024 14:52:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=g8ZosrhTfmHtcuS9As0nHWmq7seVTKkguv5qJFa8GYE=; b=uGVF9Em8ybqA3Q kpQ1o9EDz/2YqpW2rp2OZ2bYGfYdrdr54VT/2hMRL8xOD9i9/wFlU7I9k4grgQhlrXJ3E2vooeyn+ AxzA+dcUI3Cx+T+hpcbh5qNUCjQ1vedbDMruEdUXVEzZaR8Q9hm6HArGQG9KP7nitMN+mOK9tU+l4 V+lnolDe11WOsik03Lc7xhahL2GMF7KMBgoyDZvqf/q/pB2q8WgsNMhOqUbprkFqhnnmcqoNz/PVy HAbjdTP4mMT4kj/qAEzEiMwCNL9chAFCuCRcrRnGglRxWuC58OwJ7DRfFA2pQyJHZUzuVG5AnUG4V NXjD1JvgeJ6JjzAgtmGQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rL2bU-00BB7p-1f; Wed, 03 Jan 2024 14:52:20 +0000 Received: from mgamail.intel.com ([192.55.52.151]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rL2bR-00BB6a-1a for linux-arm-kernel@lists.infradead.org; Wed, 03 Jan 2024 14:52:18 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1704293537; x=1735829537; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=4+titHYTzQHNaVlm+l9TYXk9CDAS8vlfMiQY4I4TOrQ=; b=KKyHXlG6FKydUGPuIlSNyQEdvgatXYNALSf3uHREl95Vc5ZlQqSZLIjb AcYZJ6LHIUH2NK06OZbPFzzXeCkHubl6o7utprnCKK5S6Bsb8R4yPMKL0 piDT27JpRTXpuGogIQb0cS6mWrsN/9G5AJiJOhXTjUS90CkbYGpzkwyNr 5fEitt1zg713y+WYYnr24eQnHN/g179top211XcpusBkE3yw8PvAiO/ds +QEGJ5Zzh9uPAMcc9RfiHKqZxDRal+ccwlP5q+UIq1n5thLglFAv7Tk1u vVfUVmw/eGUtrZVWfGPBL4uwRFtqBWWfLGtwlWB1Kqp0Xtr4O3Ifq3PX+ Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10942"; a="377172602" X-IronPort-AV: E=Sophos;i="6.04,327,1695711600"; d="scan'208";a="377172602" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Jan 2024 06:52:11 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10942"; a="814277347" X-IronPort-AV: E=Sophos;i="6.04,327,1695711600"; d="scan'208";a="814277347" Received: from ahunter6-mobl1.ger.corp.intel.com (HELO [10.0.2.15]) ([10.252.51.162]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Jan 2024 06:52:07 -0800 Message-ID: Date: Wed, 3 Jan 2024 16:52:02 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 2/2] mmc: add new sdhci reset sequence for brcm 74165b0 Content-Language: en-US To: Kamal Dasu , ulf.hansson@linaro.org, linux-kernel@vger.kernel.org, alcooperx@gmail.com, linux-arm-kernel@lists.infradead.org, linux-mmc@vger.kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, devicetree@vger.kernel.org Cc: f.fainelli@gmail.com, bcm-kernel-feedback-list@broadcom.com, Kamal Dasu References: <20240102160910.15485-1-kamal.dasu@broadcom.com> <20240102160910.15485-3-kamal.dasu@broadcom.com> From: Adrian Hunter Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki In-Reply-To: <20240102160910.15485-3-kamal.dasu@broadcom.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240103_065217_546397_75496A58 X-CRM114-Status: GOOD ( 23.95 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2/01/24 18:09, Kamal Dasu wrote: > From: Kamal Dasu > > 74165b0 shall use a new sdio controller core version which > requires a different reset sequence. For core reset we use > sdhci_reset. For CMD and/or DATA reset added a new function > to also enable SDHCI clocks SDHCI_CLOCK_CARD_EN > SDHCI_CLOCK_INT_EN along with the SDHCI_RESET_CMD and/or > SDHCI_RESET_DATA fields. > > Signed-off-by: Kamal Dasu Subject should start "mmc: sdhci-brcmstb: " otherwise: Acked-by: Adrian Hunter > --- > drivers/mmc/host/sdhci-brcmstb.c | 69 +++++++++++++++++++++++++++++--- > 1 file changed, 64 insertions(+), 5 deletions(-) > > diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c > index c23251bb95f3..9053526fa212 100644 > --- a/drivers/mmc/host/sdhci-brcmstb.c > +++ b/drivers/mmc/host/sdhci-brcmstb.c > @@ -6,6 +6,7 @@ > */ > > #include > +#include > #include > #include > #include > @@ -44,8 +45,13 @@ struct brcmstb_match_priv { > > static inline void enable_clock_gating(struct sdhci_host *host) > { > + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); > + struct sdhci_brcmstb_priv *priv = sdhci_pltfm_priv(pltfm_host); > u32 reg; > > + if (!(priv->flags & BRCMSTB_PRIV_FLAGS_GATE_CLOCK)) > + return; > + > reg = sdhci_readl(host, SDHCI_VENDOR); > reg |= SDHCI_VENDOR_GATE_SDCLK_EN; > sdhci_writel(host, reg, SDHCI_VENDOR); > @@ -53,14 +59,53 @@ static inline void enable_clock_gating(struct sdhci_host *host) > > static void brcmstb_reset(struct sdhci_host *host, u8 mask) > { > - struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); > - struct sdhci_brcmstb_priv *priv = sdhci_pltfm_priv(pltfm_host); > - > sdhci_and_cqhci_reset(host, mask); > > /* Reset will clear this, so re-enable it */ > - if (priv->flags & BRCMSTB_PRIV_FLAGS_GATE_CLOCK) > - enable_clock_gating(host); > + enable_clock_gating(host); > +} > + > +static void brcmstb_sdhci_reset_cmd_data(struct sdhci_host *host, u8 mask) > +{ > + u32 new_mask = (mask & (SDHCI_RESET_CMD | SDHCI_RESET_DATA)) << 24; > + int ret; > + u32 reg; > + > + /* > + * SDHCI_CLOCK_CONTROL register CARD_EN and CLOCK_INT_EN bits shall > + * be set along with SOFTWARE_RESET register RESET_CMD or RESET_DATA > + * bits, hence access SDHCI_CLOCK_CONTROL register as 32-bit register > + */ > + new_mask |= SDHCI_CLOCK_CARD_EN | SDHCI_CLOCK_INT_EN; > + reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL); > + sdhci_writel(host, reg | new_mask, SDHCI_CLOCK_CONTROL); > + > + reg = sdhci_readb(host, SDHCI_SOFTWARE_RESET); > + > + ret = read_poll_timeout_atomic(sdhci_readb, reg, !(reg & mask), > + 10, 10000, false, > + host, SDHCI_SOFTWARE_RESET); > + > + if (ret) { > + pr_err("%s: Reset 0x%x never completed.\n", > + mmc_hostname(host->mmc), (int)mask); > + sdhci_err_stats_inc(host, CTRL_TIMEOUT); > + sdhci_dumpregs(host); > + } > +} > + > +static void brcmstb_reset_74165b0(struct sdhci_host *host, u8 mask) > +{ > + /* take care of RESET_ALL as usual */ > + if (mask & SDHCI_RESET_ALL) > + sdhci_and_cqhci_reset(host, SDHCI_RESET_ALL); > + > + /* cmd and/or data treated differently on this core */ > + if (mask & (SDHCI_RESET_CMD | SDHCI_RESET_DATA)) > + brcmstb_sdhci_reset_cmd_data(host, mask); > + > + /* Reset will clear this, so re-enable it */ > + enable_clock_gating(host); > } > > static void sdhci_brcmstb_hs400es(struct mmc_host *mmc, struct mmc_ios *ios) > @@ -162,6 +207,13 @@ static struct sdhci_ops sdhci_brcmstb_ops_7216 = { > .set_uhs_signaling = sdhci_brcmstb_set_uhs_signaling, > }; > > +static struct sdhci_ops sdhci_brcmstb_ops_74165b0 = { > + .set_clock = sdhci_brcmstb_set_clock, > + .set_bus_width = sdhci_set_bus_width, > + .reset = brcmstb_reset_74165b0, > + .set_uhs_signaling = sdhci_brcmstb_set_uhs_signaling, > +}; > + > static struct brcmstb_match_priv match_priv_7425 = { > .flags = BRCMSTB_MATCH_FLAGS_NO_64BIT | > BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT, > @@ -179,10 +231,17 @@ static const struct brcmstb_match_priv match_priv_7216 = { > .ops = &sdhci_brcmstb_ops_7216, > }; > > +static struct brcmstb_match_priv match_priv_74165b0 = { > + .flags = BRCMSTB_MATCH_FLAGS_HAS_CLOCK_GATE, > + .hs400es = sdhci_brcmstb_hs400es, > + .ops = &sdhci_brcmstb_ops_74165b0, > +}; > + > static const struct of_device_id __maybe_unused sdhci_brcm_of_match[] = { > { .compatible = "brcm,bcm7425-sdhci", .data = &match_priv_7425 }, > { .compatible = "brcm,bcm7445-sdhci", .data = &match_priv_7445 }, > { .compatible = "brcm,bcm7216-sdhci", .data = &match_priv_7216 }, > + { .compatible = "brcm,bcm74165b0-sdhci", .data = &match_priv_74165b0 }, > {}, > }; > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel