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Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hV33T-0000gC-44; Sun, 26 May 2019 23:59:55 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hV33P-0000fJ-2e for linux-arm-kernel@lists.infradead.org; Sun, 26 May 2019 23:59:52 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 110AC374; Sun, 26 May 2019 16:59:48 -0700 (PDT) Received: from [192.168.3.111] (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B67E63F5AF; Sun, 26 May 2019 16:59:45 -0700 (PDT) Subject: Re: [PATCH 0/2] mailbox: arm: introduce smc triggered mailbox To: Sudeep Holla , Florian Fainelli References: <20190523060437.11059-1-peng.fan@nxp.com> <4ba2b243-5622-bb27-6fc3-cd9457430e54@gmail.com> <20190524175658.GA5045@e107155-lin> From: =?UTF-8?Q?Andr=c3=a9_Przywara?= Openpgp: preference=signencrypt Autocrypt: addr=andre.przywara@arm.com; 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Message-ID: Date: Mon, 27 May 2019 00:59:23 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: <20190524175658.GA5045@e107155-lin> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190526_165951_132186_28BAF37C X-CRM114-Status: GOOD ( 21.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "mark.rutland@arm.com" , "devicetree@vger.kernel.org" , Peng Fan , "festevam@gmail.com" , "jassisinghbrar@gmail.com" , "linux-kernel@vger.kernel.org" , "robh+dt@kernel.org" , dl-linux-imx , "kernel@pengutronix.de" , "van.freenix@gmail.com" , "shawnguo@kernel.org" , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 24/05/2019 18:56, Sudeep Holla wrote: > On Thu, May 23, 2019 at 10:30:50AM -0700, Florian Fainelli wrote: Hi, >> On 5/22/19 10:50 PM, Peng Fan wrote: >>> This is a modified version from Andre Przywara's patch series >>> https://lore.kernel.org/patchwork/cover/812997/. >>> [1] is a draft implementation of i.MX8MM SCMI ATF implementation that >>> use smc as mailbox, power/clk is included, but only part of clk has been >>> implemented to work with hardware, power domain only supports get name >>> for now. >>> >>> The traditional Linux mailbox mechanism uses some kind of dedicated hardware >>> IP to signal a condition to some other processing unit, typically a dedicated >>> management processor. >>> This mailbox feature is used for instance by the SCMI protocol to signal a >>> request for some action to be taken by the management processor. >>> However some SoCs does not have a dedicated management core to provide >>> those services. In order to service TEE and to avoid linux shutdown >>> power and clock that used by TEE, need let firmware to handle power >>> and clock, the firmware here is ARM Trusted Firmware that could also >>> run SCMI service. >>> >>> The existing SCMI implementation uses a rather flexible shared memory >>> region to communicate commands and their parameters, it still requires a >>> mailbox to actually trigger the action. >> >> We have had something similar done internally with a couple of minor >> differences: >> >> - a SGI is used to send SCMI notifications/delayed replies to support >> asynchronism (patches are in the works to actually add that to the Linux >> SCMI framework). There is no good support for SGI in the kernel right >> now so we hacked up something from the existing SMP code and adding the >> ability to register our own IPI handlers (SHAME!). Using a PPI should >> work and should allow for using request_irq() AFAICT. >> > > We have been thinking this since we were asked if SMC can be transport. > Generally out of 16 SGIs, 8 are reserved for secure side and non-secure > has 8. Of these 8, IIUC 7 is already being used by kernel. So unless we > manage to get the last one reserved exclusive to SCMI, it makes it > difficult to add SGI support in SCMI. > > We have been telling partners/vendors about this limitation if they > use SMC as transport and need to have dedicated h/w interrupt for the > notifications. > > Another issue could be with virtualisation(using HVC) and EL handling > so called SCMI SGI. We need to think about those too. I will try to get > more info on this and come back on this. I think regardless of the *current* feasibility of using SGIs in *Linux* we should at least specify an "interrupts" property in the binding, to allow for future usage. We might copy the pmuv3 way [1] of allowing to specify multiple SPI interrupts as well, to give more flexibility. After all an implementation could offload the asynchronous notification to a separate core, and that could use SPIs, for instance. Cheers, Andre. [1] Documentation/devicetree/bindings/arm/pmu.yaml:45 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel