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From: Guiting Shen <aarongt.shen@gmail.com>
To: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>
Cc: linux-pwm@vger.kernel.org, alexandre.belloni@bootlin.com,
	linux-kernel@vger.kernel.org, thierry.reding@gmail.com,
	claudiu.beznea@microchip.com,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v4] pwm: atmel: Enable clk when pwm already enabled in bootloader
Date: Wed, 12 Jul 2023 22:28:12 +0800	[thread overview]
Message-ID: <d1c9dce9-9dbc-46bf-0d18-6d90a3ae7610@gmail.com> (raw)
In-Reply-To: <20230712135553.trqkxtcuiemwzgwe@pengutronix.de>



On Wed,Jul 12,2023 at 21:55:53PM GMT+8, Uwe Kleine-König wrote:
> On Wed, Jul 12, 2023 at 09:43:47PM +0800, Guiting Shen wrote:
>> The driver would never call clk_enable() if the PWM channel was already
>> enabled in bootloader which lead to dump the warning message "the PWM
>> clock already disabled" when turning off the PWM channel.
>>
>> Add atmel_pwm_enable_clk_if_on() in probe function to enable clock if
>> the PWM channel was already enabled in bootloader.
>>
>> Signed-off-by: Guiting Shen <aarongt.shen@gmail.com>
>> ---
>>   drivers/pwm/pwm-atmel.c | 40 +++++++++++++++++++++++++++++++++++++++-
>>   1 file changed, 39 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c
>> index cdbc23649032..28ea0f7267ca 100644
>> --- a/drivers/pwm/pwm-atmel.c
>> +++ b/drivers/pwm/pwm-atmel.c
>> @@ -36,7 +36,7 @@
>>   #define PWM_SR			0x0C
>>   #define PWM_ISR			0x1C
>>   /* Bit field in SR */
>> -#define PWM_SR_ALL_CH_ON	0x0F
>> +#define PWM_SR_ALL_CH_MASK	0x0F
>>   
>>   /* The following register is PWM channel related registers */
>>   #define PWM_CH_REG_OFFSET	0x200
>> @@ -464,6 +464,37 @@ static const struct of_device_id atmel_pwm_dt_ids[] = {
>>   };
>>   MODULE_DEVICE_TABLE(of, atmel_pwm_dt_ids);
>>   
>> +static int atmel_pwm_enable_clk_if_on(struct atmel_pwm_chip *atmel_pwm)
>> +{
>> +	unsigned int i;
>> +	int err;
>> +	u32 sr;
>> +
>> +	sr = atmel_pwm_readl(atmel_pwm, PWM_SR);
>> +	if (!(sr & PWM_SR_ALL_CH_MASK))
>> +		return 0;
>> +
>> +	for (i = 0; i < atmel_pwm->chip.npwm; i++) {
>> +		if (!(sr & (1 << i)))
>> +			continue;
>> +
>> +		err = clk_enable(atmel_pwm->clk);
>> +		if (err) {
>> +			dev_err(atmel_pwm->chip.dev,
>> +				"failed to enable clock for pwm #%d: %pe\n",
>> +							i, ERR_PTR(err));
>> +
>> +			while (i--) {
>> +				if (sr & (1 << i))
>> +					clk_disable(atmel_pwm->clk);
>> +			}
>> +			return err;
>> +		}
>> +	}
>> +
>> +	return 0;
>> +}
>> +
>>   static int atmel_pwm_probe(struct platform_device *pdev)
>>   {
>>   	struct atmel_pwm_chip *atmel_pwm;
>> @@ -504,8 +535,15 @@ static int atmel_pwm_probe(struct platform_device *pdev)
>>   
>>   	platform_set_drvdata(pdev, atmel_pwm);
>>   
>> +	ret = atmel_pwm_enable_clk_if_on(atmel_pwm);
>> +	if (ret < 0)
>> +		goto remove_pwmchip;
>> +
>>   	return ret;
>>   
>> +remove_pwmchip:
>> +	pwmchip_remove(&atmel_pwm->chip);
>> +
> 
> I'd consider it more natural to do the atmel_pwm_enable_clk_if_on() call
> before registering the pwmchip. But I guess it works like this, too.
> (Well unless it's possible that there are set bits in PWM_SR and the
> clock is off.)

It need to invoke something like atmel_pwm_disable_clk_if_on() after 
failing to register the pwmchip when call the 
atmel_pwm_enable_clk_if_on() first which I feel inconvenient.
And it's impossible to enable PWM channels before enabling the clock.
The bits set in PWM_SR means that the PWM channel and the clock turn on.


-- 
Best regards,
Guiting Shen

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      reply	other threads:[~2023-07-12 14:28 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-12 13:43 [PATCH v4] pwm: atmel: Enable clk when pwm already enabled in bootloader Guiting Shen
2023-07-12 13:55 ` Uwe Kleine-König
2023-07-12 14:28   ` Guiting Shen [this message]

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