From mboxrd@z Thu Jan 1 00:00:00 1970 From: oss@buserror.net (Scott Wood) Date: Thu, 30 Aug 2018 12:39:44 -0500 Subject: [PATCH 3/5] drivers: clk-qoriq: Add clockgen support for lx2160a In-Reply-To: References: <1534747636-20064-1-git-send-email-vabhav.sharma@nxp.com> <1534747636-20064-4-git-send-email-vabhav.sharma@nxp.com> <4a9ea6b451683ec98c92e86a5ae6b91213a6afcf.camel@buserror.net> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Thu, 2018-08-30 at 07:36 +0000, Vabhav Sharma wrote: > > -----Original Message----- > > From: linux-kernel-owner at vger.kernel.org > owner at vger.kernel.org> On Behalf Of Scott Wood > > Sent: Wednesday, August 29, 2018 5:49 AM > > To: Vabhav Sharma ; linux- > > kernel at vger.kernel.org; devicetree at vger.kernel.org; robh+dt at kernel.org; > > mark.rutland at arm.com; linuxppc-dev at lists.ozlabs.org; linux-arm- > > kernel at lists.infradead.org; mturquette at baylibre.com; sboyd at kernel.org; > > rjw at rjwysocki.net; viresh.kumar at linaro.org; linux-clk at vger.kernel.org; > > linux-pm at vger.kernel.org; linux-kernel-owner at vger.kernel.org; > > catalin.marinas at arm.com; will.deacon at arm.com; > > gregkh at linuxfoundation.org; arnd at arndb.de; > > kstewart at linuxfoundation.org; yamada.masahiro at socionext.com > > Cc: Yogesh Narayan Gaur ; Andy Tang > > ; Udit Kumar ; > > linux at armlinux.org.uk; Varun Sethi > > Subject: Re: [PATCH 3/5] drivers: clk-qoriq: Add clockgen support for > > lx2160a > > > > On Mon, 2018-08-20 at 12:17 +0530, Vabhav Sharma wrote: > > > From: Yogesh Gaur > > > > > > Add clockgen support for lx2160a. > > > Added entry for compat 'fsl,lx2160a-clockgen'. > > > As LX2160A is 16 core, so modified value for NUM_CMUX > > > > > > Signed-off-by: Tang Yuantian > > > Signed-off-by: Yogesh Gaur > > > Signed-off-by: Vabhav Sharma > > > --- > > > drivers/clk/clk-qoriq.c | 14 +++++++++++++- > > > drivers/cpufreq/qoriq-cpufreq.c | 1 + > > > 2 files changed, 14 insertions(+), 1 deletion(-) > > > > > > diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c index > > > 3a1812f..fc6e308 100644 > > > --- a/drivers/clk/clk-qoriq.c > > > +++ b/drivers/clk/clk-qoriq.c > > > @@ -60,7 +60,7 @@ struct clockgen_muxinfo { }; > > > > > > #define NUM_HWACCEL 5 > > > -#define NUM_CMUX 8 > > > +#define NUM_CMUX 16 > > > > > > struct clockgen; > > > > > > @@ -570,6 +570,17 @@ static const struct clockgen_chipinfo chipinfo[] = > > > { > > > .flags = CG_VER3 | CG_LITTLE_ENDIAN, > > > }, > > > { > > > + .compat = "fsl,lx2160a-clockgen", > > > + .cmux_groups = { > > > + &clockgen2_cmux_cga12, &clockgen2_cmux_cgb > > > + }, > > > + .cmux_to_group = { > > > + 0, 0, 0, 0, 1, 1, 1, 1, -1 > > > + }, > > > + .pll_mask = 0x37, > > > + .flags = CG_VER3 | CG_LITTLE_ENDIAN, > > > + }, > > > > Why are you increasing NUM_CMUX beyond 8 for a chip that only has 8 > > entries in cmux_to_group? > > Configuration is 16 cores,8 cluster with 2 cores in each cluster So? This is about cmuxes, not cores. You're increasing the array without ever using the new size. -Scott