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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-246687b52f9sm89900155ad.59.2025.08.26.02.17.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 26 Aug 2025 02:17:22 -0700 (PDT) Message-ID: Date: Tue, 26 Aug 2025 17:17:18 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 1/3] coresight: tpda: Add sysfs node for tpda cross-trigger configuration From: Jie Gan To: James Clark Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Suzuki K Poulose , Mike Leach , Alexander Shishkin , Tingwei Zhang References: <20250826070150.5603-1-jie.gan@oss.qualcomm.com> <20250826070150.5603-2-jie.gan@oss.qualcomm.com> <60355fd1-2126-493f-93fe-a36c198a0b32@linaro.org> Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODIzMDA0MyBTYWx0ZWRfXzwkxDOYapQQR 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policy=outbound score=0 priorityscore=1501 spamscore=0 clxscore=1015 suspectscore=0 phishscore=0 bulkscore=0 impostorscore=0 adultscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508230043 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250826_021724_797076_3FD55EE4 X-CRM114-Status: GOOD ( 23.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 8/26/2025 5:09 PM, Jie Gan wrote: > > > On 8/26/2025 5:00 PM, James Clark wrote: >> >> >> On 26/08/2025 8:01 am, Jie Gan wrote: >>> From: Tao Zhang >>> >>> Introduce sysfs nodes to configure cross-trigger parameters for TPDA. >>> These registers define the characteristics of cross-trigger packets, >>> including generation frequency and flag values. >>> >>> Signed-off-by: Tao Zhang >>> Co-developed-by: Jie Gan >>> Signed-off-by: Jie Gan >>> --- >>>   .../testing/sysfs-bus-coresight-devices-tpda  |  43 ++++ >>>   drivers/hwtracing/coresight/coresight-tpda.c  | 241 ++++++++++++++++++ >>>   drivers/hwtracing/coresight/coresight-tpda.h  |  27 ++ >>>   3 files changed, 311 insertions(+) >>>   create mode 100644 Documentation/ABI/testing/sysfs-bus-coresight- >>> devices-tpda >>> >>> diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices- >>> tpda b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda >>> new file mode 100644 >>> index 000000000000..e827396a0fa1 >>> --- /dev/null >>> +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda >>> @@ -0,0 +1,43 @@ >>> +What:        /sys/bus/coresight/devices//trig_async_enable >>> +Date:        August 2025 >>> +KernelVersion:    6.17 >>> +Contact:    Jinlong Mao , Tao Zhang >>> , Jie Gan >>> +Description: >>> +        (RW) Enable/disable cross trigger synchronization sequence >>> interface. >>> + >>> +What:        /sys/bus/coresight/devices//trig_flag_ts_enable >>> +Date:        August 2025 >>> +KernelVersion:    6.17 >>> +Contact:    Jinlong Mao , Tao Zhang >>> , Jie Gan >>> +Description: >>> +        (RW) Enable/disable cross trigger FLAG packet request >>> interface. >>> + >>> +What:        /sys/bus/coresight/devices//trig_freq_enable >>> +Date:        August 2025 >>> +KernelVersion:    6.17 >>> +Contact:    Jinlong Mao , Tao Zhang >>> , Jie Gan >>> +Description: >>> +        (RW) Enable/disable cross trigger FREQ packet request >>> interface. >>> + >>> +What:        /sys/bus/coresight/devices//freq_ts_enable >>> +Date:        August 2025 >>> +KernelVersion:    6.17 >>> +Contact:    Jinlong Mao , Tao Zhang >>> , Jie Gan >>> +Description: >>> +        (RW) Enable/disable the timestamp for all FREQ packets. >>> + >>> +What:        /sys/bus/coresight/devices//global_flush_req >>> +Date:        August 2025 >>> +KernelVersion:    6.17 >>> +Contact:    Jinlong Mao , Tao Zhang >>> , Jie Gan >>> +Description: >>> +        (RW) Set/unset global (all ports) flush request bit. The bit >>> remains set until a >> >> I don't think you can unset? global_flush_req_store() only does >> something for set. Sorry for just missed this comment. I think we dont need do the unset. The unset will done by register itself after the flush work has done. I will update the description to correct this point. Thanks, Jie >> >>> +        global flush request sequence completes. >>> + >>> +What:        /sys/bus/coresight/devices//cmbchan_mode >>> +Date:        August 2025 >>> +KernelVersion:    6.17 >>> +Contact:    Jinlong Mao , Tao Zhang >>> , Jie Gan >>> +Description: >>> +        (RW) Configure the CMB/MCMB channel mode for all enabled ports. >>> +        Value 0 means raw channel mapping mode. Value 1 means >>> channel pair marking mode. >>> diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/ >>> hwtracing/coresight/coresight-tpda.c >>> index 4e93fa5bace4..cc254d53b8ec 100644 >>> --- a/drivers/hwtracing/coresight/coresight-tpda.c >>> +++ b/drivers/hwtracing/coresight/coresight-tpda.c >>> @@ -156,9 +156,37 @@ static void tpda_enable_pre_port(struct >>> tpda_drvdata *drvdata) >>>       u32 val; >>>       val = readl_relaxed(drvdata->base + TPDA_CR); >>> +    val &= ~TPDA_CR_MID; >>>       val &= ~TPDA_CR_ATID; >>>       val |= FIELD_PREP(TPDA_CR_ATID, drvdata->atid); >>> +    if (drvdata->trig_async) >>> +        val = val | TPDA_CR_SRIE; >>> +    else >>> +        val = val & ~TPDA_CR_SRIE; >> >> val |= >> val &= >> > > Will update in next version. > >>> +    if (drvdata->trig_flag_ts) >>> +        val = val | TPDA_CR_FLRIE; >>> +    else >>> +        val = val & ~TPDA_CR_FLRIE; >>> +    if (drvdata->trig_freq) >>> +        val = val | TPDA_CR_FRIE; >>> +    else >>> +        val = val & ~TPDA_CR_FRIE; >>> +    if (drvdata->freq_ts) >>> +        val = val | TPDA_CR_FREQTS; >>> +    else >>> +        val = val & ~TPDA_CR_FREQTS; >>> +    if (drvdata->cmbchan_mode) >>> +        val = val | TPDA_CR_CMBCHANMODE; >>> +    else >>> +        val = val & ~TPDA_CR_CMBCHANMODE; >>>       writel_relaxed(val, drvdata->base + TPDA_CR); >>> + >>> +    /* >>> +     * If FLRIE bit is set, set the master and channel >>> +     * id as zero >>> +     */ >>> +    if (drvdata->trig_flag_ts) >>> +        writel_relaxed(0x0, drvdata->base + TPDA_FPID_CR); >>>   } >>>   static int tpda_enable_port(struct tpda_drvdata *drvdata, int port) >>> @@ -274,6 +302,217 @@ static const struct coresight_ops tpda_cs_ops = { >>>       .link_ops    = &tpda_link_ops, >>>   }; >>> +static ssize_t trig_async_enable_show(struct device *dev, >>> +                      struct device_attribute *attr, >>> +                      char *buf) >>> +{ >>> +    struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); >>> + >>> +    return sysfs_emit(buf, "%u\n", (unsigned int)drvdata->trig_async); >>> +} >>> + >>> +static ssize_t trig_async_enable_store(struct device *dev, >>> +                       struct device_attribute *attr, >>> +                       const char *buf, >>> +                       size_t size) >>> +{ >>> +    struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); >>> +    unsigned long val; >>> + >>> +    if (kstrtoul(buf, 0, &val)) >>> +        return -EINVAL; >>> + >>> +    guard(spinlock)(&drvdata->spinlock); >>> +    if (val) >>> +        drvdata->trig_async = true; >>> +    else >>> +        drvdata->trig_async = false; >>> + >> >> drvdata->trig_async = !!val >> >> same with all the following ones too >> > > Will address all codes. > >>> +    return size; >>> +} >>> +static DEVICE_ATTR_RW(trig_async_enable); >>> + >>> +static ssize_t trig_flag_ts_enable_show(struct device *dev, >>> +                    struct device_attribute *attr, >>> +                    char *buf) >>> +{ >>> +    struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); >>> + >>> +    return sysfs_emit(buf, "%u\n", (unsigned int)drvdata- >>> >trig_flag_ts); >>> +} >>> + >>> +static ssize_t trig_flag_ts_enable_store(struct device *dev, >>> +                     struct device_attribute *attr, >>> +                     const char *buf, >>> +                     size_t size) >>> +{ >>> +    struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); >>> +    unsigned long val; >>> + >>> +    if (kstrtoul(buf, 0, &val)) >>> +        return -EINVAL; >>> + >>> +    guard(spinlock)(&drvdata->spinlock); >>> +    if (val) >>> +        drvdata->trig_flag_ts = true; >>> +    else >>> +        drvdata->trig_flag_ts = false; >>> + >>> +    return size; >>> +} >>> +static DEVICE_ATTR_RW(trig_flag_ts_enable); >>> + >>> +static ssize_t trig_freq_enable_show(struct device *dev, >>> +                      struct device_attribute *attr, >>> +                      char *buf) >>> +{ >>> +    struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); >>> + >>> +    return sysfs_emit(buf, "%u\n", (unsigned int)drvdata->trig_freq); >>> +} >>> + >>> +static ssize_t trig_freq_enable_store(struct device *dev, >>> +                      struct device_attribute *attr, >>> +                      const char *buf, >>> +                      size_t size) >>> +{ >>> +    struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); >>> +    unsigned long val; >>> + >>> +    if (kstrtoul(buf, 0, &val)) >>> +        return -EINVAL; >>> + >>> +    guard(spinlock)(&drvdata->spinlock); >>> +    if (val) >>> +        drvdata->trig_freq = true; >>> +    else >>> +        drvdata->trig_freq = false; >>> + >>> +    return size; >>> +} >>> +static DEVICE_ATTR_RW(trig_freq_enable); >>> + >>> +static ssize_t freq_ts_enable_show(struct device *dev, >>> +                   struct device_attribute *attr, >>> +                   char *buf) >>> +{ >>> +    struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); >>> + >>> +    return sysfs_emit(buf, "%u\n", (unsigned int)drvdata->freq_ts); >>> +} >>> + >>> +static ssize_t freq_ts_enable_store(struct device *dev, >>> +                    struct device_attribute *attr, >>> +                    const char *buf, >>> +                    size_t size) >>> +{ >>> +    struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); >>> +    unsigned long val; >>> + >>> +    if (kstrtoul(buf, 0, &val)) >>> +        return -EINVAL; >>> + >>> +    guard(spinlock)(&drvdata->spinlock); >>> +    if (val) >>> +        drvdata->freq_ts = true; >>> +    else >>> +        drvdata->freq_ts = false; >>> + >>> +    return size; >>> +} >>> +static DEVICE_ATTR_RW(freq_ts_enable); >>> + >>> +static ssize_t global_flush_req_show(struct device *dev, >>> +                     struct device_attribute *attr, >>> +                     char *buf) >>> +{ >>> +    struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); >>> +    unsigned long val; >>> + >>> +    guard(spinlock)(&drvdata->spinlock); >>> +    if (!drvdata->csdev->refcnt) >>> +        return -EPERM; >> >> -EPERM doesn't seem right, maybe EBUSY or EINVAL? > > I think EINVAL is better just because the TPDA is not enabled yet. Will > fix. > >> >> Also don't you need CS_UNLOCK() for reading? I'm not 100% sure but I >> found one example of it in debug_init_arch_data(). >> > > Sorry about that, I shouldnt miss the CS_UNLOCK&&CS_LOCK pairs. > >>> + >>> +    val = readl_relaxed(drvdata->base + TPDA_CR); >>> +    return sysfs_emit(buf, "%lx\n", val); >>> +} >>> + >>> +static ssize_t global_flush_req_store(struct device *dev, >>> +                      struct device_attribute *attr, >>> +                      const char *buf, >>> +                      size_t size) >>> +{ >>> +    struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); >>> +    unsigned long val; >>> + >>> +    if (kstrtoul(buf, 0, &val)) >>> +        return -EINVAL; >>> + >> >> if (!val) >>    return size; >> >> Check this first, no point in taking the spinlock or checking the >> refcount if you aren't going to do anything. > > Will fix it. > >> >>> +    guard(spinlock)(&drvdata->spinlock); >>> +    if (!drvdata->csdev->refcnt) >>> +        return -EPERM; >> >> ditto for -EPERM > > Will fix it. > > Thanks, > Jie > >> >>> + >>> +    if (val) { >>> +        CS_UNLOCK(drvdata->base); >>> +        val = readl_relaxed(drvdata->base + TPDA_CR); >>> +        val = val | BIT(0); >>> +        writel_relaxed(val, drvdata->base + TPDA_CR); >>> +        CS_LOCK(drvdata->base); >>> +    } >>> + >>> +    return size; >>> +} >>> +static DEVICE_ATTR_RW(global_flush_req); >>> + >>> +static ssize_t cmbchan_mode_show(struct device *dev, >>> +                 struct device_attribute *attr, >>> +                 char *buf) >>> +{ >>> +    struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); >>> + >>> +    return sysfs_emit(buf, "%u\n", (unsigned int)drvdata- >>> >cmbchan_mode); >>> +} >>> + >>> +static ssize_t cmbchan_mode_store(struct device *dev, >>> +                  struct device_attribute *attr, >>> +                  const char *buf, >>> +                  size_t size) >>> +{ >>> +    struct tpda_drvdata *drvdata = dev_get_drvdata(dev->parent); >>> +    bool val; >>> + >>> +    if (kstrtobool(buf, &val)) >>> +        return -EINVAL; >>> + >>> +    guard(spinlock)(&drvdata->spinlock); >>> +    if (val) >>> +        drvdata->cmbchan_mode = true; >>> +    else >>> +        drvdata->cmbchan_mode = false; >>> + >>> +    return size; >>> +} >>> +static DEVICE_ATTR_RW(cmbchan_mode); >>> + >>> +static struct attribute *tpda_attrs[] = { >>> +    &dev_attr_trig_async_enable.attr, >>> +    &dev_attr_trig_flag_ts_enable.attr, >>> +    &dev_attr_trig_freq_enable.attr, >>> +    &dev_attr_freq_ts_enable.attr, >>> +    &dev_attr_global_flush_req.attr, >>> +    &dev_attr_cmbchan_mode.attr, >>> +    NULL, >>> +}; >>> + >>> +static struct attribute_group tpda_attr_grp = { >>> +    .attrs = tpda_attrs, >>> +}; >>> + >>> +static const struct attribute_group *tpda_attr_grps[] = { >>> +    &tpda_attr_grp, >>> +    NULL, >>> +}; >>> + >>>   static int tpda_init_default_data(struct tpda_drvdata *drvdata) >>>   { >>>       int atid; >>> @@ -289,6 +528,7 @@ static int tpda_init_default_data(struct >>> tpda_drvdata *drvdata) >>>           return atid; >>>       drvdata->atid = atid; >>> +    drvdata->freq_ts = true; >>>       return 0; >>>   } >>> @@ -332,6 +572,7 @@ static int tpda_probe(struct amba_device *adev, >>> const struct amba_id *id) >>>       desc.ops = &tpda_cs_ops; >>>       desc.pdata = adev->dev.platform_data; >>>       desc.dev = &adev->dev; >>> +    desc.groups = tpda_attr_grps; >>>       desc.access = CSDEV_ACCESS_IOMEM(base); >>>       drvdata->csdev = coresight_register(&desc); >>>       if (IS_ERR(drvdata->csdev)) >>> diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/ >>> hwtracing/coresight/coresight-tpda.h >>> index c6af3d2da3ef..b651372d4c88 100644 >>> --- a/drivers/hwtracing/coresight/coresight-tpda.h >>> +++ b/drivers/hwtracing/coresight/coresight-tpda.h >>> @@ -8,17 +8,34 @@ >>>   #define TPDA_CR            (0x000) >>>   #define TPDA_Pn_CR(n)        (0x004 + (n * 4)) >>> +#define TPDA_FPID_CR        (0x084) >>> + >>> +/* Cross trigger FREQ packets timestamp bit */ >>> +#define TPDA_CR_FREQTS        BIT(2) >>> +/* Cross trigger FREQ packet request bit */ >>> +#define TPDA_CR_FRIE        BIT(3) >>> +/* Cross trigger FLAG packet request interface bit */ >>> +#define TPDA_CR_FLRIE        BIT(4) >>> +/* Cross trigger synchronization bit */ >>> +#define TPDA_CR_SRIE        BIT(5) >>> +/* Packetize CMB/MCMB traffic bit */ >>> +#define TPDA_CR_CMBCHANMODE    BIT(20) >>> + >>>   /* Aggregator port enable bit */ >>>   #define TPDA_Pn_CR_ENA        BIT(0) >>>   /* Aggregator port CMB data set element size bit */ >>>   #define TPDA_Pn_CR_CMBSIZE        GENMASK(7, 6) >>>   /* Aggregator port DSB data set element size bit */ >>>   #define TPDA_Pn_CR_DSBSIZE        BIT(8) >>> +/* Mode control bit */ >>> +#define TPDA_MODE_CTRL            BIT(12) >>>   #define TPDA_MAX_INPORTS    32 >>>   /* Bits 6 ~ 12 is for atid value */ >>>   #define TPDA_CR_ATID        GENMASK(12, 6) >>> +/* Bits 13 ~ 19 is for mid value */ >>> +#define TPDA_CR_MID        GENMASK(19, 13) >>>   /** >>>    * struct tpda_drvdata - specifics associated to an TPDA component >>> @@ -29,6 +46,11 @@ >>>    * @enable:     enable status of the component. >>>    * @dsb_esize   Record the DSB element size. >>>    * @cmb_esize   Record the CMB element size. >>> + * @trig_async:    Enable/disable cross trigger synchronization >>> sequence interface. >>> + * @trig_flag_ts: Enable/disable cross trigger FLAG packet request >>> interface. >>> + * @trig_freq:    Enable/disable cross trigger FREQ packet request >>> interface. >>> + * @freq_ts:    Enable/disable the timestamp for all FREQ packets. >>> + * @cmbchan_mode: Configure the CMB/MCMB channel mode. >>>    */ >>>   struct tpda_drvdata { >>>       void __iomem        *base; >>> @@ -38,6 +60,11 @@ struct tpda_drvdata { >>>       u8            atid; >>>       u32            dsb_esize; >>>       u32            cmb_esize; >>> +    bool            trig_async; >>> +    bool            trig_flag_ts; >>> +    bool            trig_freq; >>> +    bool            freq_ts; >>> +    bool            cmbchan_mode; >>>   }; >>>   #endif  /* _CORESIGHT_CORESIGHT_TPDA_H */ >> > >