From: Florian Fainelli <florian.fainelli@broadcom.com>
To: Nicolai Buchwitz <nb@tipi-net.de>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney+clk@redhat.com>,
Jerome Brunet <jbrunet+clk@baylibre.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Broadcom internal kernel review list
<bcm-kernel-feedback-list@broadcom.com>,
Ray Jui <rjui@broadcom.com>,
Scott Branden <sbranden@broadcom.com>
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-rpi-kernel@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Andrew Lunn <andrew@lunn.ch>,
Stefan Wahren <wahrenst@gmx.net>,
Phil Elwell <phil@raspberrypi.com>,
netdev@vger.kernel.org, James Clark <jjc@jclark.com>
Subject: Re: [PATCH 2/3] clk: bcm2835: register the BCM2711 GISB clock
Date: Tue, 20 Oct 2026 08:40:23 -0700 [thread overview]
Message-ID: <d31ed7f0-2b4e-46a8-9345-68173710dd0f@broadcom.com> (raw)
In-Reply-To: <20261020-devel-bcm2711-gisb-clk-v1-2-a1728724d0f8@tipi-net.de>
On 10/20/26 07:58, Nicolai Buchwitz wrote:
> The generator at CM offset 0x1d8 is not in any documentation I could
> find, but the firmware calls it gisb and runs it at 200 MHz off
> PLLD_PER with a 3.75 divider. GISB is the register bus of the STB
> peripherals, and on BCM2711 the GENET MDIO controller clocks its MDC
> from it. mdio-bcm-unimac wants that rate to work out the MDC period.
>
> Mark it critical. The firmware enables it at boot and nothing in Linux
> owns it, so it must never be gated.
>
> Checked on a Raspberry Pi CM4 by moving the divider at runtime, the
> MDIO busy time follows it.
>
> Signed-off-by: Nicolai Buchwitz <nb@tipi-net.de>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
> ---
> drivers/clk/bcm/clk-bcm2835.c | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c
> index 118df86d717c6..bc1de20c7e00e 100644
> --- a/drivers/clk/bcm/clk-bcm2835.c
> +++ b/drivers/clk/bcm/clk-bcm2835.c
> @@ -117,6 +117,8 @@
> #define CM_EMMCDIV 0x1c4
> #define CM_EMMC2CTL 0x1d0
> #define CM_EMMC2DIV 0x1d4
> +#define CM_GISBCTL 0x1d8
> +#define CM_GISBDIV 0x1dc
Yes, those names are correct and accurate here.
--
Florian
next prev parent reply other threads:[~2026-10-20 16:39 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-20 14:58 [PATCH 0/3] clk: bcm2835: describe the BCM2711 GISB clock for the GENET MDIO controller Nicolai Buchwitz
2026-10-20 14:58 ` [PATCH 1/3] dt-bindings: clock: bcm2835: add the BCM2711 GISB clock Nicolai Buchwitz
2026-10-20 15:38 ` Florian Fainelli
2026-10-20 14:58 ` [PATCH 2/3] clk: bcm2835: register " Nicolai Buchwitz
2026-10-20 15:40 ` Florian Fainelli [this message]
2026-10-20 14:58 ` [PATCH 3/3] ARM: dts: bcm2711: give the GENET MDIO controller its clock Nicolai Buchwitz
2026-10-20 15:40 ` Florian Fainelli
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