From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B05D8C4332F for ; Fri, 15 Dec 2023 17:43:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=hA7uPpJqP4321H59iZWATnGLelqfb8o5DGBCESaBtcE=; b=IRCBujrp5Yj1a8 p+pyfeh+9+JgMoUKDPXfd7XDgtm7f4QSQtbktgHJUSQe3QPsUFZ2TUuCPM9/i6N+3APrGz5LEZdcI sgXdMBPJ+a3N1uYAxzWIMRt1hxR0vbgx1t6w+G/KyYcLIu8mQYUfJy61rKCi0XudLmikT3Z68BTIi VCcOr52+9+1SXKI81npXTOafkhdAdGgVe8BZbszWy25B5Q+pr472ofHqX6areM/HaVmUU701ITtNJ dBaCHQcr5hXgu6ybguD7Ce0mgG26pBPDVqawzVEHEpPIbGcwiN6Fj+88LJTQhIDYPVbQvezCDUW3/ nSdQEePyPCMzArmu/Rdw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rECDC-0047qj-05; Fri, 15 Dec 2023 17:42:58 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rECD9-0047qO-18 for linux-arm-kernel@lists.infradead.org; Fri, 15 Dec 2023 17:42:57 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0E005C15; Fri, 15 Dec 2023 09:43:38 -0800 (PST) Received: from [192.168.1.3] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3404A3F5A1; Fri, 15 Dec 2023 09:42:51 -0800 (PST) Message-ID: Date: Fri, 15 Dec 2023 17:42:50 +0000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 Subject: Re: [PATCH 1/2] arm: perf: Fix ARCH=arm build with GCC in armv8pmu_write_evtype() Content-Language: en-US To: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-next@vger.kernel.org, will@kernel.org, u.kleine-koenig@pengutronix.de, Nathan Chancellor , Nick Desaulniers , Bill Wendling , Justin Stitt , Anshuman Khandual , Suzuki K Poulose , linux-kernel@vger.kernel.org, llvm@lists.linux.dev References: <20231215150040.3342183-1-james.clark@arm.com> <20231215150040.3342183-2-james.clark@arm.com> From: James Clark In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231215_094255_435740_0405BA5B X-CRM114-Status: GOOD ( 21.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 15/12/2023 16:21, Mark Rutland wrote: > On Fri, Dec 15, 2023 at 03:00:38PM +0000, James Clark wrote: >> LLVM ignores everything inside the if statement and doesn't generate >> errors, but GCC doesn't ignore it, resulting in the following error: >> >> drivers/perf/arm_pmuv3.c: In function 'armv8pmu_write_evtype': >> include/linux/bits.h:34:29: error: left shift count >= width of type [-Werror=shift-count-overflow] >> 34 | (((~UL(0)) - (UL(1) << (l)) + 1) & \ >> >> Fix it by changing the if to #if. > > I reckon it'd be cleaner to use GENMASK_ULL for the TH and TC fields, in > include/linux/perf/arm_pmu.h have: > > | /* > | * PMXEVTYPER: Event selection reg > | */ > | #define ARMV8_PMU_EVTYPE_EVENT GENMASK(15, 0) /* Mask for EVENT bits */ > | #define ARMV8_PMU_EVTYPE_TH GENMASK_ULL(43, 32) /* arm64 only */ > | #define ARMV8_PMU_EVTYPE_TC GENMASK_ULL(63, 61) /* arm64 only */ > > IIUC that should silence this warning, and it'd remove the need for the > ifdeffery and other changes in patch 2. > > Does that work, or am I missing something? > > Thanks, > Mark. > You're right that does work. For some reason I thought there was some component of writing it to the mask that was the issue as well. I'll send another version with that fix instead. Thanks James >> >> Fixes: 3115ee021bfb ("arm64: perf: Include threshold control fields in PMEVTYPER mask") >> Reported-by: Uwe Kleine-K"onig >> Closes: https://lore.kernel.org/linux-arm-kernel/20231215120817.h2f3akgv72zhrtqo@pengutronix.de/ >> Signed-off-by: James Clark >> --- >> drivers/perf/arm_pmuv3.c | 5 +++-- >> 1 file changed, 3 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c >> index 23fa6c5da82c..3ed2086cefc3 100644 >> --- a/drivers/perf/arm_pmuv3.c >> +++ b/drivers/perf/arm_pmuv3.c >> @@ -631,8 +631,9 @@ static void armv8pmu_write_evtype(int idx, unsigned long val) >> ARMV8_PMU_EXCLUDE_EL0 | >> ARMV8_PMU_EXCLUDE_EL1; >> >> - if (IS_ENABLED(CONFIG_ARM64)) >> - mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH; >> +#if IS_ENABLED(CONFIG_ARM64) >> + mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH; >> +#endif >> >> val &= mask; >> write_pmevtypern(counter, val); >> -- >> 2.34.1 >> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel