From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 94D02C433EF for ; Wed, 1 Dec 2021 15:52:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:Cc:To:Subject:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=vBQXOHmjaYoIBfxf4MX1Z+3Nz5eR1/6zwFZBDHa1ld0=; b=1dvfLsRNUsV6Ov7NclXlR+EFXg F5U3LHy8l7ZjTJ72JDklN4x5hX3j97Dv6bDFuwSZxal1zRDIY5RQBlPR4DbmRYnKVi6jXsR/apa7V R98wSE1RtYoVXy5xKwPi3SeUYUPAFHb9AzGL2f7J29xaAQC6/j7r+ZlM50+pg4yYphfCIYm2i1J7S 1FkauJcELw8czoFgq49JlbxQMZr5D7/cBaePVHFlLY/nbedB81hDRU9eTv7zkSE6sw4vCAKZ8aMFn N2P99166S/x40uQhFjAjge2AyponQxLwz05gCyAOzxpGaom05PKPHy6oDaBhZ5d1IPX+A5SHg/hYs l14cCzAw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1msRtH-009GVJ-4y; Wed, 01 Dec 2021 15:51:27 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1msRtC-009GUj-TB for linux-arm-kernel@lists.infradead.org; Wed, 01 Dec 2021 15:51:24 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 086A6147A; Wed, 1 Dec 2021 07:51:22 -0800 (PST) Received: from [10.57.0.220] (unknown [10.57.0.220]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A68AF3F766; Wed, 1 Dec 2021 07:51:20 -0800 (PST) Subject: Re: [PATCH 2/2] irqchip: nvic: Use GENERIC_IRQ_MULTI_HANDLER To: Arnd Bergmann Cc: Linux ARM , Russell King - ARM Linux , Mark Rutland , Marc Zyngier , Ard Biesheuvel References: <20211201110259.84857-1-vladimir.murzin@arm.com> <20211201110259.84857-2-vladimir.murzin@arm.com> <26a97bb9-9b00-b162-8924-6b77309365b8@arm.com> <9cea0c85-33e6-6fce-f82a-22cd138e87d8@arm.com> From: Vladimir Murzin Message-ID: Date: Wed, 1 Dec 2021 15:51:19 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211201_075123_030351_0611C1E5 X-CRM114-Status: GOOD ( 29.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 12/1/21 3:13 PM, Arnd Bergmann wrote: > On Wed, Dec 1, 2021 at 3:15 PM Vladimir Murzin wrote: >> On 12/1/21 2:05 PM, Arnd Bergmann wrote: >>> >>> Yes, I saw that, but I'm not too worried about this on Arm, as we don't >>> support that combination (SMP without MMU) in any of our platforms or >>> in Kconfig without additional patches. >> >> That's true, yet it seems to be broken for other arches which seems to be >> supported (w/o additional patches?) > > Sure, it should get fixed, it's just not on my list of high-priority problems. > For j2, I think there isn't much work going on at the moment, and I think > there are other problems on sh nommu smp. For riscv K210, I think there > isn't as much interest any more after MMU-based platforms are becoming > more available. > >>> What target are you actually testing on? >>> >> >> It is MPS3 board with range of FPGA images. M and R class supported yet >> AN536 (Cortex-R52x2) has issues which prevents it using in SMP; recent >> images for M class require new timer (which is WIP). >> >> I also have access to Fast Models - they are easier and quicker to test >> and do not require visiting office :) > > Ok, I see. What are your plans for the Cortex-R support? My impression > was that there isn't really much interest in upstream support as there is > no commercial SoC platform using 32-bit Cortex-R that makes sense to > run Linux on (any more), and Cortex-R82 would run with MMU enabled. > Do you expect this to change in the future? There are not many patches to make Linux run on Cortex-R - it is mostly to undo multiplform, so I'm fine keeping them downstream. I cannot say how much interest in running Linux with 32-bit Cortex-R, yet occasionally people ask me how to do that (the same applies to M-class). > > As far as I can tell, there is no SMP-capable Cortex-M. If there is, > then Ard's THREAD_INFO_IN_TASK series may have another problem > because of the lack of the TPIDRURO register. Again, I'm not too > worried about that because mainline Linux does not support this > configuration, but it's something to keep in mind. I'm not aware of any SMP-capable Cortex-M either :) Cheers Vladimir > > Arnd > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel