From: claudiu beznea <claudiu.beznea@tuxon.dev>
To: Varshini Rajendran <varshini.rajendran@microchip.com>,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
nicolas.ferre@microchip.com, alexandre.belloni@bootlin.com,
mihai.sain@microchip.com, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v5 27/27] ARM: dts: microchip: sam9x75_curiosity: add sam9x75 curiosity board
Date: Sun, 14 Jul 2024 16:46:23 +0300 [thread overview]
Message-ID: <d36b0e70-f889-4aa2-b7af-b92cbaa573a6@tuxon.dev> (raw)
In-Reply-To: <20240703102943.196655-1-varshini.rajendran@microchip.com>
Hi, Varshini,
On 03.07.2024 13:29, Varshini Rajendran wrote:
> Add device tree file for sam9x75 curiosity board.
>
> Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
> ---
> Changes in v5:
> - Update commit message to match the directory structure.
> - Alphanumerically sorted Makefile entries.
> - Corrected VDDCore minimum voltage.
> - Enabled the i2s node.
> - Removed additional blank lines.
> - Enclosed each entry with separate <>.
> - Corrected pinctrl names to match Microchip convention.
> - Enabled slewrate in sdmmc node.
> - Corrected pinmux mask.
> - Added phandle to leds for ease of access with upcoming device entries.
> - Updated gpio pin number for red led.
> ---
> arch/arm/boot/dts/microchip/Makefile | 3 +
> .../dts/microchip/at91-sam9x75_curiosity.dts | 312 ++++++++++++++++++
> 2 files changed, 315 insertions(+)
> create mode 100644 arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dts
>
> diff --git a/arch/arm/boot/dts/microchip/Makefile b/arch/arm/boot/dts/microchip/Makefile
> index 0c45c8d17468..470fe46433a9 100644
> --- a/arch/arm/boot/dts/microchip/Makefile
> +++ b/arch/arm/boot/dts/microchip/Makefile
> @@ -2,6 +2,7 @@
> # Enables support for device-tree overlays
> DTC_FLAGS_at91-sam9x60_curiosity := -@
> DTC_FLAGS_at91-sam9x60ek := -@
> +DTC_FLAGS_at91-sam9x75_curiosity := -@
> DTC_FLAGS_at91-sama5d27_som1_ek := -@
> DTC_FLAGS_at91-sama5d27_wlsom1_ek := -@
> DTC_FLAGS_at91-sama5d29_curiosity := -@
> @@ -60,6 +61,8 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
> dtb-$(CONFIG_SOC_SAM9X60) += \
> at91-sam9x60_curiosity.dtb \
> at91-sam9x60ek.dtb
> +dtb-$(CONFIG_SOC_SAM9X7) += \
> + at91-sam9x75_curiosity.dtb
> dtb-$(CONFIG_SOC_SAM_V7) += \
> at91-kizbox2-2.dtb \
> at91-kizbox3-hs.dtb \
> diff --git a/arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dts b/arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dts
> new file mode 100644
> index 000000000000..4a4f14f13634
> --- /dev/null
> +++ b/arch/arm/boot/dts/microchip/at91-sam9x75_curiosity.dts
> @@ -0,0 +1,312 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * at91-sam9x75_curiosity.dts - Device Tree file for Microchip SAM9X75 Curiosity board
> + *
> + * Copyright (C) 2023 Microchip Technology Inc. and its subsidiaries
> + *
> + * Author: Varshini Rajendran <varshini.rajendran@microchip.com>
> + */
> +/dts-v1/;
> +#include "sam9x7.dtsi"
> +#include <dt-bindings/input/input.h>
> +
> +/ {
> + model = "Microchip SAM9X75 Curiosity";
> + compatible = "microchip,sam9x75-curiosity", "microchip,sam9x7", "atmel,at91sam9";
> +
> + aliases {
> + i2c0 = &i2c6;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_key_gpio_default>;
> +
> + button-user {
> + label = "USER";
> + gpios = <&pioC 9 GPIO_ACTIVE_LOW>;
> + linux,code = <KEY_0>;
> + wakeup-source;
> + };
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + led_red: led-red {
> + label = "red";
> + gpios = <&pioC 14 GPIO_ACTIVE_HIGH>;
> + pinctrl-0 = <&pinctrl_red_led_gpio_default>;
> + };
> +
> + led_green: led-green {
> + label = "green";
> + gpios = <&pioC 21 GPIO_ACTIVE_HIGH>;
> + pinctrl-0 = <&pinctrl_green_led_gpio_default>;
> + };
> +
> + led_blue: led-blue {
> + label = "blue";
> + gpios = <&pioC 20 GPIO_ACTIVE_HIGH>;
> + pinctrl-0 = <&pinctrl_blue_led_gpio_default>;
> + linux,default-trigger = "heartbeat";
> + };
> + };
> +
> + memory@20000000 {
> + reg = <0x20000000 0x10000000>;
> + device_type = "memory";
> + };
> +};
> +
> +&classd {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_classd_default>;
> + atmel,pwm-type = "diff";
> + atmel,non-overlap-time = <10>;
> + status = "okay";
> +};
> +
> +&dbgu {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_dbgu_default>;
> + status = "okay";
> +};
> +
> +&dma0 {
> + status = "okay";
> +};
> +
> +&flx6 {
> + atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
> + status = "okay";
> +};
> +
> +&i2c6 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_flx6_default>;
> + i2c-analog-filter;
> + i2c-digital-filter;
> + i2c-digital-filter-width-ns = <35>;
> + status = "okay";
> +
> + pmic@5b {
> + compatible = "microchip,mcp16502";
> + reg = <0x5b>;
> +
> + regulators {
> + vdd_3v3: VDD_IO {
> + regulator-name = "VDD_IO";
> + regulator-min-microvolt = <3000000>;
> + regulator-max-microvolt = <3600000>;
> + regulator-initial-mode = <2>;
> + regulator-allowed-modes = <2>, <4>;
> + regulator-always-on;
> +
> + regulator-state-standby {
> + regulator-on-in-suspend;
> + regulator-mode = <4>;
> + };
> +
> + regulator-state-mem {
> + regulator-mode = <4>;
> + };
> + };
> +
> + vddioddr: VDD_DDR {
> + regulator-name = "VDD_DDR";
> + regulator-min-microvolt = <1283000>;
> + regulator-max-microvolt = <1450000>;
> + regulator-initial-mode = <2>;
> + regulator-allowed-modes = <2>, <4>;
> + regulator-always-on;
> +
> + regulator-state-standby {
> + regulator-on-in-suspend;
> + regulator-mode = <4>;
> + };
> +
> + regulator-state-mem {
> + regulator-on-in-suspend;
> + regulator-mode = <4>;
> + };
> + };
> +
> + vddcore: VDD_CORE {
> + regulator-name = "VDD_CORE";
> + regulator-min-microvolt = <1140000>;
> + regulator-max-microvolt = <1210000>;
> + regulator-initial-mode = <2>;
> + regulator-allowed-modes = <2>, <4>;
> + regulator-always-on;
> +
> + regulator-state-standby {
> + regulator-on-in-suspend;
> + regulator-mode = <4>;
> + };
> +
> + regulator-state-mem {
> + regulator-mode = <4>;
> + };
> + };
> +
> + vddcpu: VDD_OTHER {
> + regulator-name = "VDD_OTHER";
> + regulator-min-microvolt = <1700000>;
> + regulator-max-microvolt = <3600000>;
I haven't got any input on question asked in v4 on the regulator values.
Are the values from this version the right ones? Is this board supporting
DVFS or the label name is wrong or maybe the min-max range is still wrong?
> + regulator-initial-mode = <2>;
> + regulator-allowed-modes = <2>, <4>;
> + regulator-ramp-delay = <3125>;
> + regulator-always-on;
> +
> + regulator-state-standby {
> + regulator-on-in-suspend;
> + regulator-mode = <4>;
> + };
> +
> + regulator-state-mem {
> + regulator-mode = <4>;
> + };
> + };
> +
> + vldo1: LDO1 {
> + regulator-name = "LDO1";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <3700000>;
> + regulator-always-on;
> +
> + regulator-state-standby {
> + regulator-on-in-suspend;
> + };
> + };
> +
> + vldo2: LDO2 {
> + regulator-name = "LDO2";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <3700000>;
> +
> + regulator-state-standby {
> + regulator-on-in-suspend;
> + };
> + };
> + };
> + };
> +};
> +
> +&i2s {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2s_default>;
> + #sound-dai-cells = <0>;
> + status = "okay";
> +};
> +
> +&main_xtal {
> + clock-frequency = <24000000>;
> +};
> +
> +&pinctrl {
> + classd {
> + pinctrl_classd_default: classd-default {
> + atmel,pins =
> + <AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>,
> + <AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_PULL_DOWN>;
> + };
> + };
> +
> + dbgu {
> + pinctrl_dbgu_default: dbgu-default {
> + atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
> + <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
> + };
> + };
> +
> + flexcom {
> + pinctrl_flx6_default: flx6-default {
> + atmel,pins =
> + <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
> + <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
> + };
> + };
> +
> + gpio-keys {
> + pinctrl_key_gpio_default: key-gpio-default {
> + atmel,pins = <AT91_PIOC 9 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
> + };
> + };
> +
> + i2s {
> + pinctrl_i2s_default: i2s-default {
> + atmel,pins =
> + <AT91_PIOB 26 AT91_PERIPH_D AT91_PINCTRL_NONE>, /* I2SCK */
> + <AT91_PIOB 15 AT91_PERIPH_D AT91_PINCTRL_NONE>, /* I2SWS */
> + <AT91_PIOB 16 AT91_PERIPH_D AT91_PINCTRL_NONE>, /* I2SDIN */
> + <AT91_PIOB 17 AT91_PERIPH_D AT91_PINCTRL_NONE>, /* I2SDOUT */
> + <AT91_PIOB 25 AT91_PERIPH_D AT91_PINCTRL_NONE>; /* I2SMCK */
> + };
> + };
> +
> + leds {
> + pinctrl_red_led_gpio_default: red-led-gpio-default {
> + atmel,pins = <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
> + };
> + pinctrl_green_led_gpio_default: green-led-gpio-default {
> + atmel,pins = <AT91_PIOC 21 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
> + };
> + pinctrl_blue_led_gpio_default: blue-led-gpio-default {
> + atmel,pins = <AT91_PIOC 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
> + };
> + };
> +
> + sdmmc0 {
> + pinctrl_sdmmc0_default: sdmmc0-default {
> + atmel,pins =
> + <AT91_PIOA 2 AT91_PERIPH_A (AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)>, /* PA2 CK periph A with pullup */
> + <AT91_PIOA 1 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)>, /* PA1 CMD periph A with pullup */
> + <AT91_PIOA 0 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)>, /* PA0 DAT0 periph A */
> + <AT91_PIOA 3 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)>, /* PA3 DAT1 periph A with pullup */
> + <AT91_PIOA 4 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)>, /* PA4 DAT2 periph A with pullup */
> + <AT91_PIOA 5 AT91_PERIPH_A (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DRIVE_STRENGTH_HI | AT91_PINCTRL_SLEWRATE_ENA)>; /* PA5 DAT3 periph A with pullup */
> + };
> + };
> +}; /* pinctrl */
> +
> +&rtt {
> + atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
> +};
> +
> +&sdmmc0 {
> + bus-width = <4>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_sdmmc0_default>;
> + cd-gpios = <&pioA 23 GPIO_ACTIVE_LOW>;
> + disable-wp;
> + status = "okay";
> +};
> +
> +&slow_xtal {
> + clock-frequency = <32768>;
> +};
> +
> +&poweroff {
> + debounce-delay-us = <976>;
> + status = "okay";
> +
> + input@0 {
> + reg = <0>;
> + };
> +};
> +
> +&trng {
> + status = "okay";
> +};
> +
> +&watchdog {
> + status = "okay";
> +};
next prev parent reply other threads:[~2024-07-14 13:46 UTC|newest]
Thread overview: 53+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-03 10:20 [PATCH v5 00/27] Add support for sam9x7 SoC family Varshini Rajendran
2024-07-03 10:26 ` [PATCH v5 01/27] dt-bindings: atmel-sysreg: add sam9x7 Varshini Rajendran
2024-07-03 10:26 ` [PATCH v5 02/27] dt-bindings: atmel-ssc: add microchip,sam9x7-ssc Varshini Rajendran
2024-07-03 10:26 ` [PATCH v5 03/27] dt-bindings: serial: atmel,at91-usart: add compatible for sam9x7 Varshini Rajendran
2024-07-03 15:44 ` Conor Dooley
2024-07-03 10:26 ` [PATCH v5 04/27] ARM: at91: pm: add support for sam9x7 SoC family Varshini Rajendran
2024-07-14 13:43 ` claudiu beznea
2024-07-03 10:27 ` [PATCH v5 05/27] ARM: at91: pm: add sam9x7 SoC init config Varshini Rajendran
2024-07-03 10:55 ` Alexandre Belloni
2024-07-04 8:35 ` Varshini.Rajendran
2024-07-14 13:38 ` claudiu beznea
2024-07-03 10:27 ` [PATCH v5 06/27] ARM: at91: add support in SoC driver for new sam9x7 Varshini Rajendran
2024-07-03 10:27 ` [PATCH v5 07/27] dt-bindings: clocks: atmel,at91sam9x5-sckc Varshini Rajendran
2024-07-14 13:40 ` claudiu beznea
2024-07-03 10:27 ` [PATCH v5 08/27] dt-bindings: clocks: atmel,at91rm9200-pmc Varshini Rajendran
2024-07-14 13:39 ` claudiu beznea
2024-07-03 10:27 ` [PATCH v5 09/27] clk: at91: clk-sam9x60-pll: re-factor to support individual core freq outputs Varshini Rajendran
2024-07-14 13:38 ` claudiu beznea
2024-07-03 10:27 ` [PATCH v5 10/27] clk: at91: sam9x7: add support for HW PLL freq dividers Varshini Rajendran
2024-07-15 8:06 ` claudiu beznea
2024-07-03 10:27 ` [PATCH v5 11/27] clk: at91: sama7g5: move mux table macros to header file Varshini Rajendran
2024-07-14 13:39 ` claudiu beznea
2024-07-03 10:27 ` [PATCH v5 12/27] dt-bindings: clock: at91: Allow PLLs to be exported and referenced in DT Varshini Rajendran
2024-07-14 13:38 ` claudiu beznea
2024-07-03 10:28 ` [PATCH v5 13/27] clk: at91: sam9x7: add sam9x7 pmc driver Varshini Rajendran
2024-07-14 13:55 ` claudiu beznea
2024-07-15 6:46 ` Varshini.Rajendran
2024-07-15 8:44 ` claudiu beznea
2024-07-03 10:28 ` [PATCH v5 14/27] dt-bindings: interrupt-controller: Add support for sam9x7 aic Varshini Rajendran
2024-07-03 15:39 ` Conor Dooley
2024-07-03 10:28 ` [PATCH v5 15/27] dt-bindings: interrupt-controller: Document the property microchip,nr-irqs Varshini Rajendran
2024-07-03 15:41 ` Conor Dooley
2024-07-09 6:13 ` Varshini.Rajendran
2024-07-09 14:06 ` Nicolas.Ferre
2024-07-09 14:13 ` Nicolas.Ferre
2024-07-10 9:01 ` Marc Zyngier
2024-07-11 12:42 ` Nicolas Ferre
2024-07-11 15:40 ` Conor Dooley
2024-07-08 15:58 ` Rob Herring
2024-07-03 10:28 ` [PATCH v5 16/27] irqchip/atmel-aic5: Add support to get nr_irqs from DT for sam9x60 & sam9x7 Varshini Rajendran
2024-07-03 10:28 ` [PATCH v5 18/27] power: reset: at91-poweroff: lookup for proper pmc dt node for sam9x7 Varshini Rajendran
2024-07-14 13:41 ` claudiu beznea
2024-07-03 10:28 ` [PATCH v5 21/27] dt-bindings: reset: atmel,at91sam9260-reset: add sam9x7 Varshini Rajendran
2024-07-03 10:29 ` [PATCH v5 22/27] dt-bindings: power: reset: atmel,sama5d2-shdwc: " Varshini Rajendran
2024-07-03 10:29 ` [PATCH v5 23/27] ARM: at91: Kconfig: add config flag for SAM9X7 SoC Varshini Rajendran
2024-07-03 10:29 ` [PATCH v5 24/27] ARM: configs: at91: enable config flags for sam9x7 SoC family Varshini Rajendran
2024-07-14 13:40 ` claudiu beznea
2024-07-03 10:29 ` [PATCH v5 26/27] dt-bindings: arm: add sam9x75 curiosity board Varshini Rajendran
2024-07-14 13:41 ` claudiu beznea
2024-07-03 10:29 ` [PATCH v5 27/27] ARM: dts: microchip: sam9x75_curiosity: " Varshini Rajendran
2024-07-14 13:46 ` claudiu beznea [this message]
2024-07-15 10:58 ` Varshini.Rajendran
2024-07-03 14:27 ` [PATCH v5 00/27] Add support for sam9x7 SoC family Rob Herring (Arm)
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=d36b0e70-f889-4aa2-b7af-b92cbaa573a6@tuxon.dev \
--to=claudiu.beznea@tuxon.dev \
--cc=alexandre.belloni@bootlin.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mihai.sain@microchip.com \
--cc=nicolas.ferre@microchip.com \
--cc=robh@kernel.org \
--cc=varshini.rajendran@microchip.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).