From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0428C433E0 for ; Thu, 7 Jan 2021 14:08:58 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 811EB22DBF for ; Thu, 7 Jan 2021 14:08:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 811EB22DBF Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=bSZKNP52Wr/PlpaYAMXjO0K+bCS1tg/Zt4tkrznlO0c=; b=YjFASoC4lQxM0DoKksh+y0aeK RNRz8aDD/SVFI4gLijlDSn29Dkluzwv5m7udUafx0kuS8o7vD47+57UmecMeQdKlvcJNZY96HkxiF V12ofitfTT0CJrqVs/ajoacl5jnH8/m60OFnrpmxh/cnkjVzpgx7bKrjpDof5QLHFz/boKBHlNjqS OWF34IeRx9e/soMpLedkkZoNi3KrDndCgs8FVySFVVhAa6eJtjn6YodRYJdkka74/ZnEb40si4kgf 6mUoY/khjKkas4m8M84P2wa8TW6EYzEEk+4T42JUQBFkvdLukh12VB1cethukVFLGehgXDIbSsaav UzTDZz+7Q==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kxVvW-0006mn-Ef; Thu, 07 Jan 2021 14:06:10 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kxVvQ-0006mG-PE for linux-arm-kernel@lists.infradead.org; Thu, 07 Jan 2021 14:06:07 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id DD7F1D6E; Thu, 7 Jan 2021 06:05:57 -0800 (PST) Received: from [10.57.37.195] (unknown [10.57.37.195]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2EE9C3F70D; Thu, 7 Jan 2021 06:05:54 -0800 (PST) Subject: Re: [PATCH 11/11] dts: bindings: Document device tree binding for Arm TRBE To: Anshuman Khandual , Rob Herring References: <1608717823-18387-1-git-send-email-anshuman.khandual@arm.com> <1608717823-18387-12-git-send-email-anshuman.khandual@arm.com> <20210103170540.GA4055084@robh.at.kernel.org> <21536a1c-0878-a390-aff3-fc2300be6941@arm.com> From: Suzuki K Poulose Message-ID: Date: Thu, 7 Jan 2021 14:05:48 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.6.0 MIME-Version: 1.0 In-Reply-To: <21536a1c-0878-a390-aff3-fc2300be6941@arm.com> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210107_090604_891075_C7D93786 X-CRM114-Status: GOOD ( 18.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Mathieu Poirier , coresight@lists.linaro.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Linu Cherian , Mike Leach Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 1/4/21 3:44 AM, Anshuman Khandual wrote: > > On 1/3/21 10:35 PM, Rob Herring wrote: >> On Wed, Dec 23, 2020 at 03:33:43PM +0530, Anshuman Khandual wrote: >>> This patch documents the device tree binding in use for Arm TRBE. >>> >>> Cc: devicetree@vger.kernel.org >>> Cc: Mathieu Poirier >>> Cc: Mike Leach >>> Cc: Suzuki K Poulose >>> Signed-off-by: Anshuman Khandual >>> --- >>> Changes in V1: >>> >>> - TRBE DT entry has been renamed as 'arm, trace-buffer-extension' >>> >>> Documentation/devicetree/bindings/arm/trbe.txt | 20 ++++++++++++++++++++ >>> 1 file changed, 20 insertions(+) >>> create mode 100644 Documentation/devicetree/bindings/arm/trbe.txt >>> >>> diff --git a/Documentation/devicetree/bindings/arm/trbe.txt b/Documentation/devicetree/bindings/arm/trbe.txt >>> new file mode 100644 >>> index 0000000..001945d >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/arm/trbe.txt >>> @@ -0,0 +1,20 @@ >>> +* Trace Buffer Extension (TRBE) >>> + >>> +Trace Buffer Extension (TRBE) is used for collecting trace data generated >>> +from a corresponding trace unit (ETE) using an in memory trace buffer. >>> + >>> +** TRBE Required properties: >>> + >>> +- compatible : should be one of: >>> + "arm,trace-buffer-extension" >>> + >>> +- interrupts : Exactly 1 PPI must be listed. For heterogeneous systems where >>> + TRBE is only supported on a subset of the CPUs, please consult >>> + the arm,gic-v3 binding for details on describing a PPI partition. >>> + >>> +** Example: >>> + >>> +trbe { >>> + compatible = "arm,trace-buffer-extension"; >>> + interrupts = ; >> >> If only an interrupt, then could just be part of ETE? If not, how is >> this hardware block accessed? An interrupt alone is not enough unless >> there's some architected way to access. > > TRBE hardware block is accessed via respective new system registers but the > PPI number where the IRQ will be triggered for various buffer events, would > depend on the platform as defined in the SBSA. That is correct. TRBE is accessed via CPU system registers. The IRQ is specifically for the TRBE unit to handle buffer overflow situations and other errors in the buffer handling. Please include this information in the description section of the bindings. Also, it may be worth switching this to yaml format. Suzuki _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel