From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 992EBCF6D3E for ; Wed, 2 Oct 2024 16:59:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:From:References:Cc:To:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=58tmidDj5HoAJHOY5bd9zYPfU/W89QY6T8TeX1gjp4Q=; b=fbqKriua1mnGt8wM+a0Cv2ccai O9T7YQo3vyjYqGdUTACgT1Zep30ypvzFdrQeCJGWtAgi8CQakLDCZq1duEOp9dcP9HmfS/DrDoXSt ES5Ga7717TRkP1j4sPuEQKTZJUCvaBvl0BYelIAmVsBuvldLcsbYRHSxnxTeuS9fK7ayT62kdovsB +sZGCAK3YAe3n3LTHuhjjsvgYs+4H4SdnKMGSTbOnXlwjibwyBcQBcAVmq18fffTfAJyWbeYtnz0k /f+Grh5KTsUIwiiuremrlUqjSnYwh7blmGIFREUyvg1dOPc8zfJIlmH7w7eVPLM3KXC6h+hZskspd bOOXXf5Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1sw2hM-00000006zgY-3LzP; Wed, 02 Oct 2024 16:59:36 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1sw2g4-00000006zN3-21sf for linux-arm-kernel@lists.infradead.org; Wed, 02 Oct 2024 16:58:18 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8E086339; Wed, 2 Oct 2024 09:58:42 -0700 (PDT) Received: from [10.1.196.28] (eglon.cambridge.arm.com [10.1.196.28]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D51ED3F64C; Wed, 2 Oct 2024 09:58:11 -0700 (PDT) Message-ID: Date: Wed, 2 Oct 2024 17:58:09 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] iommu/arm-smmu-v3: Fix L1 stream table index calculation for AmpereOne Content-Language: en-GB To: Yang Shi , jgg@ziepe.ca, nicolinc@nvidia.com, will@kernel.org, robin.murphy@arm.com Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20241001180346.1485194-1-yang@os.amperecomputing.com> From: James Morse In-Reply-To: <20241001180346.1485194-1-yang@os.amperecomputing.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241002_095816_600264_4E4E5472 X-CRM114-Status: GOOD ( 13.01 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hello! On 01/10/2024 19:03, Yang Shi wrote: > The commit ce410410f1a7 ("iommu/arm-smmu-v3: Add arm_smmu_strtab_l1/2_idx()") > calculated the last index of L1 stream table by 1 << smmu->sid_bits. 1 > is 32 bit value. > However AmpereOne has 32-bit stream id size. This resulted in > ouf-of-bound shift. The disassembly of shift is: > > ldr w2, [x19, 828] //, smmu_7(D)->sid_bits > mov w20, 1 > lsl w20, w20, w2 > > According to ARM spec, if the registers are 32 bit, the instruction actually > does: > dest = src << (shift % 32) > > So it actually shifted by zero bit. > > This caused v6.12-rc1 failed to boot on AmpereOne Same here - one of arm's reference designs prints 1 giga-tonne of: | arm-smmu-v3 arm-smmu-v3.5.auto: event 0x02 received: | arm-smmu-v3 arm-smmu-v3.5.auto: 0x0000c90000000002 | arm-smmu-v3 arm-smmu-v3.5.auto: 0x0000000000000000 | arm-smmu-v3 arm-smmu-v3.5.auto: 0x0000000000000000 | arm-smmu-v3 arm-smmu-v3.5.auto: 0x0000000000000000 during boot - then fails to find the nvme. Bisect points to ce410410f1a7, and the below diff fixes it. > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > index 737c5b882355..01a2faee04bc 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > @@ -3625,7 +3625,7 @@ static int arm_smmu_init_strtab_2lvl(struct arm_smmu_device *smmu) > u32 l1size; > struct arm_smmu_strtab_cfg *cfg = &smmu->strtab_cfg; > unsigned int last_sid_idx = > - arm_smmu_strtab_l1_idx((1 << smmu->sid_bits) - 1); > + arm_smmu_strtab_l1_idx((1UL << smmu->sid_bits) - 1); > > /* Calculate the L1 size, capped to the SIDSIZE. */ > cfg->l2.num_l1_ents = min(last_sid_idx + 1, STRTAB_MAX_L1_ENTRIES); Tested-by: James Morse Thanks, James