From: Fenghua Yu <fenghuay@nvidia.com>
To: Ben Horgan <ben.horgan@arm.com>, james.morse@arm.com
Cc: amitsinght@marvell.com, baisheng.gao@unisoc.com,
baolin.wang@linux.alibaba.com, bobo.shaobowang@huawei.com,
carl@os.amperecomputing.com, catalin.marinas@arm.com,
dakr@kernel.org, dave.martin@arm.com, david@redhat.com,
dfustini@baylibre.com, gregkh@linuxfoundation.org,
gshan@redhat.com, guohanjun@huawei.com, jeremy.linton@arm.com,
jonathan.cameron@huawei.com, kobak@nvidia.com,
lcherian@marvell.com, lenb@kernel.org,
linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, lpieralisi@kernel.org,
peternewman@google.com, quic_jiles@quicinc.com,
rafael@kernel.org, robh@kernel.org, rohit.mathew@arm.com,
scott@os.amperecomputing.com, sdonthineni@nvidia.com,
sudeep.holla@arm.com, tan.shaopeng@fujitsu.com, will@kernel.org,
xhao@linux.alibaba.com,
Shaopeng Tan <tan.shaopeng@jp.fujitsu.com>,
Zeng Heng <zengheng4@huawei.com>
Subject: Re: [PATCH v5 14/34] arm_mpam: Probe hardware to find the supported partid/pmg values
Date: Tue, 18 Nov 2025 08:23:59 -0800 [thread overview]
Message-ID: <d555d2e8-2bc8-4be8-af13-3dc3ffe9b8ca@nvidia.com> (raw)
In-Reply-To: <20251117170014.4113754-15-ben.horgan@arm.com>
On 11/17/25 08:59, Ben Horgan wrote:
> From: James Morse <james.morse@arm.com>
>
> CPUs can generate traffic with a range of PARTID and PMG values,
> but each MSC may also have its own maximum size for these fields.
> Before MPAM can be used, the driver needs to probe each RIS on
> each MSC, to find the system-wide smallest value that can be used.
> The limits from requestors (e.g. CPUs) also need taking into account.
>
> While doing this, RIS entries that firmware didn't describe are created
> under MPAM_CLASS_UNKNOWN.
>
> This adds the low level MSC write accessors.
>
> While we're here, implement the mpam_register_requestor() call
> for the arch code to register the CPU limits. Future callers of this
> will tell us about the SMMU and ITS.
>
> Signed-off-by: James Morse <james.morse@arm.com>
> Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
> Reviewed-by: Ben Horgan <ben.horgan@arm.com>
> Reviewed-by: Gavin Shan <gshan@redhat.com>
> Reviewed-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com>
> Tested-by: Fenghua Yu <fenghuay@nvidia.com>
> Tested-by: Shaopeng Tan <tan.shaopeng@jp.fujitsu.com>
> Tested-by: Peter Newman <peternewman@google.com>
> Tested-by: Carl Worth <carl@os.amperecomputing.com>
> Tested-by: Gavin Shan <gshan@redhat.com>
> Tested-by: Zeng Heng <zengheng4@huawei.com>
> Signed-off-by: Ben Horgan <ben.horgan@arm.com>
> ---
> Changes since v3:
> From Jonathan:
> Stray comma in printk
> Unnecessary braces
> ---
> drivers/resctrl/mpam_devices.c | 148 +++++++++++++++++++++++++++++++-
> drivers/resctrl/mpam_internal.h | 6 ++
> include/linux/arm_mpam.h | 14 +++
> 3 files changed, 167 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c
> index 51284f55ae9b..ac1c770cea35 100644
> --- a/drivers/resctrl/mpam_devices.c
> +++ b/drivers/resctrl/mpam_devices.c
> @@ -6,6 +6,7 @@
> #include <linux/acpi.h>
> #include <linux/atomic.h>
> #include <linux/arm_mpam.h>
> +#include <linux/bitfield.h>
> #include <linux/cacheinfo.h>
> #include <linux/cpu.h>
> #include <linux/cpumask.h>
> @@ -42,6 +43,15 @@ static atomic_t mpam_num_msc;
> static int mpam_cpuhp_state;
> static DEFINE_MUTEX(mpam_cpuhp_state_lock);
>
> +/*
> + * The smallest common values for any CPU or MSC in the system.
> + * Generating traffic outside this range will result in screaming interrupts.
> + */
> +u16 mpam_partid_max;
> +u8 mpam_pmg_max;
> +static bool partid_max_init, partid_max_published;
> +static DEFINE_SPINLOCK(partid_max_lock);
> +
> /*
> * mpam is enabled once all devices have been probed from CPU online callbacks,
> * scheduled via this work_struct. If access to an MSC depends on a CPU that
> @@ -143,6 +153,70 @@ static inline u32 _mpam_read_partsel_reg(struct mpam_msc *msc, u16 reg)
>
> #define mpam_read_partsel_reg(msc, reg) _mpam_read_partsel_reg(msc, MPAMF_##reg)
>
> +static void __mpam_write_reg(struct mpam_msc *msc, u16 reg, u32 val)
> +{
> + WARN_ON_ONCE(reg + sizeof(u32) >= msc->mapped_hwpage_sz);
This check may cause false warning when reg range is still valid. Need
to change to:
+ WARN_ON_ONCE(reg + sizeof(u32) > msc->mapped_hwpage_sz);
With this minor change,
Reviewed-by: Fenghua Yu <fenghuay@nvidia.com>
[SNIP]
Thanks.
-Fenghua
next prev parent reply other threads:[~2025-11-18 16:24 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-17 16:59 [PATCH v5 00/34] arm_mpam: Add basic mpam driver Ben Horgan
2025-11-17 16:59 ` [PATCH v5 01/34] ACPI / PPTT: Add a helper to fill a cpumask from a processor container Ben Horgan
2025-11-18 8:37 ` Hanjun Guo
2025-11-19 3:35 ` Gavin Shan
2025-11-19 10:00 ` Ben Horgan
2025-11-19 16:22 ` Jeremy Linton
2025-11-17 16:59 ` [PATCH v5 02/34] ACPI / PPTT: Stop acpi_count_levels() expecting callers to clear levels Ben Horgan
2025-11-19 4:50 ` Hanjun Guo
2025-11-19 16:25 ` Jeremy Linton
2025-11-17 16:59 ` [PATCH v5 03/34] ACPI / PPTT: Add acpi_pptt_cache_v1_full to use pptt cache as one structure Ben Horgan
2025-11-18 4:03 ` Fenghua Yu
2025-11-18 10:57 ` Ben Horgan
2025-11-18 16:30 ` Fenghua Yu
2025-11-18 14:40 ` Jonathan Cameron
2025-11-19 3:44 ` Gavin Shan
2025-11-19 5:13 ` Hanjun Guo
2025-11-19 16:28 ` Jeremy Linton
2025-11-17 16:59 ` [PATCH v5 04/34] ACPI / PPTT: Find cache level by cache-id Ben Horgan
2025-11-18 15:32 ` Jonathan Cameron
2025-11-19 16:29 ` Jeremy Linton
2025-11-17 16:59 ` [PATCH v5 05/34] ACPI / PPTT: Add a helper to fill a cpumask from a cache_id Ben Horgan
2025-11-18 15:33 ` Jonathan Cameron
2025-11-19 16:37 ` Jeremy Linton
2025-11-17 16:59 ` [PATCH v5 06/34] arm64: kconfig: Add Kconfig entry for MPAM Ben Horgan
2025-11-17 16:59 ` [PATCH v5 07/34] platform: Define platform_device_put cleanup handler Ben Horgan
2025-11-17 16:59 ` [PATCH v5 08/34] ACPI: Define acpi_put_table cleanup handler and acpi_get_table_ret() helper Ben Horgan
2025-11-17 19:46 ` Rafael J. Wysocki
2025-11-18 11:07 ` Ben Horgan
2025-11-18 16:13 ` Catalin Marinas
2025-11-18 16:21 ` Rafael J. Wysocki
2025-11-18 16:45 ` Catalin Marinas
2025-11-17 16:59 ` [PATCH v5 09/34] ACPI / MPAM: Parse the MPAM table Ben Horgan
2025-11-18 3:31 ` Fenghua Yu
2025-11-17 16:59 ` [PATCH v5 10/34] arm_mpam: Add probe/remove for mpam msc driver and kbuild boiler plate Ben Horgan
2025-11-17 19:50 ` Markus Elfring
2025-11-18 10:44 ` Ben Horgan
2025-11-18 11:28 ` [v5 " Markus Elfring
2025-11-18 5:19 ` [PATCH v5 " Shaopeng Tan (Fujitsu)
2025-11-17 16:59 ` [PATCH v5 11/34] arm_mpam: Add the class and component structures for firmware described ris Ben Horgan
2025-11-18 4:11 ` Fenghua Yu
2025-11-17 16:59 ` [PATCH v5 12/34] arm_mpam: Add MPAM MSC register layout definitions Ben Horgan
2025-11-17 16:59 ` [PATCH v5 13/34] arm_mpam: Add cpuhp callbacks to probe MSC hardware Ben Horgan
2025-11-17 16:59 ` [PATCH v5 14/34] arm_mpam: Probe hardware to find the supported partid/pmg values Ben Horgan
2025-11-18 16:23 ` Fenghua Yu [this message]
2025-11-17 16:59 ` [PATCH v5 15/34] arm_mpam: Add helpers for managing the locking around the mon_sel registers Ben Horgan
2025-11-19 4:13 ` Fenghua Yu
2025-11-19 10:12 ` Ben Horgan
2025-11-17 16:59 ` [PATCH v5 16/34] arm_mpam: Probe the hardware features resctrl supports Ben Horgan
2025-11-17 16:59 ` [PATCH v5 17/34] arm_mpam: Merge supported features during mpam_enable() into mpam_class Ben Horgan
2025-11-17 16:59 ` [PATCH v5 18/34] arm_mpam: Reset MSC controls from cpuhp callbacks Ben Horgan
2025-11-17 16:59 ` [PATCH v5 19/34] arm_mpam: Add a helper to touch an MSC from any CPU Ben Horgan
2025-11-17 16:59 ` [PATCH v5 20/34] arm_mpam: Extend reset logic to allow devices to be reset any time Ben Horgan
2025-11-17 17:00 ` [PATCH v5 21/34] arm_mpam: Register and enable IRQs Ben Horgan
2025-11-18 5:30 ` Fenghua Yu
2025-11-17 17:00 ` [PATCH v5 22/34] arm_mpam: Use a static key to indicate when mpam is enabled Ben Horgan
2025-11-17 17:00 ` [PATCH v5 23/34] arm_mpam: Allow configuration to be applied and restored during cpu online Ben Horgan
2025-11-18 5:21 ` Shaopeng Tan (Fujitsu)
2025-11-18 15:39 ` Jonathan Cameron
2025-11-19 4:53 ` Fenghua Yu
2025-11-17 17:00 ` [PATCH v5 24/34] arm_mpam: Probe and reset the rest of the features Ben Horgan
2025-11-18 16:54 ` Fenghua Yu
2025-11-17 17:00 ` [PATCH v5 25/34] arm_mpam: Add helpers to allocate monitors Ben Horgan
2025-11-18 20:44 ` Fenghua Yu
2025-11-17 17:00 ` [PATCH v5 26/34] arm_mpam: Add mpam_msmon_read() to read monitor value Ben Horgan
2025-11-19 5:03 ` Fenghua Yu
2025-11-17 17:00 ` [PATCH v5 27/34] arm_mpam: Track bandwidth counter state for power management Ben Horgan
2025-11-19 4:43 ` Fenghua Yu
2025-11-17 17:00 ` [PATCH v5 28/34] arm_mpam: Consider overflow in bandwidth counter state Ben Horgan
2025-11-19 4:27 ` Fenghua Yu
2025-11-17 17:00 ` [PATCH v5 29/34] arm_mpam: Probe for long/lwd mbwu counters Ben Horgan
2025-11-19 4:57 ` Fenghua Yu
2025-11-17 17:00 ` [PATCH v5 30/34] arm_mpam: Use long MBWU counters if supported Ben Horgan
2025-11-17 17:00 ` [PATCH v5 31/34] arm_mpam: Add helper to reset saved mbwu state Ben Horgan
2025-11-17 17:00 ` [PATCH v5 32/34] arm_mpam: Add kunit test for bitmap reset Ben Horgan
2025-11-17 17:00 ` [PATCH v5 33/34] arm_mpam: Add kunit tests for props_mismatch() Ben Horgan
2025-11-17 17:00 ` [PATCH v5 34/34] MAINTAINERS: new entry for MPAM Driver Ben Horgan
2025-11-17 20:02 ` Catalin Marinas
2025-11-17 22:08 ` Reinette Chatre
2025-11-18 15:41 ` Jonathan Cameron
2025-11-19 4:06 ` Gavin Shan
2025-11-18 3:29 ` [PATCH v5 00/34] arm_mpam: Add basic mpam driver Fenghua Yu
2025-11-18 6:54 ` Shaopeng Tan (Fujitsu)
2025-11-18 7:45 ` Hanjun Guo
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