From: Harikrishna Shenoy <h-shenoy@ti.com>
To: Beleswar Prasad Padhi <b-padhi@ti.com>, <nm@ti.com>,
<vigneshr@ti.com>, <kristo@kernel.org>, <robh@kernel.org>,
<krzk+dt@kernel.org>, <conor+dt@kernel.org>, <r-ravikumar@ti.com>,
<m-chawdhry@ti.com>, <u-kumar1@ti.com>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<tomi.valkeinen@ideasonboard.com>, <aradhya.bhatia@linux.dev>,
<devarsht@ti.com>, <s-jain1@ti.com>
Subject: Re: [PATCH v2 2/2] arm64: dts: ti: k3-j784s4-j742s2-main-common: Update DSS EDP integration configuration register
Date: Mon, 8 Sep 2025 10:20:15 +0530 [thread overview]
Message-ID: <d7031274-efac-4837-a8c2-9efef094d71c@ti.com> (raw)
In-Reply-To: <7cf605e3-e1be-43e4-ba14-c1310b4f5869@ti.com>
On 9/8/25 10:07, Beleswar Prasad Padhi wrote:
> On 07/09/25 23:58, Harikrishna Shenoy wrote:
>> Fix size of DSS_EDP0_INT_CFG_VP to 256B as stated in
>> TRM Table 2-1 MAIN Domain Memory Map.
>> Link:https://www.ti.com/lit/zip/spruj52/SPRUJ52-J84S4 AM69A TRM
>
> Broken link
https://www.ti.com/lit/zip/spruj52 , this link will download the zip and refer the SPRUJ52-J84S4 AM69A TRM.
>
>> Fixes: 9cc161a4509c ("arm64: dts: ti: Refactor J784s4 SoC files to a common file")
>
> Above commit only refactored the changes and carried the bug.
> The commit that introduced this bug should be:
>
> 603669b16701 arm64: dts: ti: k3-j784s4-main: Add DSS and DP-bridge node
>
> Thanks,
> Beleswar
Noted
>> Signed-off-by: Harikrishna Shenoy <h-shenoy@ti.com>
>> ---
>> arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
>> index fbbe768e7a30..f0cda14c2530 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
>> @@ -2573,7 +2573,7 @@ port@1 {
>> mhdp: bridge@a000000 {
>> compatible = "ti,j721e-mhdp8546";
>> reg = <0x0 0xa000000 0x0 0x30a00>,
>> - <0x0 0x4f40000 0x0 0x20>;
>> + <0x0 0x4f40000 0x0 0x100>;
>> reg-names = "mhdptx", "j721e-intg";
>> clocks = <&k3_clks 217 11>;
>> interrupt-parent = <&gic500>;
next prev parent reply other threads:[~2025-09-08 4:53 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-07 18:28 [PATCH v2 0/2] Update DSS EDP integration configuration register Harikrishna Shenoy
2025-09-07 18:28 ` [PATCH v2 1/2] arm64: dts: ti: k3-j721e-main: " Harikrishna Shenoy
2025-09-08 4:34 ` Beleswar Prasad Padhi
2025-09-08 4:51 ` Harikrishna Shenoy
2025-09-08 6:16 ` Tomi Valkeinen
2025-09-08 6:20 ` Harikrishna Shenoy
2025-09-08 6:28 ` Tomi Valkeinen
2025-09-09 1:54 ` Kumar, Udit
2025-09-07 18:28 ` [PATCH v2 2/2] arm64: dts: ti: k3-j784s4-j742s2-main-common: " Harikrishna Shenoy
2025-09-08 4:37 ` Beleswar Prasad Padhi
2025-09-08 4:50 ` Harikrishna Shenoy [this message]
2025-09-08 4:59 ` Beleswar Prasad Padhi
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