From: Jie Gan <jie.gan@oss.qualcomm.com>
To: Leo Yan <leo.yan@arm.com>, Yeoreum Yun <yeoreum.yun@arm.com>
Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, suzuki.poulose@arm.com,
mike.leach@arm.com, james.clark@linaro.org,
alexander.shishkin@linux.intel.com
Subject: Re: [PATCH v4 3/9] coresight: etm4x: fix leaked trace id
Date: Wed, 15 Apr 2026 16:45:44 +0800 [thread overview]
Message-ID: <d871bc3a-c104-4e8f-8104-898b957af79c@oss.qualcomm.com> (raw)
In-Reply-To: <20260415083224.GJ356832@e132581.arm.com>
On 4/15/2026 4:32 PM, Leo Yan wrote:
> On Wed, Apr 15, 2026 at 09:01:09AM +0100, Yeoreum Yun wrote:
>
> [...]
>
>>>> What I am thinking is as SoCs continue to grow more complex with an
>>>> increasing number of subsystems, trace IDs may be exhausted in the near
>>>> future. (that's why we have dynamic trace ID allocation/release).
>>>
>>> Thanks for the input.
>>>
>>> I am wandering if we can use "dev->devt" as the trace ID. A device's
>>> major/minor number is unique in kernel and dev_t is defined as u32:
>>>
>>> typedef u32 __kernel_dev_t;
>>>
>>> And we can consolidate this for both SYSFS and PERF modes.
>>>
>>
>> When I see the CORESIGHT_TRACE_ID_MAX:
>>
>> /* architecturally we have 128 IDs some of which are reserved */
>> #define CORESIGHT_TRACE_IDS_MAX 128
>>
>> I think this came from the hardware restriction for number of TRACE_IDs.
>> In this case, clamping the device_id to trace_id seems more complex and
>> reduce some performance perspective.
>
> Sigh, my stupid. Please ignore my previous comment, let us first fix
> ID leak issue.
>
> Given Jie's comment on the use-out issue, it is valid for me especially
> if a system have many dummy tracers. We can defer to refactor it
> later (e.g., use separate ranges for hardware and dummy tracers).
>
> thanks for correction!
Just share some info:
With my memory, The ARM AMBA ATB Protocol Specification defined a 7-bit
width field for the trace ID, that's where the 128 comes from. (in each
frame, we also have 7-bit field for containing the trace ID)
Thanks,
Jie
next prev parent reply other threads:[~2026-04-15 8:45 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-13 14:19 [PATCH v4 0/9] fix several inconsistencies with sysfs configuration in etmX Yeoreum Yun
2026-04-13 14:19 ` [PATCH v4 1/9] coresight: etm4x: introduce struct etm4_caps Yeoreum Yun
2026-04-13 17:21 ` Leo Yan
2026-04-14 7:55 ` Yeoreum Yun
2026-04-13 14:19 ` [PATCH v4 2/9] coresight: etm4x: exclude ss_status from drvdata->config Yeoreum Yun
2026-04-14 8:02 ` Jie Gan
2026-04-14 16:04 ` Leo Yan
2026-04-14 16:59 ` Yeoreum Yun
2026-04-13 14:19 ` [PATCH v4 3/9] coresight: etm4x: fix leaked trace id Yeoreum Yun
2026-04-14 8:04 ` Jie Gan
2026-04-14 16:32 ` Leo Yan
2026-04-14 16:50 ` Yeoreum Yun
2026-04-15 1:21 ` Jie Gan
2026-04-15 7:29 ` Leo Yan
2026-04-15 8:01 ` Yeoreum Yun
2026-04-15 8:32 ` Leo Yan
2026-04-15 8:45 ` Jie Gan [this message]
2026-04-15 8:56 ` Suzuki K Poulose
2026-04-13 14:19 ` [PATCH v4 4/9] coresight: etm4x: fix inconsistencies with sysfs configuration Yeoreum Yun
2026-04-15 4:25 ` Jie Gan
2026-04-15 5:36 ` Yeoreum Yun
2026-04-13 14:19 ` [PATCH v4 5/9] coresight: etm4x: remove redundant call etm4_enable_hw() with hotplug Yeoreum Yun
2026-04-15 11:59 ` Jie Gan
2026-04-13 14:19 ` [PATCH v4 6/9] coresight: etm3x: change drvdata->spinlock type to raw_spin_lock_t Yeoreum Yun
2026-04-15 12:05 ` Jie Gan
2026-04-13 14:20 ` [PATCH v4 7/9] coresight: etm3x: introduce struct etm_caps Yeoreum Yun
2026-04-15 12:17 ` Jie Gan
2026-04-15 16:45 ` Yeoreum Yun
2026-04-13 14:20 ` [PATCH v4 8/9] coresight: etm3x: fix inconsistencies with sysfs configuration Yeoreum Yun
2026-04-13 14:20 ` [PATCH v4 9/9] coresight: etm3x: remove redundant call etm4_enable_hw with hotplug Yeoreum Yun
2026-04-13 14:20 ` [PATCH v4 9/9] coresight: etm3x: remove redundant call etm_enable_hw() " Yeoreum Yun
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