* [PATCH v3 1/5] ARM: dts: at91: sama5d2: add QSPI nodes
2017-07-06 8:35 [PATCH v3 0/5] Add SoM1 support Claudiu Beznea
@ 2017-07-06 8:35 ` Claudiu Beznea
2017-07-06 8:35 ` [PATCH v3 2/5] ARM: dts: at91: sama5d2: add isc node Claudiu Beznea
` (5 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Claudiu Beznea @ 2017-07-06 8:35 UTC (permalink / raw)
To: linux-arm-kernel
From: Cyrille Pitchen <cyrille.pitchen@atmel.com>
This patch adds DT nodes for sama5d2 QSPI controllers.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
[claudiu.beznea at microchip.com: change subject to match the desired prefix]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
arch/arm/boot/dts/sama5d2.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index cc06da3..71e9d83 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -954,6 +954,28 @@
};
};
+ qspi0: spi at f0020000 {
+ compatible = "atmel,sama5d2-qspi";
+ reg = <0xf0020000 0x100>, <0xd0000000 0x08000000>;
+ reg-names = "qspi_base", "qspi_mmap";
+ interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&qspi0_clk>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ qspi1: spi at f0024000 {
+ compatible = "atmel,sama5d2-qspi";
+ reg = <0xf0024000 0x100>, <0xd8000000 0x08000000>;
+ reg-names = "qspi_base", "qspi_mmap";
+ interrupts = <53 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&qspi1_clk>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
sha at f0028000 {
compatible = "atmel,at91sam9g46-sha";
reg = <0xf0028000 0x100>;
--
2.7.4
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v3 2/5] ARM: dts: at91: sama5d2: add isc node
2017-07-06 8:35 [PATCH v3 0/5] Add SoM1 support Claudiu Beznea
2017-07-06 8:35 ` [PATCH v3 1/5] ARM: dts: at91: sama5d2: add QSPI nodes Claudiu Beznea
@ 2017-07-06 8:35 ` Claudiu Beznea
2017-07-06 8:35 ` [PATCH v3 3/5] drivers: soc: atmel: Add basic support for new sama5d2 SiPs Claudiu Beznea
` (4 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Claudiu Beznea @ 2017-07-06 8:35 UTC (permalink / raw)
To: linux-arm-kernel
From: Songjun Wu <songjun.wu@microchip.com>
Add isc node, it conflicts with pdmic and uart3.
Signed-off-by: Songjun Wu <songjun.wu@microchip.com>
[claudiu.beznea at microchip.com: place isc node after hlcdc node]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
arch/arm/boot/dts/sama5d2.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 71e9d83..9d13b55 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -416,6 +416,17 @@
};
};
+ isc: isc at f0008000 {
+ compatible = "atmel,sama5d2-isc";
+ reg = <0xf0008000 0x4000>;
+ interrupts = <46 IRQ_TYPE_LEVEL_HIGH 5>;
+ clocks = <&isc_clk>, <&iscck>, <&isc_gclk>;
+ clock-names = "hclock", "iscck", "gck";
+ #clock-cells = <0>;
+ clock-output-names = "isc-mck";
+ status = "disabled";
+ };
+
ramc0: ramc at f000c000 {
compatible = "atmel,sama5d3-ddramc";
reg = <0xf000c000 0x200>;
@@ -925,6 +936,11 @@
atmel,clk-output-range = <0 83000000>;
};
+ isc_gclk: isc_gclk {
+ #clock-cells = <0>;
+ reg = <46>;
+ };
+
pdmic_gclk: pdmic_gclk {
#clock-cells = <0>;
reg = <48>;
--
2.7.4
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v3 3/5] drivers: soc: atmel: Add basic support for new sama5d2 SiPs
2017-07-06 8:35 [PATCH v3 0/5] Add SoM1 support Claudiu Beznea
2017-07-06 8:35 ` [PATCH v3 1/5] ARM: dts: at91: sama5d2: add QSPI nodes Claudiu Beznea
2017-07-06 8:35 ` [PATCH v3 2/5] ARM: dts: at91: sama5d2: add isc node Claudiu Beznea
@ 2017-07-06 8:35 ` Claudiu Beznea
2017-07-06 8:35 ` [PATCH v3 4/5] ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support Claudiu Beznea
` (3 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Claudiu Beznea @ 2017-07-06 8:35 UTC (permalink / raw)
To: linux-arm-kernel
From: Cristian Birsan <cristian.birsan@microchip.com>
Add basic support for new sama5d2 System in a Package chips.
Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
[claudiu.beznea at microchip.com: use MiB instead of MB]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
drivers/soc/atmel/soc.c | 8 ++++++++
drivers/soc/atmel/soc.h | 4 ++++
2 files changed, 12 insertions(+)
diff --git a/drivers/soc/atmel/soc.c b/drivers/soc/atmel/soc.c
index c1363c8..4dd03b0 100644
--- a/drivers/soc/atmel/soc.c
+++ b/drivers/soc/atmel/soc.c
@@ -72,6 +72,8 @@ static const struct at91_soc __initconst socs[] = {
"sama5d21", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D22CU_EXID_MATCH,
"sama5d22", "sama5d2"),
+ AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D225C_D1M_EXID_MATCH,
+ "sama5d225c 16MiB SiP", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D23CU_EXID_MATCH,
"sama5d23", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D24CX_EXID_MATCH,
@@ -84,10 +86,16 @@ static const struct at91_soc __initconst socs[] = {
"sama5d27", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27CN_EXID_MATCH,
"sama5d27", "sama5d2"),
+ AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27C_D1G_EXID_MATCH,
+ "sama5d27c 128MiB SiP", "sama5d2"),
+ AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D27C_D5M_EXID_MATCH,
+ "sama5d27c 64MiB SiP", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CU_EXID_MATCH,
"sama5d28", "sama5d2"),
AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28CN_EXID_MATCH,
"sama5d28", "sama5d2"),
+ AT91_SOC(SAMA5D2_CIDR_MATCH, SAMA5D28C_D1G_EXID_MATCH,
+ "sama5d28c 128MiB SiP", "sama5d2"),
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D31_EXID_MATCH,
"sama5d31", "sama5d3"),
AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D33_EXID_MATCH,
diff --git a/drivers/soc/atmel/soc.h b/drivers/soc/atmel/soc.h
index a90bd5b..94cd5d1 100644
--- a/drivers/soc/atmel/soc.h
+++ b/drivers/soc/atmel/soc.h
@@ -64,14 +64,18 @@ at91_soc_init(const struct at91_soc *socs);
#define SAMA5D2_CIDR_MATCH 0x0a5c08c0
#define SAMA5D21CU_EXID_MATCH 0x0000005a
+#define SAMA5D225C_D1M_EXID_MATCH 0x00000053
#define SAMA5D22CU_EXID_MATCH 0x00000059
#define SAMA5D22CN_EXID_MATCH 0x00000069
#define SAMA5D23CU_EXID_MATCH 0x00000058
#define SAMA5D24CX_EXID_MATCH 0x00000004
#define SAMA5D24CU_EXID_MATCH 0x00000014
#define SAMA5D26CU_EXID_MATCH 0x00000012
+#define SAMA5D27C_D1G_EXID_MATCH 0x00000033
+#define SAMA5D27C_D5M_EXID_MATCH 0x00000032
#define SAMA5D27CU_EXID_MATCH 0x00000011
#define SAMA5D27CN_EXID_MATCH 0x00000021
+#define SAMA5D28C_D1G_EXID_MATCH 0x00000013
#define SAMA5D28CU_EXID_MATCH 0x00000010
#define SAMA5D28CN_EXID_MATCH 0x00000020
--
2.7.4
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v3 4/5] ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support
2017-07-06 8:35 [PATCH v3 0/5] Add SoM1 support Claudiu Beznea
` (2 preceding siblings ...)
2017-07-06 8:35 ` [PATCH v3 3/5] drivers: soc: atmel: Add basic support for new sama5d2 SiPs Claudiu Beznea
@ 2017-07-06 8:35 ` Claudiu Beznea
2017-07-06 8:35 ` [PATCH v3 5/5] ARM: dts: at91: at91-sama5d27_som1_ek: Add sama5d27 SoM1 EK support Claudiu Beznea
` (2 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Claudiu Beznea @ 2017-07-06 8:35 UTC (permalink / raw)
To: linux-arm-kernel
Add specific DTS file and bindings for sama5d27 SoM1 board.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
---
arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 102 ++++++++++++++++++++++++++++++
1 file changed, 102 insertions(+)
create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1.dtsi
diff --git a/arch/arm/boot/dts/at91-sama5d27_som1.dtsi b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
new file mode 100644
index 0000000..63a5af8
--- /dev/null
+++ b/arch/arm/boot/dts/at91-sama5d27_som1.dtsi
@@ -0,0 +1,102 @@
+/*
+ * at91-sama5d27_som1.dtsi - Device Tree file for SAMA5D27 SoM1 board
+ *
+ * Copyright (c) 2017, Microchip Technology Inc.
+ * 2017 Cristian Birsan <cristian.birsan@microchip.com>
+ * 2017 Claudiu Beznea <claudiu.beznea@microchip.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+#include "sama5d2.dtsi"
+#include "sama5d2-pinfunc.h"
+
+/ {
+ model = "Atmel SAMA5D27 SoM1";
+ compatible = "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
+
+ clocks {
+ slow_xtal {
+ clock-frequency = <32768>;
+ };
+
+ main_xtal {
+ clock-frequency = <24000000>;
+ };
+ };
+
+ ahb {
+ apb {
+ macb0: ethernet at f8008000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_macb0_default>;
+ phy-mode = "rmii";
+
+ ethernet-phy at 1 {
+ reg = <0x1>;
+ interrupt-parent = <&pioA>;
+ interrupts = <PIN_PD31 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_macb0_phy_irq>;
+ };
+ };
+
+ pinctrl at fc038000 {
+
+ pinctrl_macb0_default: macb0_default {
+ pinmux = <PIN_PD9__GTXCK>,
+ <PIN_PD10__GTXEN>,
+ <PIN_PD11__GRXDV>,
+ <PIN_PD12__GRXER>,
+ <PIN_PD13__GRX0>,
+ <PIN_PD14__GRX1>,
+ <PIN_PD15__GTX0>,
+ <PIN_PD16__GTX1>,
+ <PIN_PD17__GMDC>,
+ <PIN_PD18__GMDIO>;
+ bias-disable;
+ };
+
+ pinctrl_macb0_phy_irq: macb0_phy_irq {
+ pinmux = <PIN_PD31__GPIO>;
+ bias-disable;
+ };
+ };
+ };
+ };
+};
--
2.7.4
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v3 5/5] ARM: dts: at91: at91-sama5d27_som1_ek: Add sama5d27 SoM1 EK support
2017-07-06 8:35 [PATCH v3 0/5] Add SoM1 support Claudiu Beznea
` (3 preceding siblings ...)
2017-07-06 8:35 ` [PATCH v3 4/5] ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support Claudiu Beznea
@ 2017-07-06 8:35 ` Claudiu Beznea
2017-07-06 12:29 ` [PATCH v3 0/5] Add SoM1 support Nicolas Ferre
2017-07-17 9:13 ` Alexandre Belloni
6 siblings, 0 replies; 9+ messages in thread
From: Claudiu Beznea @ 2017-07-06 8:35 UTC (permalink / raw)
To: linux-arm-kernel
Add specifig DTS files and bindings for sama5d27 SoM1 EK board.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 537 ++++++++++++++++++++++++++++
2 files changed, 538 insertions(+)
create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 9449493..3396f73 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -46,6 +46,7 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
at91sam9x35ek.dtb
dtb-$(CONFIG_SOC_SAM_V7) += \
at91-kizbox2.dtb \
+ at91-sama5d27_som1_ek.dtb \
at91-sama5d2_xplained.dtb \
at91-sama5d3_xplained.dtb \
at91-tse850-3.dtb \
diff --git a/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
new file mode 100644
index 0000000..9c9088c
--- /dev/null
+++ b/arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
@@ -0,0 +1,537 @@
+/*
+ * at91-sama5d27_som1_ek.dts - Device Tree file for SAMA5D27-SOM1-EK board
+ *
+ * Copyright (c) 2017, Microchip Technology Inc.
+ * 2016 Nicolas Ferre <nicolas.ferre@atmel.com>
+ * 2017 Cristian Birsan <cristian.birsan@microchip.com>
+ * 2017 Claudiu Beznea <claudiu.beznea@microchip.com>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+/dts-v1/;
+#include "at91-sama5d27_som1.dtsi"
+#include <dt-bindings/mfd/atmel-flexcom.h>
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Atmel SAMA5D27 SOM1 EK";
+ compatible = "atmel,sama5d27-som1-ek", "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ ahb {
+ usb0: gadget at 00300000 {
+ atmel,vbus-gpio = <&pioA PIN_PD20 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usba_vbus>;
+ status = "okay";
+ };
+
+ usb1: ohci at 00400000 {
+ num-ports = <3>;
+ atmel,vbus-gpio = <&pioA PIN_PA10 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_default>;
+ status = "okay";
+ };
+
+ usb2: ehci at 00500000 {
+ status = "okay";
+ };
+
+ sdmmc0: sdio-host at a0000000 {
+ bus-width = <8>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdmmc0_default>;
+ status = "okay";
+ };
+
+ sdmmc1: sdio-host at b0000000 {
+ bus-width = <4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_sdmmc1_default>;
+ status = "okay";
+ };
+
+ apb {
+ isc: isc at f0008000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_isc_base &pinctrl_isc_data_8bit &pinctrl_isc_data_9_10 &pinctrl_isc_data_11_12>;
+ status = "okay";
+ };
+
+ spi0: spi at f8000000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi0_default>;
+ status = "okay";
+ };
+
+ macb0: ethernet at f8008000 {
+ status = "okay";
+ };
+
+ uart1: serial at f8020000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1_default>;
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ status = "okay";
+ };
+
+ uart2: serial at f8024000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mikrobus2_uart>;
+ atmel,use-dma-rx;
+ atmel-use-dma-tx;
+ status = "okay";
+ };
+
+ pwm0: pwm at f802c000 {
+ status = "okay";
+ };
+
+ flx1: flexcom at f8038000 {
+ atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
+ status = "disabled";
+
+ i2c2: i2c at 600 {
+ compatible = "atmel,sama5d2-i2c";
+ reg = <0x600 0x200>;
+ interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>;
+ dmas = <0>, <0>;
+ dma-names = "tx", "rx";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&flx1_clk>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mikrobus_i2c>;
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+ };
+
+ shdwc at f8048010 {
+ atmel,shdwc-debouncer = <976>;
+ atmel,wakeup-rtc-timer;
+
+ input at 0 {
+ reg = <0>;
+ atmel,wakeup-type = "low";
+ };
+ };
+
+ watchdog at f8048040 {
+ status = "okay";
+ };
+
+ can0: can at f8054000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can0_default>;
+ };
+
+ uart3: serial at fc008000 {
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart3_default>;
+ status = "disabled";
+ };
+
+ uart4: serial at fc00c000 {
+ atmel,use-dma-rx;
+ atmel,use-dma-tx;
+ pinctrl-name = "default";
+ pinctrl-0 = <&pinctrl_mikrobus1_uart>;
+ status = "okay";
+ };
+
+ flx3: flexcom at fc014000 {
+ atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>;
+ status = "disabled";
+
+ uart7: serial at 200 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0x200 0x200>;
+ interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&flx3_clk>;
+ clock-names = "usart";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flx3_default>;
+ atmel,fifo-size = <32>;
+ status = "disabled";
+ };
+
+ spi2: spi at 400 {
+ compatible = "atmel,at91rm9200-spi";
+ reg = <0x400 0x200>;
+ interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&flx3_clk>;
+ clock-names = "spi_clk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flx3_default>;
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+ };
+
+ flx4: flexcom at fc018000 {
+ atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>;
+ status = "okay";
+
+ uart6: serial at 200 {
+ compatible = "atmel,at91sam9260-usart";
+ reg = <0x200 0x200>;
+ interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&flx4_clk>;
+ clock-names = "usart";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flx4_default>;
+ atmel,fifo-size = <32>;
+ status = "disabled";
+ };
+
+ spi3: spi at 400 {
+ compatible = "atmel,at91rm9200-spi";
+ reg = <0x400 0x200>;
+ interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
+ clocks = <&flx4_clk>;
+ clock-names = "spi_clk";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mikrobus_spi &pinctrl_mikrobus1_spi_cs &pinctrl_mikrobus2_spi_cs>;
+ atmel,fifo-size = <16>;
+ status = "okay";
+ };
+
+ i2c3: i2c at 600 {
+ compatible = "atmel,sama5d2-i2c";
+ reg = <0x600 0x200>;
+ interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
+ dmas = <0>, <0>;
+ dma-names = "tx", "rx";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&flx4_clk>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_flx4_default>;
+ atmel,fifo-size = <16>;
+ status = "disabled";
+ };
+ };
+
+ i2c1: i2c at fc028000 {
+ dmas = <0>, <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_default>;
+ status = "okay";
+ };
+
+ pinctrl at fc038000 {
+
+ pinctrl_can0_default: can0_default {
+ pinmux = <PIN_PC10__CANTX0>,
+ <PIN_PC11__CANRX0>;
+ bias-disable;
+ };
+
+ pinctrl_can1_default: can1_default {
+ pinmux = <PIN_PC26__CANTX1>,
+ <PIN_PC27__CANRX1>;
+ bias-disable;
+ };
+
+ pinctrl_flx3_default: flx3_default {
+ pinmux = <PIN_PC20__FLEXCOM3_IO0>,
+ <PIN_PC19__FLEXCOM3_IO1>,
+ <PIN_PC18__FLEXCOM3_IO2>,
+ <PIN_PC21__FLEXCOM3_IO3>,
+ <PIN_PC22__FLEXCOM3_IO4>;
+ bias-disable;
+ };
+
+ pinctrl_i2c1_default: i2c1_default {
+ pinmux = <PIN_PD4__TWD1>,
+ <PIN_PD5__TWCK1>;
+ bias-disable;
+ };
+
+ pinctrl_isc_base: isc_base {
+ pinmux = <PIN_PC21__ISC_PCK>,
+ <PIN_PC22__ISC_VSYNC>,
+ <PIN_PC23__ISC_HSYNC>,
+ <PIN_PC24__ISC_MCK>;
+ bias-disable;
+ };
+
+ pinctrl_isc_data_8bit: isc_data_8bit {
+ pinmux = <PIN_PC20__ISC_D11>,
+ <PIN_PC19__ISC_D10>,
+ <PIN_PC18__ISC_D9>,
+ <PIN_PC17__ISC_D8>,
+ <PIN_PC16__ISC_D7>,
+ <PIN_PC15__ISC_D6>,
+ <PIN_PC14__ISC_D5>,
+ <PIN_PC13__ISC_D4>;
+ bias-disable;
+ };
+
+ pinctrl_isc_data_9_10: isc_data_9_10 {
+ pinmux = <PIN_PC12__ISC_D3>,
+ <PIN_PC11__ISC_D2>;
+ bias-disable;
+ };
+
+ pinctrl_isc_data_11_12: isc_data_11_12 {
+ pinmux = <PIN_PC10__ISC_D1>,
+ <PIN_PC9__ISC_D0>;
+ bias-disable;
+ };
+
+ pinctrl_key_gpio_default: key_gpio_default {
+ pinmux = <PIN_PA29__GPIO>;
+ bias-pull-up;
+ };
+
+ pinctrl_led_gpio_default: led_gpio_default {
+ pinmux = <PIN_PA27__GPIO>,
+ <PIN_PB1__GPIO>,
+ <PIN_PA31__GPIO>;
+ bias-pull-up;
+ };
+
+ pinctrl_sdmmc0_default: sdmmc0_default {
+ cmd_data {
+ pinmux = <PIN_PA1__SDMMC0_CMD>,
+ <PIN_PA2__SDMMC0_DAT0>,
+ <PIN_PA3__SDMMC0_DAT1>,
+ <PIN_PA4__SDMMC0_DAT2>,
+ <PIN_PA5__SDMMC0_DAT3>,
+ <PIN_PA6__SDMMC0_DAT4>,
+ <PIN_PA7__SDMMC0_DAT5>,
+ <PIN_PA8__SDMMC0_DAT6>,
+ <PIN_PA9__SDMMC0_DAT7>;
+ bias-pull-up;
+ };
+
+ ck_cd_vddsel {
+ pinmux = <PIN_PA0__SDMMC0_CK>,
+ <PIN_PA11__SDMMC0_VDDSEL>,
+ <PIN_PA13__SDMMC0_CD>;
+ bias-disable;
+ };
+ };
+
+ pinctrl_sdmmc1_default: sdmmc1_default {
+ cmd_data {
+ pinmux = <PIN_PA28__SDMMC1_CMD>,
+ <PIN_PA18__SDMMC1_DAT0>,
+ <PIN_PA19__SDMMC1_DAT1>,
+ <PIN_PA20__SDMMC1_DAT2>,
+ <PIN_PA21__SDMMC1_DAT3>;
+ bias-pull-up;
+ };
+
+ conf-ck_cd {
+ pinmux = <PIN_PA22__SDMMC1_CK>,
+ <PIN_PA30__SDMMC1_CD>;
+ bias-disable;
+ };
+ };
+
+ pinctrl_spi0_default: spi0_default {
+ pinmux = <PIN_PA14__SPI0_SPCK>,
+ <PIN_PA15__SPI0_MOSI>,
+ <PIN_PA16__SPI0_MISO>,
+ <PIN_PA17__SPI0_NPCS0>;
+ bias-disable;
+ };
+
+ pinctrl_uart1_default: uart1_default {
+ pinmux = <PIN_PD2__URXD1>,
+ <PIN_PD3__UTXD1>;
+ bias-disable;
+ };
+
+ pinctrl_uart3_default: uart3_default {
+ pinmux = <PIN_PC12__URXD3>,
+ <PIN_PC13__UTXD3>;
+ bias-disable;
+ };
+
+ pinctrl_usb_default: usb_default {
+ pinmux = <PIN_PA10__GPIO>,
+ <PIN_PD19__GPIO>;
+ bias-disable;
+ };
+
+ pinctrl_usba_vbus: usba_vbus {
+ pinmux = <PIN_PD20__GPIO>;
+ bias-disable;
+ };
+
+ pinctrl_mikrobus1_an: mikrobus1_an {
+ pinmux = <PIN_PD25__GPIO>;
+ bias-disable;
+ };
+
+ pinctrl_mikrobus2_an: mikrobus2_an {
+ pinmux = <PIN_PD26__GPIO>;
+ bias-disable;
+ };
+
+ pinctrl_mikrobus1_rst: mikrobus1_rst {
+ pinmux = <PIN_PB2__GPIO>;
+ bias-disable;
+ };
+
+ pinctrl_mikrobus2_rst: mikrobus2_rst {
+ pinmux = <PIN_PA26__GPIO>;
+ bias-disable;
+ };
+
+ pinctrl_mikrobus1_spi_cs: mikrobus1_spi_cs {
+ pinmux = <PIN_PD0__FLEXCOM4_IO4>;
+ bias-disable;
+ };
+
+ pinctrl_mikrobus2_spi_cs: mikrobus2_spi_cs {
+ pinmux = <PIN_PC31__FLEXCOM4_IO3>;
+ bias-disable;
+ };
+
+ pinctrl_mikrobus_spi: mikrobus_spi {
+ pinmux = <PIN_PC28__FLEXCOM4_IO0>,
+ <PIN_PC29__FLEXCOM4_IO1>,
+ <PIN_PC30__FLEXCOM4_IO2>;
+ bias-disable;
+ };
+
+ pinctrl_mikrobus1_pwm: mikrobus1_pwm {
+ pinmux = <PIN_PB1__PWML1>;
+ bias-disable;
+ };
+
+ pinctrl_mikrobus2_pwm: mikrobus2_pwm {
+ pinmux = <PIN_PA31__PWML0>;
+ bias-disable;
+ };
+
+ pinctrl_mikrobus1_int: mikrobus1_int {
+ pinmux = <PIN_PB0__GPIO>;
+ bias-disable;
+ };
+
+ pinctrl_mikrobus2_int: mikrobus2_int {
+ pinmux = <PIN_PA25__GPIO>;
+ bias-disable;
+ };
+
+ pinctrl_mikrobus1_uart: mikrobus1_uart {
+ pinmux = <PIN_PB3__URXD4>,
+ <PIN_PB4__UTXD4>;
+ bias-disable;
+ };
+
+ pinctrl_mikrobus2_uart: mikrobus2_uart {
+ pinmux = <PIN_PD23__URXD2>,
+ <PIN_PD24__UTXD2>;
+ bias-disable;
+ };
+
+ pinctrl_mikrobus_i2c: mikrobus1_i2c {
+ pinmux = <PIN_PA24__FLEXCOM1_IO0>,
+ <PIN_PA23__FLEXCOM1_IO1>;
+ bias-disable;
+ };
+
+ pinctrl_flx4_default: flx4_uart_default {
+ pinmux = <PIN_PC28__FLEXCOM4_IO0>,
+ <PIN_PC29__FLEXCOM4_IO1>,
+ <PIN_PC30__FLEXCOM4_IO2>,
+ <PIN_PC31__FLEXCOM4_IO3>,
+ <PIN_PD0__FLEXCOM4_IO4>;
+ bias-disable;
+ };
+ };
+
+ can1: can at fc050000 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_can1_default>;
+ status = "okay";
+ };
+ };
+ };
+
+ gpio_keys {
+ compatible = "gpio-keys";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_key_gpio_default>;
+
+ pb4 {
+ label = "USER";
+ gpios = <&pioA PIN_PA29 GPIO_ACTIVE_LOW>;
+ linux,code = <0x104>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_led_gpio_default>;
+ status = "okay";
+
+ red {
+ label = "red";
+ gpios = <&pioA PIN_PA27 GPIO_ACTIVE_LOW>;
+ };
+
+ green {
+ label = "green";
+ gpios = <&pioA PIN_PB1 GPIO_ACTIVE_LOW>;
+ };
+
+ blue {
+ label = "blue";
+ gpios = <&pioA PIN_PA31 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+};
--
2.7.4
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v3 0/5] Add SoM1 support
2017-07-06 8:35 [PATCH v3 0/5] Add SoM1 support Claudiu Beznea
` (4 preceding siblings ...)
2017-07-06 8:35 ` [PATCH v3 5/5] ARM: dts: at91: at91-sama5d27_som1_ek: Add sama5d27 SoM1 EK support Claudiu Beznea
@ 2017-07-06 12:29 ` Nicolas Ferre
2017-07-06 12:38 ` Ludovic Desroches
2017-07-17 9:13 ` Alexandre Belloni
6 siblings, 1 reply; 9+ messages in thread
From: Nicolas Ferre @ 2017-07-06 12:29 UTC (permalink / raw)
To: linux-arm-kernel
On 06/07/2017 at 10:35, Claudiu Beznea wrote:
> Hi all,
>
> This series adds support for sama5d2 SoM1 devices.
>
> The at91-sama5d27_som1.dtsi add specific bindings for SoM1 board.
> The at91-sama5d27_som1_ek.dts add specific bindings for SoM1 EK board.
>
> Thank you,
> Claudiu
You can add my:
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
for the whole series.
(I remember that we also had Ludovic's one as well).
Regards,
> Changes in v3:
> - remove qspi flash mapping for the moment
> - remove at24 and i2c bindings; this will be introduced when
> "Add at24 functionality to read form different EEPROM offsets" patch will
> be accepted
> - change the title of patch 5 from this series from
> "ARM: dts: sama5d27_som1_ek: Add sama5d27 SoM1 EK support" to
> "ARM: dts: at91: at91-sama5d27_som1_ek: Add sama5d27 SoM1 EK support" to
> match the desired prefix
>
> Changes in v2:
> o in at91-sama5d27_som1.dtsi:
> - increase bootloader and kernel size in flash map (with bootloader
> flash offset the dtb and kernel flash offsets were changed)
> - use right pin for ethernet-phy interrupt
>
> o in at91-sama5d27_som1_ek.dts:
> - removed memory tag and rely on bootloader to fill the right value
> - use pin macros (from arch/arm/boot/dts/sama5d2-pinfunc.h) wherever
> posible instead of pin numbers
> - remove pinctrl_sensor_power and pinctrl_sensor_reset pin muxing
> since they are not of intereset for this board
> - use "pb4" label for user button instead of "bp1"
>
> Claudiu Beznea (2):
> ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support
> ARM: dts: sama5d27_som1_ek: Add sama5d27 SoM1 EK support
>
> Cristian Birsan (1):
> drivers: soc: atmel: Add basic support for new sama5d2 SiPs
>
> Cyrille Pitchen (1):
> ARM: dts: at91: sama5d2: add QSPI nodes
>
> Songjun Wu (1):
> ARM: dts: at91: sama5d2: add isc node
>
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 178 +++++++++
> arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 551 ++++++++++++++++++++++++++++
> arch/arm/boot/dts/sama5d2.dtsi | 38 ++
> drivers/soc/atmel/soc.c | 8 +
> drivers/soc/atmel/soc.h | 4 +
> 6 files changed, 780 insertions(+)
> create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1.dtsi
> create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
>
--
Nicolas Ferre
^ permalink raw reply [flat|nested] 9+ messages in thread* [PATCH v3 0/5] Add SoM1 support
2017-07-06 12:29 ` [PATCH v3 0/5] Add SoM1 support Nicolas Ferre
@ 2017-07-06 12:38 ` Ludovic Desroches
0 siblings, 0 replies; 9+ messages in thread
From: Ludovic Desroches @ 2017-07-06 12:38 UTC (permalink / raw)
To: linux-arm-kernel
On Thu, Jul 06, 2017 at 02:29:36PM +0200, Nicolas Ferre wrote:
> On 06/07/2017 at 10:35, Claudiu Beznea wrote:
> > Hi all,
> >
> > This series adds support for sama5d2 SoM1 devices.
> >
> > The at91-sama5d27_som1.dtsi add specific bindings for SoM1 board.
> > The at91-sama5d27_som1_ek.dts add specific bindings for SoM1 EK board.
> >
> > Thank you,
> > Claudiu
>
> You can add my:
> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
>
> for the whole series.
> (I remember that we also had Ludovic's one as well).
Yes, the only comment was about the mac-offset but it has been removed
from this series and I had the technical explanation so still
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
>
> Regards,
>
> > Changes in v3:
> > - remove qspi flash mapping for the moment
> > - remove at24 and i2c bindings; this will be introduced when
> > "Add at24 functionality to read form different EEPROM offsets" patch will
> > be accepted
> > - change the title of patch 5 from this series from
> > "ARM: dts: sama5d27_som1_ek: Add sama5d27 SoM1 EK support" to
> > "ARM: dts: at91: at91-sama5d27_som1_ek: Add sama5d27 SoM1 EK support" to
> > match the desired prefix
> >
> > Changes in v2:
> > o in at91-sama5d27_som1.dtsi:
> > - increase bootloader and kernel size in flash map (with bootloader
> > flash offset the dtb and kernel flash offsets were changed)
> > - use right pin for ethernet-phy interrupt
> >
> > o in at91-sama5d27_som1_ek.dts:
> > - removed memory tag and rely on bootloader to fill the right value
> > - use pin macros (from arch/arm/boot/dts/sama5d2-pinfunc.h) wherever
> > posible instead of pin numbers
> > - remove pinctrl_sensor_power and pinctrl_sensor_reset pin muxing
> > since they are not of intereset for this board
> > - use "pb4" label for user button instead of "bp1"
> >
> > Claudiu Beznea (2):
> > ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support
> > ARM: dts: sama5d27_som1_ek: Add sama5d27 SoM1 EK support
> >
> > Cristian Birsan (1):
> > drivers: soc: atmel: Add basic support for new sama5d2 SiPs
> >
> > Cyrille Pitchen (1):
> > ARM: dts: at91: sama5d2: add QSPI nodes
> >
> > Songjun Wu (1):
> > ARM: dts: at91: sama5d2: add isc node
> >
> > arch/arm/boot/dts/Makefile | 1 +
> > arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 178 +++++++++
> > arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 551 ++++++++++++++++++++++++++++
> > arch/arm/boot/dts/sama5d2.dtsi | 38 ++
> > drivers/soc/atmel/soc.c | 8 +
> > drivers/soc/atmel/soc.h | 4 +
> > 6 files changed, 780 insertions(+)
> > create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1.dtsi
> > create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
> >
>
>
> --
> Nicolas Ferre
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v3 0/5] Add SoM1 support
2017-07-06 8:35 [PATCH v3 0/5] Add SoM1 support Claudiu Beznea
` (5 preceding siblings ...)
2017-07-06 12:29 ` [PATCH v3 0/5] Add SoM1 support Nicolas Ferre
@ 2017-07-17 9:13 ` Alexandre Belloni
6 siblings, 0 replies; 9+ messages in thread
From: Alexandre Belloni @ 2017-07-17 9:13 UTC (permalink / raw)
To: linux-arm-kernel
On 06/07/2017 at 11:35:24 +0300, Claudiu Beznea wrote:
> Hi all,
>
> This series adds support for sama5d2 SoM1 devices.
>
> The at91-sama5d27_som1.dtsi add specific bindings for SoM1 board.
> The at91-sama5d27_som1_ek.dts add specific bindings for SoM1 EK board.
>
> Thank you,
> Claudiu
>
> Changes in v3:
> - remove qspi flash mapping for the moment
> - remove at24 and i2c bindings; this will be introduced when
> "Add at24 functionality to read form different EEPROM offsets" patch will
> be accepted
> - change the title of patch 5 from this series from
> "ARM: dts: sama5d27_som1_ek: Add sama5d27 SoM1 EK support" to
> "ARM: dts: at91: at91-sama5d27_som1_ek: Add sama5d27 SoM1 EK support" to
> match the desired prefix
>
> Changes in v2:
> o in at91-sama5d27_som1.dtsi:
> - increase bootloader and kernel size in flash map (with bootloader
> flash offset the dtb and kernel flash offsets were changed)
> - use right pin for ethernet-phy interrupt
>
> o in at91-sama5d27_som1_ek.dts:
> - removed memory tag and rely on bootloader to fill the right value
> - use pin macros (from arch/arm/boot/dts/sama5d2-pinfunc.h) wherever
> posible instead of pin numbers
> - remove pinctrl_sensor_power and pinctrl_sensor_reset pin muxing
> since they are not of intereset for this board
> - use "pb4" label for user button instead of "bp1"
>
> Claudiu Beznea (2):
> ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support
> ARM: dts: sama5d27_som1_ek: Add sama5d27 SoM1 EK support
>
> Cristian Birsan (1):
> drivers: soc: atmel: Add basic support for new sama5d2 SiPs
>
> Cyrille Pitchen (1):
> ARM: dts: at91: sama5d2: add QSPI nodes
>
> Songjun Wu (1):
> ARM: dts: at91: sama5d2: add isc node
>
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/at91-sama5d27_som1.dtsi | 178 +++++++++
> arch/arm/boot/dts/at91-sama5d27_som1_ek.dts | 551 ++++++++++++++++++++++++++++
> arch/arm/boot/dts/sama5d2.dtsi | 38 ++
> drivers/soc/atmel/soc.c | 8 +
> drivers/soc/atmel/soc.h | 4 +
> 6 files changed, 780 insertions(+)
> create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1.dtsi
> create mode 100644 arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
>
All applied, thanks!
--
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
^ permalink raw reply [flat|nested] 9+ messages in thread