From: Michal Simek <monstr@monstr.eu>
To: Rob Herring <robh@kernel.org>, Michal Simek <michal.simek@amd.com>
Cc: linux-kernel@vger.kernel.org, git@amd.com,
Conor Dooley <conor+dt@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@vger.kernel.org>,
kishore Manne <nava.kishore.manne@amd.com>,
"moderated list:ARM/ZYNQ ARCHITECTURE"
<linux-arm-kernel@lists.infradead.org>,
"open list:COMMON CLK FRAMEWORK" <linux-clk@vger.kernel.org>
Subject: Re: [PATCH v3 3/5] dt-bindings: clock: Move xlnx,zynqmp-clk to its own schema
Date: Tue, 7 Jul 2026 18:34:24 +0200 [thread overview]
Message-ID: <da06120d-0850-4e79-9e07-efe481c057ff@monstr.eu> (raw)
In-Reply-To: <CAL_JsqLWwcRjzQs4DHV265w-ROzeW_OPVS0uP0Ew8p+-dYu+EA@mail.gmail.com>
On 7/7/26 17:55, Rob Herring wrote:
> On Wed, Jun 3, 2026 at 10:12 AM Michal Simek <michal.simek@amd.com> wrote:
>>
>> The ZynqMP clock controller binding shares only #clock-cells with the
>> Versal bindings. Move it to a dedicated xlnx,zynqmp-clk.yaml schema.
>> Also remove "(Optional clock)" from clock description because it is visible
>> from schema itself.
>>
>> Suggested-by: Rob Herring <robh@kernel.org>
>> Signed-off-by: Michal Simek <michal.simek@amd.com>
>> ---
>>
>> Changes in v3:
>> - Cover change in zynqmp-firmware.yaml
>> - Move clock-cells to be the last in the example
>> - Remove comment around (Optional clock) which is obvious from schema
>> itself
>>
>> Changes in v2:
>> - New patch in series
>> - Split zynqmp-clk from versal-clk
>>
>> .../bindings/clock/xlnx,versal-clk.yaml | 50 +-------------
>> .../bindings/clock/xlnx,zynqmp-clk.yaml | 68 +++++++++++++++++++
>> .../firmware/xilinx/xlnx,zynqmp-firmware.yaml | 7 +-
>> 3 files changed, 76 insertions(+), 49 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/clock/xlnx,zynqmp-clk.yaml
>
> This is now causing warnings in linux-next:
>
> /builds/robherring/linux-dt/Documentation/devicetree/bindings/clock/xlnx,versal-clk.example.dtb:
> zynqmp-firmware (xlnx,zynqmp-firmware):
> clock-controller:clock-names:0: 'pss_ref_clk' was expected
> from schema $id:
> http://devicetree.org/schemas/firmware/xilinx/xlnx,zynqmp-firmware.yaml
> /builds/robherring/linux-dt/Documentation/devicetree/bindings/clock/xlnx,versal-clk.example.dtb:
> zynqmp-firmware (xlnx,zynqmp-firmware):
> clock-controller:clock-names:1: 'video_clk' was expected
> from schema $id:
> http://devicetree.org/schemas/firmware/xilinx/xlnx,zynqmp-firmware.yaml
> /builds/robherring/linux-dt/Documentation/devicetree/bindings/clock/xlnx,versal-clk.example.dtb:
> zynqmp-firmware (xlnx,zynqmp-firmware): clock-controller:clock-names:
> ['ref', 'pl_alt_ref'] is too short
> from schema $id:
> http://devicetree.org/schemas/firmware/xilinx/xlnx,zynqmp-firmware.yaml
> /builds/robherring/linux-dt/Documentation/devicetree/bindings/clock/xlnx,versal-clk.example.dtb:
> zynqmp-firmware (xlnx,zynqmp-firmware): clock-controller:clocks:
> [[4294967295], [4294967295]] is too short
> from schema $id:
> http://devicetree.org/schemas/firmware/xilinx/xlnx,zynqmp-firmware.yaml
> /builds/robherring/linux-dt/Documentation/devicetree/bindings/clock/xlnx,versal-clk.example.dtb:
> zynqmp-firmware (xlnx,zynqmp-firmware): clock-controller:compatible:0:
> 'xlnx,zynqmp-clk' was expected
> from schema $id:
> http://devicetree.org/schemas/firmware/xilinx/xlnx,zynqmp-firmware.yaml
I will look at it. Thanks for reporting it.
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP/Versal ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal/Versal NET SoCs
TF-A maintainer - Xilinx ZynqMP/Versal/Versal NET SoCs
next prev parent reply other threads:[~2026-07-07 16:57 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-03 15:12 [PATCH v3 0/5] clock: versal-clk: Fix Versal NET clock binding and switch to CCF Michal Simek
2026-06-03 15:12 ` [PATCH v3 1/5] dt-bindings: firmware: xilinx: Add missing example for ZynqMP Michal Simek
2026-06-03 15:30 ` Conor Dooley
2026-06-03 15:12 ` [PATCH v3 3/5] dt-bindings: clock: Move xlnx,zynqmp-clk to its own schema Michal Simek
2026-06-03 15:34 ` Conor Dooley
2026-07-07 15:55 ` Rob Herring
2026-07-07 16:34 ` Michal Simek [this message]
2026-07-08 7:22 ` Michal Simek
2026-06-03 15:12 ` [PATCH v3 5/5] arm64: versal-net: Switch Versal NET to firmware clock interface Michal Simek
2026-06-29 9:59 ` [PATCH v3 0/5] clock: versal-clk: Fix Versal NET clock binding and switch to CCF Michal Simek
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