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From: James Morse <james.morse@arm.com>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	kvm@vger.kernel.org, Suzuki K Poulose <suzuki.poulose@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	Christoffer Dall <christoffer.dall@arm.com>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 0/8] Workaround for Cortex-A76 erratum 1165522
Date: Fri, 7 Dec 2018 11:09:40 +0000	[thread overview]
Message-ID: <da3f6f5a-9d39-3b51-661e-723742727f35@arm.com> (raw)
In-Reply-To: <20181206173126.139877-1-marc.zyngier@arm.com>

Hi Marc,

On 06/12/2018 17:31, Marc Zyngier wrote:
> Early Cortex-A76 suffer from an erratum that can result in invalid
> TLBs when the CPU speculatively executes an AT instruction in the
> middle of a guest world switch, while the guest virtual memory
> configuration is in an inconsistent state.
> 
> We handle this issue by mandating the use of VHE and making sure that
> the guest context is fully installed before switching HCR_EL2.TGE to
> zero. This ensures that a speculated AT instruction is either executed
> on the host context (TGE set) or the guest context (TGE clear), and
> that there is no intermediate state.
> 
> There is some additional complexity in the TLB invalidation code,
> where we most make sure that a speculated AT instruction cannot mess
> the stage-1 TLBs.

For the series:
Reviewed-by: James Morse <james.morse@arm.com>


Thanks,

James

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      parent reply	other threads:[~2018-12-07 11:10 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-06 17:31 [PATCH v3 0/8] Workaround for Cortex-A76 erratum 1165522 Marc Zyngier
2018-12-06 17:31 ` [PATCH v3 1/8] arm64: KVM: Make VHE Stage-2 TLB invalidation operations non-interruptible Marc Zyngier
2018-12-10 10:03   ` Christoffer Dall
2018-12-10 10:24     ` Marc Zyngier
2018-12-10 10:49       ` Christoffer Dall
2018-12-06 17:31 ` [PATCH v3 2/8] KVM: arm64: Rework detection of SVE, !VHE systems Marc Zyngier
2018-12-10 10:13   ` Christoffer Dall
2018-12-10 10:28     ` Marc Zyngier
2018-12-10 12:40       ` Will Deacon
2018-12-06 17:31 ` [PATCH v3 3/8] arm64: KVM: Install stage-2 translation before enabling traps Marc Zyngier
2018-12-10 10:13   ` Christoffer Dall
2018-12-06 17:31 ` [PATCH v3 4/8] arm64: Add TCR_EPD{0,1} definitions Marc Zyngier
2018-12-06 17:31 ` [PATCH v3 5/8] arm64: KVM: Force VHE for systems affected by erratum 1165522 Marc Zyngier
2018-12-06 17:31 ` [PATCH v3 6/8] arm64: KVM: Add synchronization on translation regime change for " Marc Zyngier
2018-12-10 10:15   ` Christoffer Dall
2018-12-06 17:31 ` [PATCH v3 7/8] arm64: KVM: Handle ARM erratum 1165522 in TLB invalidation Marc Zyngier
2018-12-10 10:19   ` Christoffer Dall
2018-12-10 10:46     ` Marc Zyngier
2018-12-10 11:15       ` James Morse
2018-12-10 11:50         ` Christoffer Dall
2018-12-06 17:31 ` [PATCH v3 8/8] arm64: Add configuration/documentation for Cortex-A76 erratum 1165522 Marc Zyngier
2018-12-07 11:09 ` James Morse [this message]

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