From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 39380C25B78 for ; Tue, 28 May 2024 12:18:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=vShCDe714GNm7Gq9ei+s25WInI1Nq2igVvKJRHp39no=; b=VnfYXVZMtk2xpt 8b+R+DiwEHkb22TNP2xAZMlJYdFx7sS3RlQWg36nGaELfmHbhXw1xDiUSFqgve7b6lYocswCMo7wY qWsNJEQWVPMoNR5NkeiJ/uCas/JuCvq95Sv7FRWWLzdmaBIsj0sJAKkJB2wnzCQqWKqw6wcoo9wRK /xR7dpt1IYttPGD6LvmjlcAr0eVp6mh2y9l6lw3EQgF9884Sy4ngn71Dft6HieJDw7AifSDIhBCGX /B2KuhQTzkKwfsnvt1Hh6FM+CV94yv0AdZQpZE8ywIwF1j8ws285toIVQ0fdf9WXpRFz2rODhl6I/ rb2euPEo8XsSpbditctQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sBvml-00000000Xa9-2lSf; Tue, 28 May 2024 12:18:35 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sBvmi-00000000XZn-2M03 for linux-arm-kernel@lists.infradead.org; Tue, 28 May 2024 12:18:34 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 941B861D5F; Tue, 28 May 2024 12:18:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id CD917C3277B; Tue, 28 May 2024 12:18:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1716898711; bh=31hupY2Vf75zLIZ0a57jYb6eZzS8/M/a9nA5admvZy8=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=dKeJ4/lGsfqPgcLeZR4yds3njJ9bOMat+HdNZfEMwqX7fVte4Oir7WgD0g9pot2VZ jGOzqXE9zIOU5pckpffojahLzYePNhDw9J00ppoVHJ6n7LmERY3ZFGKCQ9KF+8RCrk uWH5bJWG3vivK3a62P+KsPNkHpG6GpteLJJe/iUvXTGCj7lRPSRZRaOOVfK+d35cMg 8J7H29bLgefQA5kwTgjQvk1AXUavmcP8T/pWoBbar8nnm5imMR79KlPa5NfdSncp1W hd9fYkcGE7EB8Halav5Rek3eU2hbibTKHUPflTPg/XfircFyKhJt0dOPp73wO+CKvd x7EkD4WwmO7dA== Message-ID: Date: Tue, 28 May 2024 15:18:25 +0300 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 3/7] arm64: dts: ti: k3-j722s-evm: Update USB0 and USB1 To: Siddharth Vadapalli , nm@ti.com, vigneshr@ti.com, afd@ti.com, kristo@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, u-kumar1@ti.com, danishanwar@ti.com, srk@ti.com References: <20240524090514.152727-1-s-vadapalli@ti.com> <20240524090514.152727-4-s-vadapalli@ti.com> Content-Language: en-US From: Roger Quadros In-Reply-To: <20240524090514.152727-4-s-vadapalli@ti.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240528_051832_819570_7650CC18 X-CRM114-Status: GOOD ( 20.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 24/05/2024 12:05, Siddharth Vadapalli wrote: > From: Ravi Gunasekaran > > The GPIO expander on the EVM allows the USB selection for Type-C > port to either USB0 or USB1 via USB hub. By default, let the Type-C > port select USB0 via the GPIO expander port P05. > > Enable super-speed on USB1 by updating SerDes0 lane configuration. > > Signed-off-by: Ravi Gunasekaran > Signed-off-by: Siddharth Vadapalli > --- > v2: > https://lore.kernel.org/r/20240513114443.16350-4-r-gunasekaran@ti.com/ > Changes since v2: > - Renamed serdes0_ln_ctrl to serdes_ln_ctrl corresponding to the change > made in patch 1. > - Dropped Serdes1 idle-states since it has not yet been added in the > serdes_ln_ctrl node. > - Dropped Serdes1 specific Lane-Muxing macros in "k3-serdes.h". > - Added newline after /* J722S */ in "k3-serdes.h" following the file > convention. > > v1: > https://lore.kernel.org/r/20240429120932.11456-4-r-gunasekaran@ti.com/ > Changes since v1: > - Removed USB aliases, line-name property for p05 GPIO hog. > - Included k3-j722s-main.dtsi. > > arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 54 +++++++++++++++++++++++++ > arch/arm64/boot/dts/ti/k3-j722s.dtsi | 5 +++ > arch/arm64/boot/dts/ti/k3-serdes.h | 5 +++ > 3 files changed, 64 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts > index bf3c246d13d1..a3bda39cc223 100644 > --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts > +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts > @@ -9,7 +9,9 @@ > /dts-v1/; > > #include > +#include > #include "k3-j722s.dtsi" > +#include "k3-serdes.h" > > / { > compatible = "ti,j722s-evm", "ti,j722s"; > @@ -202,6 +204,12 @@ J722S_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AG26) RGMII1_TXC */ > J722S_IOPAD(0x012c, PIN_OUTPUT, 0) /* (AF25) RGMII1_TX_CTL */ > >; > }; > + > + main_usb1_pins_default: main-usb1-default-pins { > + pinctrl-single,pins = < > + J722S_IOPAD(0x0258, PIN_INPUT, 0) /* (B27) USB1_DRVVBUS */ > + >; > + }; > }; > > &cpsw3g { > @@ -301,6 +309,13 @@ exp1: gpio@23 { > "PCIe0_1L_RC_RSTz", "PCIe0_1L_PRSNT#", > "ENET1_EXP_SPARE2", "ENET1_EXP_PWRDN", > "PD_I2ENET1_I2CMUX_SELC_IRQ", "ENET1_EXP_RESETZ"; > + > + p05-hog { > + /* P05 - USB2.0_MUX_SEL */ > + gpio-hog; > + gpios = <5 GPIO_ACTIVE_LOW>; > + output-high; > + }; > }; > }; > > @@ -384,3 +399,42 @@ &sdhci1 { > status = "okay"; > bootph-all; > }; > + > +&serdes_ln_ctrl { > + idle-states = ; > +}; > + > +&serdes0 { > + status = "okay"; > + serdes0_usb_link: phy@0 { > + reg = <0>; > + cdns,num-lanes = <1>; > + #phy-cells = <0>; > + cdns,phy-type = ; > + resets = <&serdes_wiz0 1>; > + }; > +}; > + > +&usbss0 { > + ti,vbus-divider; > + status = "okay"; > +}; > + > +&usb0 { > + dr_mode = "otg"; > + usb-role-switch; > +}; > + > +&usbss1 { > + pinctrl-names = "default"; > + pinctrl-0 = <&main_usb1_pins_default>; > + ti,vbus-divider; > + status = "okay"; > +}; > + > +&usb1 { > + dr_mode = "host"; > + maximum-speed = "super-speed"; > + phys = <&serdes0_usb_link>; > + phy-names = "cdns3,usb3-phy"; > +}; > diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/k3-j722s.dtsi > index c75744edb143..61b64fae1bf4 100644 > --- a/arch/arm64/boot/dts/ti/k3-j722s.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j722s.dtsi > @@ -87,3 +87,8 @@ &oc_sram { > reg = <0x00 0x70000000 0x00 0x40000>; > ranges = <0x00 0x00 0x70000000 0x40000>; > }; > + > +/* Include bus peripherals that are additionally > + * present in J722S > + */ > + #include "k3-j722s-main.dtsi" > diff --git a/arch/arm64/boot/dts/ti/k3-serdes.h b/arch/arm64/boot/dts/ti/k3-serdes.h The k3-serdes.h changes should be in a separate independent patch. > index a011ad893b44..e6a036a4e70b 100644 > --- a/arch/arm64/boot/dts/ti/k3-serdes.h > +++ b/arch/arm64/boot/dts/ti/k3-serdes.h > @@ -201,4 +201,9 @@ > #define J784S4_SERDES4_LANE3_USB 0x2 > #define J784S4_SERDES4_LANE3_IP4_UNUSED 0x3 > > +/* J722S */ > + > +#define J722S_SERDES0_LANE0_USB 0x0 > +#define J722S_SERDES0_LANE0_QSGMII_LANE2 0x1 > + > #endif /* DTS_ARM64_TI_K3_SERDES_H */ -- cheers, -roger _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel