From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 960FBC83F12 for ; Tue, 29 Aug 2023 22:41:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4XY0C3QzmnPjZX5zf1MKt930X5Uea46w9mYtLLYoWEU=; b=dQBZxm8/uXSrR4 VH+metKB6LmUbAu7XyofdHBl5CgpHyLtzTqsNlAnhPaiXnIdWvsmyCaN6yAp3X7P1C9w+J3rMea9a AmMJX61yvzDtXgVOu4t9hgcF/n11nFtX6mgr0kXofrBNELMV8sBTbB9ELlXKZv4STBiEcyEFiBwoX PNWtExAGX9zDvc+NEststaBvFIRFDJLkI24PNfuL9yoKTCnPvcrBDpr0niuN3NDhzF0iRhwEpZqx/ Evn0aaJw3a+J8TGOT5grhG2xx/0A1ZP9bxfoy12Qpdb14NUxPwv92PrxbSeHZ2/sXHZEeaKFaTEKH H4jPUsIWv2WyD7FxDTsw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qb7OA-00COqR-1O; Tue, 29 Aug 2023 22:40:46 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qb7O5-00COpI-2m for linux-arm-kernel@lists.infradead.org; Tue, 29 Aug 2023 22:40:43 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 31BC52F4; Tue, 29 Aug 2023 15:41:15 -0700 (PDT) Received: from [10.57.2.162] (unknown [10.57.2.162]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5A70D3F64C; Tue, 29 Aug 2023 15:40:34 -0700 (PDT) Message-ID: Date: Tue, 29 Aug 2023 23:40:29 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; rv:102.0) Gecko/20100101 Thunderbird/102.14.0 Subject: Re: [PATCH 3/3] iommu/arm-smmu-v3: Add a max_tlbi_ops for __arm_smmu_tlb_inv_range() Content-Language: en-GB To: Nicolin Chen Cc: will@kernel.org, jgg@nvidia.com, joro@8bytes.org, jean-philippe@linaro.org, apopple@nvidia.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev References: <3ba332e141102d31b756326cdc4078cac1f5ab1c.1692693557.git.nicolinc@nvidia.com> <3f630d3d-c59a-f454-14db-2bf9b8e76877@arm.com> From: Robin Murphy In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230829_154041_998892_82955603 X-CRM114-Status: GOOD ( 30.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2023-08-23 00:04, Nicolin Chen wrote: > Hi Robin, > > On Tue, Aug 22, 2023 at 09:32:26AM -0700, Nicolin Chen wrote: >> On Tue, Aug 22, 2023 at 10:30:35AM +0100, Robin Murphy wrote: >> >>>> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c >>>> index d6c647e1eb01..3f0db30932bd 100644 >>>> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c >>>> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c >>>> @@ -1897,7 +1897,14 @@ static void __arm_smmu_tlb_inv_range(struct arm_smmu_cmdq_ent *cmd, >>>> if (!size) >>>> return; >>>> >>>> - if (smmu->features & ARM_SMMU_FEAT_RANGE_INV) { >>>> + if (!(smmu->features & ARM_SMMU_FEAT_RANGE_INV)) { >>>> + /* >>>> + * When the size reaches a threshold, replace per-granule TLBI >>>> + * commands with one single per-asid or per-vmid TLBI command. >>>> + */ >>>> + if (size >= granule * smmu_domain->max_tlbi_ops) >>>> + return arm_smmu_tlb_inv_domain(smmu_domain); >>> >>> This looks like it's at the wrong level - we should have figured this >>> out before we got as far as low-level command-building. I'd have thought >>> it would be a case of short-circuiting directly from >>> arm_smmu_tlb_inv_range_domain() to arm_smmu_tlb_inv_context(). >> >> OK, I could do that. We would have copies of this same routine >> though. Also, the shortcut applies to !ARM_SMMU_FEAT_RANGE_INV >> cases only, so this function feels convenient to me. > > I was trying to say that we would need the same piece in both > arm_smmu_tlb_inv_range_domain() and arm_smmu_tlb_inv_range_asid(), > though the latter one only needs to call arm_smmu_tlb_inv_asid(). Its not like arm_smmu_tlb_inv_range_asid() doesn't already massively overlap with arm_smmu_tlb_inv_range_domain() anyway, so a little further duplication hardly seems like it would hurt. Checking ARM_SMMU_FEAT_RANGE_INV should be cheap (otherwise we'd really want to split __arm_smmu_tlb_inv_range() into separate RIL vs. non-RIL versions to avoid having it in the loop), and it makes the intent clear. What I just really don't like is a flow where we construct a specific command, then call the low-level function to issue it, only that function then actually jumps back out into another high-level function which constructs a *different* command. This code is already a maze of twisty little passages... > Also, arm_smmu_tlb_inv_context() does a full range ATC invalidation > instead of a given range like what arm_smmu_tlb_inv_range_domain() > currently does. So, it might be a bit overkill. > > Combining all your comments, we'd have something like this: TBH I'd be inclined to refactor a bit harder, maybe break out some VMID-based helpers for orthogonality, and aim for a flow like: if (over threshold) tlb_inv_domain() else if (stage 1) tlb_inv_range_asid() else tlb_inv_range_vmid() atc_inv_range() or possibly if you prefer: if (stage 1) { if (over threshold) tlb_inv_asid() else tlb_inv_range_asid() } else { if (over threshold) tlb_inv_vmid() else tlb_inv_range_vmid() } atc_inv_range() where the latter maybe trades more verbosity for less duplication overall - I'd probably have to try both to see which looks nicer in the end. And obviously if there's any chance of inventing a clear and consistent naming scheme in the process, that would be lovely. Thanks, Robin. > ------------------------------------------------------------------- > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > index 7614739ea2c1..2967a6634c7c 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > @@ -1937,12 +1937,22 @@ static void arm_smmu_tlb_inv_range_domain(unsigned long iova, size_t size, > size_t granule, bool leaf, > struct arm_smmu_domain *smmu_domain) > { > + struct io_pgtable_cfg *cfg = > + &io_pgtable_ops_to_pgtable(smmu_domain->pgtbl_ops)->cfg; > struct arm_smmu_cmdq_ent cmd = { > .tlbi = { > .leaf = leaf, > }, > }; > > + /* > + * If the given size is too large that would end up with too many TLBI > + * commands in CMDQ, short circuit directly to a full invalidation > + */ > + if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_RANGE_INV) && > + size >= granule * (1UL << cfg->bits_per_level)) > + return arm_smmu_tlb_inv_context(smmu_domain); > + > if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) { > cmd.opcode = smmu_domain->smmu->features & ARM_SMMU_FEAT_E2H ? > CMDQ_OP_TLBI_EL2_VA : CMDQ_OP_TLBI_NH_VA; > @@ -1964,6 +1974,8 @@ void arm_smmu_tlb_inv_range_asid(unsigned long iova, size_t size, int asid, > size_t granule, bool leaf, > struct arm_smmu_domain *smmu_domain) > { > + struct io_pgtable_cfg *cfg = > + &io_pgtable_ops_to_pgtable(smmu_domain->pgtbl_ops)->cfg; > struct arm_smmu_cmdq_ent cmd = { > .opcode = smmu_domain->smmu->features & ARM_SMMU_FEAT_E2H ? > CMDQ_OP_TLBI_EL2_VA : CMDQ_OP_TLBI_NH_VA, > @@ -1973,6 +1985,14 @@ void arm_smmu_tlb_inv_range_asid(unsigned long iova, size_t size, int asid, > }, > }; > > + /* > + * If the given size is too large that would end up with too many TLBI > + * commands in CMDQ, short circuit directly to a full invalidation > + */ > + if (!(smmu_domain->smmu->features & ARM_SMMU_FEAT_RANGE_INV) && > + size >= granule * (1UL << cfg->bits_per_level)) > + return arm_smmu_tlb_inv_asid(smmu_domain->smmu, asid); > + > __arm_smmu_tlb_inv_range(&cmd, iova, size, granule, smmu_domain); > } > > ------------------------------------------------------------------- > > You're sure that you prefer this, right? > > Thanks > Nicolin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel