From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: * X-Spam-Status: No, score=1.5 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, URIBL_DBL_ABUSE_MALW autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 24766C35254 for ; Wed, 5 Feb 2020 11:42:57 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EC887217BA for ; Wed, 5 Feb 2020 11:42:56 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="gVq6OPaj"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="ue3s7rl6" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EC887217BA Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:Message-ID:References:In-Reply-To:Subject:To:From: Date:MIME-Version:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Sdl7dCIycWHI0bAiKW1RYP5mNfNfissE/bYeA9ROVtk=; b=gVq6OPaj9HlwRyhhDNl8AhIhj edHlnPRt4RV5WwzwrXDqoNOK0t8nbWudSrNkElVYjgHoAj7bgIoGDY0syWTOiwHYEQmSkHUmXVJBp Pov8kfwBNr7wkKtrR12GGZw74khmpHGp3OvAxOxzcgEbHqICIO9bvZZeCJKhc5EIO7fg3bFTzU8ZQ qGNgL0qeKlaBvGoj2uNfBE6lc+tia6yI6jErEg2YLTyAsiUv2Bd/5rUqXHUYxdtFVHqmjqB1Ha6Fg Ku+v1JKPdxRXB5c6/BhdqAsMbehvdB/PsxoVgiq5hulbyiFHVJqC4RP8mSWDZuk2GucFtKPZ1bNNG mfP0Ewxlw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1izJ53-0000yA-26; Wed, 05 Feb 2020 11:42:53 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1izJ4z-0000xq-Du for linux-arm-kernel@lists.infradead.org; Wed, 05 Feb 2020 11:42:50 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 0A83E21741; Wed, 5 Feb 2020 11:42:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1580902968; bh=kncFxhBv1aPgb6/5aq7Hsf4jHESTSMhlLC7K6hUGYM8=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=ue3s7rl6Q77gisGyY7t30ImsruJMA8suGOyh324ojaE8REUp7Dikwp8/enNEeT73V OINBpqUxWAdO6ysnfmXYr36AmtgMXfdCpOaiFe9VTT7C6fJ4IVkX+WMB662UNmyAgf QN1Abql23p2Fz56avLWgaRkweyh/nXNigLVDvgTE= Received: from disco-boy.misterjones.org ([51.254.78.96] helo=www.loen.fr) by disco-boy.misterjones.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1izJ4w-0037V9-9g; Wed, 05 Feb 2020 11:42:46 +0000 MIME-Version: 1.0 Date: Wed, 05 Feb 2020 11:42:46 +0000 From: Marc Zyngier To: Marek Vasut Subject: Re: STM32MP1 level triggered interrupts In-Reply-To: <5e1c419c-b141-52f6-88f1-ee3ab8219a4e@denx.de> References: <20bb72d0-8258-abc0-e729-4d3d5a75c41c@denx.de> <65a1c5b2-c1b9-322f-338c-e6ff6379d8d1@denx.de> <129d04a0-c846-506d-5726-4a1024d977a6@st.com> <80db762c-3b3d-f007-2f9b-dadbffd95782@denx.de> <360b1adc-32f1-7993-c463-e52c7a5a8a67@st.com> <20200123101225.nscpc5t4nmlarbw2@pengutronix.de> <03fd1cb7b5985b3221f66c6b0058adc8@kernel.org> <20200123105214.ru4j76xbisjtbtgw@pengutronix.de> <7e0ce712f7e34b38c8f541644026c52e@kernel.org> <5e1c419c-b141-52f6-88f1-ee3ab8219a4e@denx.de> Message-ID: X-Sender: maz@kernel.org User-Agent: Roundcube Webmail/1.3.8 X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: marex@denx.de, alexandre.torgue@st.com, u.kleine-koenig@pengutronix.de, patrick.delaunay@st.com, mcoquelin.stm32@gmail.com, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200205_034249_515984_A9110124 X-CRM114-Status: GOOD ( 12.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexandre Torgue , Patrick Delaunay , Maxime Coquelin , =?UTF-8?Q?Uwe_Kleine-K?= =?UTF-8?Q?=C3=B6nig?= , linux-stm32@st-md-mailman.stormreply.com, Linux ARM Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2020-01-28 18:32, Marek Vasut wrote: > On 1/24/20 10:24 AM, Marc Zyngier wrote: >> On 2020-01-24 09:17, Alexandre Torgue wrote: >>> On 1/23/20 11:21 PM, Marek Vasut wrote: >> >> [...] >> >>>> But I still wonder, what is the purpose of the EXTImux in that SoC? >>>> Shouldn't that permit routing GPIOs directly into GIC SPIs, which >>>> would >>>> then permit detecting at least level-high interrupts ? >>>> >>> >>> For this SoC, EXTI block detects external line edges and rises a GIC >>> SPI interrupt. This EXTi block is mainly used to handle HW events >>> like >>> buttons, clocks ... So first issue seems more to be a design issue >>> (your design doesn't fit with MP1 datasheet). >>> >>> Now, let's find a solution. I'll have a look on your proposition: >>> "check the line in EOI callback and retrig". >>> >>> Marc, this kind a solution could be acceptable on your side ? >> >> It will depend on the nature of the hack you will have to put in >> there. >> If it is 100% reliable, why not? Anything short of that, probably not. > > I had another look into this, and what we would end up is some sort of > phandle from exti to all the gpioX nodes in DT, would that be OK ? > However, if we do that, then we will have the pinctrl controller (which > has the gpio banks as subnodes) require the exti through a phandle and > exti require the gpio banks through a phandle, so we end up with some > sort of cyclic dependency there. > > So we would need to somehow have exti lazily deal with it's gpioX > controller phandles only when someone requests level interrupt ? That > would probably do. TBH, I don't have much of an opinion here. If you can deal with the plumbing that's required to make this thing work reliably, then why not? What I insist on is that the sampling/retriggering is made 100% reliable. I'd prefer we don't offer the functionality if it there is any doubt about it. M. -- Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel