* [PATCH 02/12] ARM: dts: stm32: Repair I2C2 operation on AV96
2020-04-29 16:37 [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins Marek Vasut
@ 2020-04-29 16:37 ` Marek Vasut
2020-04-29 16:37 ` [PATCH 03/12] ARM: dts: stm32: Add alternate pinmux for FDCAN1 pins Marek Vasut
` (10 subsequent siblings)
11 siblings, 0 replies; 26+ messages in thread
From: Marek Vasut @ 2020-04-29 16:37 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Alexandre Torgue, Patrice Chotard, Patrick Delaunay,
Maxime Coquelin, Manivannan Sadhasivam, linux-stm32
The I2C2 uses different pinmux on AV96, use correct pinmux and
also add comments about the I2C being present on the "low-speed"
expansion connector X6.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
---
arch/arm/boot/dts/stm32mp157a-avenger96.dts | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/stm32mp157a-avenger96.dts b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
index 271f38acfeb9..438c2f70813e 100644
--- a/arch/arm/boot/dts/stm32mp157a-avenger96.dts
+++ b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
@@ -164,7 +164,7 @@ phy0: ethernet-phy@7 {
};
};
-&i2c1 {
+&i2c1 { /* X6 I2C1 */
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins_b>;
i2c-scl-rising-time-ns = <185>;
@@ -174,9 +174,9 @@ &i2c1 {
/delete-property/dma-names;
};
-&i2c2 {
+&i2c2 { /* X6 I2C2 */
pinctrl-names = "default";
- pinctrl-0 = <&i2c2_pins_b1 &i2c2_pins_b2>;
+ pinctrl-0 = <&i2c2_pins_c>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 03/12] ARM: dts: stm32: Add alternate pinmux for FDCAN1 pins
2020-04-29 16:37 [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins Marek Vasut
2020-04-29 16:37 ` [PATCH 02/12] ARM: dts: stm32: Repair I2C2 operation on AV96 Marek Vasut
@ 2020-04-29 16:37 ` Marek Vasut
2020-04-29 16:37 ` [PATCH 04/12] ARM: dts: stm32: Add bindings for FDCAN1 on AV96 Marek Vasut
` (9 subsequent siblings)
11 siblings, 0 replies; 26+ messages in thread
From: Marek Vasut @ 2020-04-29 16:37 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Alexandre Torgue, Patrice Chotard, Patrick Delaunay,
Maxime Coquelin, Manivannan Sadhasivam, linux-stm32
Add another mux option for FDCAN1 pins, this is used on AV96 board.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
---
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
index ca4edcf369d0..b407c6a5e693 100644
--- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
@@ -773,6 +773,26 @@ pins {
};
};
+ m_can1_pins_b: m-can1-1 {
+ pins1 {
+ pinmux = <STM32_PINMUX('A', 12, AF9)>; /* CAN1_TX */
+ slew-rate = <1>;
+ drive-push-pull;
+ bias-disable;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('A', 11, AF9)>; /* CAN1_RX */
+ bias-disable;
+ };
+ };
+
+ m_can1_sleep_pins_b: m_can1-sleep-1 {
+ pins {
+ pinmux = <STM32_PINMUX('A', 12, ANALOG)>, /* CAN1_TX */
+ <STM32_PINMUX('A', 11, ANALOG)>; /* CAN1_RX */
+ };
+ };
+
pwm1_pins_a: pwm1-0 {
pins {
pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 04/12] ARM: dts: stm32: Add bindings for FDCAN1 on AV96
2020-04-29 16:37 [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins Marek Vasut
2020-04-29 16:37 ` [PATCH 02/12] ARM: dts: stm32: Repair I2C2 operation on AV96 Marek Vasut
2020-04-29 16:37 ` [PATCH 03/12] ARM: dts: stm32: Add alternate pinmux for FDCAN1 pins Marek Vasut
@ 2020-04-29 16:37 ` Marek Vasut
2020-04-29 16:37 ` [PATCH 05/12] ARM: dts: stm32: Add alternate pinmux for FDCAN2 pins Marek Vasut
` (8 subsequent siblings)
11 siblings, 0 replies; 26+ messages in thread
From: Marek Vasut @ 2020-04-29 16:37 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Alexandre Torgue, Patrice Chotard, Patrick Delaunay,
Maxime Coquelin, Manivannan Sadhasivam, linux-stm32
Add FDCAN1 bindings to AV96 DT, the FDCAN1 is present on low-speed
expansion connector X6. This is disabled by default to match the
96boards specification though.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
---
arch/arm/boot/dts/stm32mp157a-avenger96.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157a-avenger96.dts b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
index 438c2f70813e..b5cee5034e64 100644
--- a/arch/arm/boot/dts/stm32mp157a-avenger96.dts
+++ b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
@@ -407,6 +407,13 @@ ltdc_ep0_out: endpoint@0 {
};
};
+&m_can1 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&m_can1_pins_b>;
+ pinctrl-1 = <&m_can1_sleep_pins_b>;
+ status = "disabled";
+};
+
&pwr_regulators {
vdd-supply = <&vdd_io>;
vdd_3v3_usbfs-supply = <&vdd_usb>;
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 05/12] ARM: dts: stm32: Add alternate pinmux for FDCAN2 pins
2020-04-29 16:37 [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins Marek Vasut
` (2 preceding siblings ...)
2020-04-29 16:37 ` [PATCH 04/12] ARM: dts: stm32: Add bindings for FDCAN1 on AV96 Marek Vasut
@ 2020-04-29 16:37 ` Marek Vasut
2020-04-29 16:37 ` [PATCH 06/12] ARM: dts: stm32: Add bindings for FDCAN2 on AV96 Marek Vasut
` (7 subsequent siblings)
11 siblings, 0 replies; 26+ messages in thread
From: Marek Vasut @ 2020-04-29 16:37 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Alexandre Torgue, Patrice Chotard, Patrick Delaunay,
Maxime Coquelin, Manivannan Sadhasivam, linux-stm32
Add another mux option for FDCAN2 pins, this is used on AV96 board.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
---
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
index b407c6a5e693..71a3293a6765 100644
--- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
@@ -793,6 +793,26 @@ pins {
};
};
+ m_can2_pins_a: m-can2-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('B', 13, AF9)>; /* CAN2_TX */
+ slew-rate = <1>;
+ drive-push-pull;
+ bias-disable;
+ };
+ pins2 {
+ pinmux = <STM32_PINMUX('B', 5, AF9)>; /* CAN2_RX */
+ bias-disable;
+ };
+ };
+
+ m_can2_sleep_pins_a: m_can2-sleep-0 {
+ pins {
+ pinmux = <STM32_PINMUX('B', 13, ANALOG)>, /* CAN2_TX */
+ <STM32_PINMUX('B', 5, ANALOG)>; /* CAN2_RX */
+ };
+ };
+
pwm1_pins_a: pwm1-0 {
pins {
pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 06/12] ARM: dts: stm32: Add bindings for FDCAN2 on AV96
2020-04-29 16:37 [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins Marek Vasut
` (3 preceding siblings ...)
2020-04-29 16:37 ` [PATCH 05/12] ARM: dts: stm32: Add alternate pinmux for FDCAN2 pins Marek Vasut
@ 2020-04-29 16:37 ` Marek Vasut
2020-04-29 16:37 ` [PATCH 07/12] ARM: dts: stm32: Add alternate pinmux for ADC pins Marek Vasut
` (6 subsequent siblings)
11 siblings, 0 replies; 26+ messages in thread
From: Marek Vasut @ 2020-04-29 16:37 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Alexandre Torgue, Patrice Chotard, Patrick Delaunay,
Maxime Coquelin, Manivannan Sadhasivam, linux-stm32
Add FDCAN2 bindings to AV96 DT, the FDCAN2 is present on low-speed
expansion connector X6. This is disabled by default to match the
96boards specification though.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
---
arch/arm/boot/dts/stm32mp157a-avenger96.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157a-avenger96.dts b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
index b5cee5034e64..2a293ed91c9b 100644
--- a/arch/arm/boot/dts/stm32mp157a-avenger96.dts
+++ b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
@@ -414,6 +414,13 @@ &m_can1 {
status = "disabled";
};
+&m_can2 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&m_can2_pins_a>;
+ pinctrl-1 = <&m_can2_sleep_pins_a>;
+ status = "disabled";
+};
+
&pwr_regulators {
vdd-supply = <&vdd_io>;
vdd_3v3_usbfs-supply = <&vdd_usb>;
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 07/12] ARM: dts: stm32: Add alternate pinmux for ADC pins
2020-04-29 16:37 [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins Marek Vasut
` (4 preceding siblings ...)
2020-04-29 16:37 ` [PATCH 06/12] ARM: dts: stm32: Add bindings for FDCAN2 on AV96 Marek Vasut
@ 2020-04-29 16:37 ` Marek Vasut
2020-04-29 16:37 ` [PATCH 08/12] ARM: dts: stm32: Add bindings for ADC on AV96 Marek Vasut
` (5 subsequent siblings)
11 siblings, 0 replies; 26+ messages in thread
From: Marek Vasut @ 2020-04-29 16:37 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Alexandre Torgue, Patrice Chotard, Patrick Delaunay,
Maxime Coquelin, Manivannan Sadhasivam, linux-stm32
Add another mux option for ADC pins, this is used on AV96 board.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
---
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
index 71a3293a6765..2a77c2259ce5 100644
--- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
@@ -21,6 +21,13 @@ pins {
};
};
+ adc12_ain_pins_b: adc12-ain-1 {
+ pins {
+ pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
+ <STM32_PINMUX('F', 13, ANALOG)>; /* ADC2 in2 */
+ };
+ };
+
adc12_usb_cc_pins_a: adc12-usb-cc-pins-0 {
pins {
pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* ADC12 in18 */
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 08/12] ARM: dts: stm32: Add bindings for ADC on AV96
2020-04-29 16:37 [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins Marek Vasut
` (5 preceding siblings ...)
2020-04-29 16:37 ` [PATCH 07/12] ARM: dts: stm32: Add alternate pinmux for ADC pins Marek Vasut
@ 2020-04-29 16:37 ` Marek Vasut
2020-04-29 16:37 ` [PATCH 09/12] ARM: dts: stm32: Add alternate pinmux for SPI2 pins Marek Vasut
` (4 subsequent siblings)
11 siblings, 0 replies; 26+ messages in thread
From: Marek Vasut @ 2020-04-29 16:37 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Alexandre Torgue, Patrice Chotard, Patrick Delaunay,
Maxime Coquelin, Manivannan Sadhasivam, linux-stm32
Add ADC bindings to AV96 DT, the ADC inputs are present on
low-speed expansion connector X6.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
---
arch/arm/boot/dts/stm32mp157a-avenger96.dts | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157a-avenger96.dts b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
index 2a293ed91c9b..72ca282898eb 100644
--- a/arch/arm/boot/dts/stm32mp157a-avenger96.dts
+++ b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
@@ -128,6 +128,27 @@ wlan_pwr: regulator-wlan {
};
};
+&adc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&adc12_ain_pins_b>;
+ vdd-supply = <&vdd>;
+ vdda-supply = <&vdda>;
+ vref-supply = <&vdda>;
+ status = "okay";
+
+ adc1: adc@0 {
+ st,adc-channels = <0 1 6>;
+ st,min-sample-time-nsecs = <5000>;
+ status = "okay";
+ };
+
+ adc2: adc@100 {
+ st,adc-channels = <0 1 2>;
+ st,min-sample-time-nsecs = <5000>;
+ status = "okay";
+ };
+};
+
ðernet0 {
status = "okay";
pinctrl-0 = <ðernet0_rgmii_pins_c>;
--
2.25.1
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 09/12] ARM: dts: stm32: Add alternate pinmux for SPI2 pins
2020-04-29 16:37 [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins Marek Vasut
` (6 preceding siblings ...)
2020-04-29 16:37 ` [PATCH 08/12] ARM: dts: stm32: Add bindings for ADC on AV96 Marek Vasut
@ 2020-04-29 16:37 ` Marek Vasut
2020-04-29 16:37 ` [PATCH 10/12] ARM: dts: stm32: Add bindings for SPI2 on AV96 Marek Vasut
` (3 subsequent siblings)
11 siblings, 0 replies; 26+ messages in thread
From: Marek Vasut @ 2020-04-29 16:37 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Alexandre Torgue, Patrice Chotard, Patrick Delaunay,
Maxime Coquelin, Manivannan Sadhasivam, linux-stm32
Add another mux option for SPI2 pins, this is used on AV96 board.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
---
arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
index 2a77c2259ce5..22ce98c5f26e 100644
--- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
@@ -1559,6 +1559,21 @@ pins {
};
};
+ spi2_pins_a: spi2-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI1_SCK */
+ <STM32_PINMUX('I', 3, AF5)>; /* SPI1_MOSI */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <1>;
+ };
+
+ pins2 {
+ pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI1_MISO */
+ bias-disable;
+ };
+ };
+
usart2_pins_a: usart2-0 {
pins1 {
pinmux = <STM32_PINMUX('F', 5, AF7)>, /* USART2_TX */
--
2.25.1
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 10/12] ARM: dts: stm32: Add bindings for SPI2 on AV96
2020-04-29 16:37 [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins Marek Vasut
` (7 preceding siblings ...)
2020-04-29 16:37 ` [PATCH 09/12] ARM: dts: stm32: Add alternate pinmux for SPI2 pins Marek Vasut
@ 2020-04-29 16:37 ` Marek Vasut
2020-05-07 12:53 ` Alexandre Torgue
2020-04-29 16:37 ` [PATCH 11/12] ARM: dts: stm32: Split Avenger96 into DHCOR SoM and Avenger96 board Marek Vasut
` (2 subsequent siblings)
11 siblings, 1 reply; 26+ messages in thread
From: Marek Vasut @ 2020-04-29 16:37 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Alexandre Torgue, Patrice Chotard, Patrick Delaunay,
Maxime Coquelin, Manivannan Sadhasivam, linux-stm32
Add SPI2 bindings to AV96 DT, the SPI2 IOs are present on
low-speed expansion connector X6. This is disabled by default
and can be enabled if something is connected there.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
---
arch/arm/boot/dts/stm32mp157a-avenger96.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp157a-avenger96.dts b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
index 72ca282898eb..a9f3ba9da170 100644
--- a/arch/arm/boot/dts/stm32mp157a-avenger96.dts
+++ b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
@@ -551,6 +551,15 @@ brcmf: bcrmf@1 {
};
};
+&spi2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2_pins_a>;
+ cs-gpios = <&gpioi 0 0>;
+ status = "disabled";
+ /delete-property/dmas;
+ /delete-property/dma-names;
+};
+
&uart4 {
/* On Low speed expansion header */
label = "LS-UART1";
--
2.25.1
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH 10/12] ARM: dts: stm32: Add bindings for SPI2 on AV96
2020-04-29 16:37 ` [PATCH 10/12] ARM: dts: stm32: Add bindings for SPI2 on AV96 Marek Vasut
@ 2020-05-07 12:53 ` Alexandre Torgue
2020-05-07 12:57 ` Marek Vasut
0 siblings, 1 reply; 26+ messages in thread
From: Alexandre Torgue @ 2020-05-07 12:53 UTC (permalink / raw)
To: Marek Vasut, linux-arm-kernel
Cc: Patrick Delaunay, linux-stm32, Patrice Chotard, Maxime Coquelin,
Manivannan Sadhasivam
Hi Marek
On 4/29/20 6:37 PM, Marek Vasut wrote:
> Add SPI2 bindings to AV96 DT, the SPI2 IOs are present on
> low-speed expansion connector X6. This is disabled by default
> and can be enabled if something is connected there.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Alexandre Torgue <alexandre.torgue@st.com>
> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
> Cc: Patrice Chotard <patrice.chotard@st.com>
> Cc: Patrick Delaunay <patrick.delaunay@st.com>
> Cc: linux-stm32@st-md-mailman.stormreply.com
> To: linux-arm-kernel@lists.infradead.org
> ---
> arch/arm/boot/dts/stm32mp157a-avenger96.dts | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stm32mp157a-avenger96.dts b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
> index 72ca282898eb..a9f3ba9da170 100644
> --- a/arch/arm/boot/dts/stm32mp157a-avenger96.dts
> +++ b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
> @@ -551,6 +551,15 @@ brcmf: bcrmf@1 {
> };
> };
>
> +&spi2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&spi2_pins_a>;
> + cs-gpios = <&gpioi 0 0>;
> + status = "disabled";
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +};
> +
> &uart4 {
> /* On Low speed expansion header */
> label = "LS-UART1";
>
Sorry I (again) lost the cover-letter (I need to better configure my
mailer) so I repond on this patch only.
As discussed, patch 1 to 10 have been applied on stm32-next.
Patches 11/12 have been dropped waiting for on update.
regards
Alex
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH 10/12] ARM: dts: stm32: Add bindings for SPI2 on AV96
2020-05-07 12:53 ` Alexandre Torgue
@ 2020-05-07 12:57 ` Marek Vasut
0 siblings, 0 replies; 26+ messages in thread
From: Marek Vasut @ 2020-05-07 12:57 UTC (permalink / raw)
To: Alexandre Torgue, linux-arm-kernel
Cc: Patrick Delaunay, linux-stm32, Patrice Chotard, Maxime Coquelin,
Manivannan Sadhasivam
On 5/7/20 2:53 PM, Alexandre Torgue wrote:
> Hi Marek
>
> On 4/29/20 6:37 PM, Marek Vasut wrote:
>> Add SPI2 bindings to AV96 DT, the SPI2 IOs are present on
>> low-speed expansion connector X6. This is disabled by default
>> and can be enabled if something is connected there.
>>
>> Signed-off-by: Marek Vasut <marex@denx.de>
>> Cc: Alexandre Torgue <alexandre.torgue@st.com>
>> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
>> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
>> Cc: Patrice Chotard <patrice.chotard@st.com>
>> Cc: Patrick Delaunay <patrick.delaunay@st.com>
>> Cc: linux-stm32@st-md-mailman.stormreply.com
>> To: linux-arm-kernel@lists.infradead.org
>> ---
>> arch/arm/boot/dts/stm32mp157a-avenger96.dts | 9 +++++++++
>> 1 file changed, 9 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/stm32mp157a-avenger96.dts
>> b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
>> index 72ca282898eb..a9f3ba9da170 100644
>> --- a/arch/arm/boot/dts/stm32mp157a-avenger96.dts
>> +++ b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
>> @@ -551,6 +551,15 @@ brcmf: bcrmf@1 {
>> };
>> };
>> +&spi2 {
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&spi2_pins_a>;
>> + cs-gpios = <&gpioi 0 0>;
>> + status = "disabled";
>> + /delete-property/dmas;
>> + /delete-property/dma-names;
>> +};
>> +
>> &uart4 {
>> /* On Low speed expansion header */
>> label = "LS-UART1";
>>
>
> Sorry I (again) lost the cover-letter (I need to better configure my
> mailer) so I repond on this patch only.
>
> As discussed, patch 1 to 10 have been applied on stm32-next.
> Patches 11/12 have been dropped waiting for on update.
Thank you!
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH 11/12] ARM: dts: stm32: Split Avenger96 into DHCOR SoM and Avenger96 board
2020-04-29 16:37 [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins Marek Vasut
` (8 preceding siblings ...)
2020-04-29 16:37 ` [PATCH 10/12] ARM: dts: stm32: Add bindings for SPI2 on AV96 Marek Vasut
@ 2020-04-29 16:37 ` Marek Vasut
2020-04-29 16:37 ` [PATCH 12/12] ARM: dts: stm32: Add DTs for STM32MP15x variants of the DHCOR SOM and AV96 Marek Vasut
2020-05-06 7:46 ` [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins Alexandre Torgue
11 siblings, 0 replies; 26+ messages in thread
From: Marek Vasut @ 2020-04-29 16:37 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Alexandre Torgue, Patrice Chotard, Patrick Delaunay,
Maxime Coquelin, Manivannan Sadhasivam, linux-stm32
The Avenger96 is in fact an assembly of DH Electronics DHCOR SoM on top
of an Avenger96 reference board. Split the DTs to reflect that and make
sure to DHCOR SoM can be reused on other boards easily.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
---
arch/arm/boot/dts/stm32mp157a-avenger96.dts | 210 +-----------------
.../arm/boot/dts/stm32mp157a-dhcor-io1v8.dtsi | 23 ++
arch/arm/boot/dts/stm32mp157a-dhcor-som.dtsi | 210 ++++++++++++++++++
3 files changed, 237 insertions(+), 206 deletions(-)
create mode 100644 arch/arm/boot/dts/stm32mp157a-dhcor-io1v8.dtsi
create mode 100644 arch/arm/boot/dts/stm32mp157a-dhcor-som.dtsi
diff --git a/arch/arm/boot/dts/stm32mp157a-avenger96.dts b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
index a9f3ba9da170..10f11ca53c7d 100644
--- a/arch/arm/boot/dts/stm32mp157a-avenger96.dts
+++ b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
@@ -2,15 +2,14 @@
/*
* Copyright (C) Linaro Ltd 2019 - All Rights Reserved
* Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+ * Copyright (C) 2020 Marek Vasut <marex@denx.de>
*/
/dts-v1/;
-#include "stm32mp157.dtsi"
-#include "stm32mp15-pinctrl.dtsi"
-#include "stm32mp15xxac-pinctrl.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/mfd/st,stpmic1.h>
+#include "stm32mp157a-dhcor-som.dtsi"
+/* Avenger96 uses DHCOR SoM configured for 1V8 IO operation */
+#include "stm32mp157a-dhcor-io1v8.dtsi"
/ {
model = "Arrow Electronics STM32MP157A Avenger96 board";
@@ -47,11 +46,6 @@ hdmi_con: endpoint {
};
};
- memory@c0000000 {
- device_type = "memory";
- reg = <0xc0000000 0x40000000>;
- };
-
led {
compatible = "gpio-leds";
led1 {
@@ -105,17 +99,6 @@ sound {
status = "okay";
};
- /* Enpirion EP3A8LQI U2 on the DHCOR */
- vdd_io: regulator-buck-io {
- compatible = "regulator-fixed";
- regulator-name = "buck-io";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vdd>;
- };
-
wlan_pwr: regulator-wlan {
compatible = "regulator-fixed";
@@ -206,148 +189,6 @@ &i2c2 { /* X6 I2C2 */
};
&i2c4 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c4_pins_a>;
- i2c-scl-rising-time-ns = <185>;
- i2c-scl-falling-time-ns = <20>;
- status = "okay";
- /delete-property/dmas;
- /delete-property/dma-names;
-
- pmic: stpmic@33 {
- compatible = "st,stpmic1";
- reg = <0x33>;
- interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
- interrupt-controller;
- #interrupt-cells = <2>;
- status = "okay";
-
- regulators {
- compatible = "st,stpmic1-regulators";
-
- ldo1-supply = <&v3v3>;
- ldo2-supply = <&v3v3>;
- ldo3-supply = <&vdd_ddr>;
- ldo5-supply = <&v3v3>;
- ldo6-supply = <&v3v3>;
- pwr_sw1-supply = <&bst_out>;
- pwr_sw2-supply = <&bst_out>;
-
- vddcore: buck1 {
- regulator-name = "vddcore";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1350000>;
- regulator-always-on;
- regulator-initial-mode = <0>;
- regulator-over-current-protection;
- };
-
- vdd_ddr: buck2 {
- regulator-name = "vdd_ddr";
- regulator-min-microvolt = <1350000>;
- regulator-max-microvolt = <1350000>;
- regulator-always-on;
- regulator-initial-mode = <0>;
- regulator-over-current-protection;
- };
-
- vdd: buck3 {
- regulator-name = "vdd";
- regulator-min-microvolt = <2900000>;
- regulator-max-microvolt = <2900000>;
- regulator-always-on;
- regulator-initial-mode = <0>;
- regulator-over-current-protection;
- };
-
- v3v3: buck4 {
- regulator-name = "v3v3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-over-current-protection;
- regulator-initial-mode = <0>;
- };
-
- vdda: ldo1 {
- regulator-name = "vdda";
- regulator-min-microvolt = <2900000>;
- regulator-max-microvolt = <2900000>;
- interrupts = <IT_CURLIM_LDO1 0>;
- };
-
- v2v8: ldo2 {
- regulator-name = "v2v8";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- interrupts = <IT_CURLIM_LDO2 0>;
- };
-
- vtt_ddr: ldo3 {
- regulator-name = "vtt_ddr";
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <750000>;
- regulator-always-on;
- regulator-over-current-protection;
- };
-
- vdd_usb: ldo4 {
- regulator-name = "vdd_usb";
- interrupts = <IT_CURLIM_LDO4 0>;
- };
-
- vdd_sd: ldo5 {
- regulator-name = "vdd_sd";
- regulator-min-microvolt = <2900000>;
- regulator-max-microvolt = <2900000>;
- interrupts = <IT_CURLIM_LDO5 0>;
- regulator-boot-on;
- };
-
- v1v8: ldo6 {
- regulator-name = "v1v8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- interrupts = <IT_CURLIM_LDO6 0>;
- regulator-enable-ramp-delay = <300000>;
- };
-
- vref_ddr: vref_ddr {
- regulator-name = "vref_ddr";
- regulator-always-on;
- };
-
- bst_out: boost {
- regulator-name = "bst_out";
- interrupts = <IT_OCP_BOOST 0>;
- };
-
- vbus_otg: pwr_sw1 {
- regulator-name = "vbus_otg";
- interrupts = <IT_OCP_OTG 0>;
- regulator-active-discharge = <1>;
- };
-
- vbus_sw: pwr_sw2 {
- regulator-name = "vbus_sw";
- interrupts = <IT_OCP_SWOUT 0>;
- regulator-active-discharge = <1>;
- };
- };
-
- onkey {
- compatible = "st,stpmic1-onkey";
- interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
- interrupt-names = "onkey-falling", "onkey-rising";
- status = "okay";
- };
-
- watchdog {
- compatible = "st,stpmic1-wdt";
- status = "disabled";
- };
- };
-
hdmi-transmitter@3d {
compatible = "adi,adv7513";
reg = <0x3d>, <0x2d>, <0x4d>, <0x5d>;
@@ -398,17 +239,6 @@ adv7513_i2s0: endpoint {
};
};
};
-
- eeprom@53 {
- compatible = "atmel,24c02";
- reg = <0x53>;
- pagesize = <16>;
- };
-};
-
-&iwdg2 {
- timeout-sec = <32>;
- status = "okay";
};
<dc {
@@ -442,38 +272,6 @@ &m_can2 {
status = "disabled";
};
-&pwr_regulators {
- vdd-supply = <&vdd_io>;
- vdd_3v3_usbfs-supply = <&vdd_usb>;
-};
-
-&qspi {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
- pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
- reg = <0x58003000 0x1000>, <0x70000000 0x200000>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "okay";
-
- flash0: spi-flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-rx-bus-width = <4>;
- spi-max-frequency = <108000000>;
- #address-cells = <1>;
- #size-cells = <1>;
- };
-};
-
-&rng1 {
- status = "okay";
-};
-
-&rtc {
- status = "okay";
-};
-
&sai2 {
clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
pinctrl-names = "default", "sleep";
diff --git a/arch/arm/boot/dts/stm32mp157a-dhcor-io1v8.dtsi b/arch/arm/boot/dts/stm32mp157a-dhcor-io1v8.dtsi
new file mode 100644
index 000000000000..75172314d7af
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp157a-dhcor-io1v8.dtsi
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+/*
+ * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
+ * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+ * Copyright (C) 2020 Marek Vasut <marex@denx.de>
+ */
+
+/ {
+ /* Enpirion EP3A8LQI U2 on the DHCOR */
+ vdd_io: regulator-buck-io {
+ compatible = "regulator-fixed";
+ regulator-name = "buck-io";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vdd>;
+ };
+};
+
+&pwr_regulators {
+ vdd-supply = <&vdd_io>;
+};
diff --git a/arch/arm/boot/dts/stm32mp157a-dhcor-som.dtsi b/arch/arm/boot/dts/stm32mp157a-dhcor-som.dtsi
new file mode 100644
index 000000000000..7144afeab6ca
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp157a-dhcor-som.dtsi
@@ -0,0 +1,210 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+/*
+ * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
+ * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+ * Copyright (C) 2020 Marek Vasut <marex@denx.de>
+ */
+
+#include "stm32mp157.dtsi"
+#include "stm32mp15-pinctrl.dtsi"
+#include "stm32mp15xxac-pinctrl.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/mfd/st,stpmic1.h>
+
+/ {
+ aliases {
+ spi0 = &qspi;
+ };
+
+ memory@c0000000 {
+ device_type = "memory";
+ reg = <0xc0000000 0x40000000>;
+ };
+};
+
+&i2c4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c4_pins_a>;
+ i2c-scl-rising-time-ns = <185>;
+ i2c-scl-falling-time-ns = <20>;
+ status = "okay";
+ /delete-property/dmas;
+ /delete-property/dma-names;
+
+ pmic: stpmic@33 {
+ compatible = "st,stpmic1";
+ reg = <0x33>;
+ interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ status = "okay";
+
+ regulators {
+ compatible = "st,stpmic1-regulators";
+
+ ldo1-supply = <&v3v3>;
+ ldo2-supply = <&v3v3>;
+ ldo3-supply = <&vdd_ddr>;
+ ldo5-supply = <&v3v3>;
+ ldo6-supply = <&v3v3>;
+ pwr_sw1-supply = <&bst_out>;
+ pwr_sw2-supply = <&bst_out>;
+
+ vddcore: buck1 {
+ regulator-name = "vddcore";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ regulator-initial-mode = <0>;
+ regulator-over-current-protection;
+ };
+
+ vdd_ddr: buck2 {
+ regulator-name = "vdd_ddr";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ regulator-initial-mode = <0>;
+ regulator-over-current-protection;
+ };
+
+ vdd: buck3 {
+ regulator-name = "vdd";
+ regulator-min-microvolt = <2900000>;
+ regulator-max-microvolt = <2900000>;
+ regulator-always-on;
+ regulator-initial-mode = <0>;
+ regulator-over-current-protection;
+ };
+
+ v3v3: buck4 {
+ regulator-name = "v3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-over-current-protection;
+ regulator-initial-mode = <0>;
+ };
+
+ vdda: ldo1 {
+ regulator-name = "vdda";
+ regulator-min-microvolt = <2900000>;
+ regulator-max-microvolt = <2900000>;
+ interrupts = <IT_CURLIM_LDO1 0>;
+ };
+
+ v2v8: ldo2 {
+ regulator-name = "v2v8";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ interrupts = <IT_CURLIM_LDO2 0>;
+ };
+
+ vtt_ddr: ldo3 {
+ regulator-name = "vtt_ddr";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <750000>;
+ regulator-always-on;
+ regulator-over-current-protection;
+ };
+
+ vdd_usb: ldo4 {
+ regulator-name = "vdd_usb";
+ interrupts = <IT_CURLIM_LDO4 0>;
+ };
+
+ vdd_sd: ldo5 {
+ regulator-name = "vdd_sd";
+ regulator-min-microvolt = <2900000>;
+ regulator-max-microvolt = <2900000>;
+ interrupts = <IT_CURLIM_LDO5 0>;
+ regulator-boot-on;
+ };
+
+ v1v8: ldo6 {
+ regulator-name = "v1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ interrupts = <IT_CURLIM_LDO6 0>;
+ regulator-enable-ramp-delay = <300000>;
+ };
+
+ vref_ddr: vref_ddr {
+ regulator-name = "vref_ddr";
+ regulator-always-on;
+ };
+
+ bst_out: boost {
+ regulator-name = "bst_out";
+ interrupts = <IT_OCP_BOOST 0>;
+ };
+
+ vbus_otg: pwr_sw1 {
+ regulator-name = "vbus_otg";
+ interrupts = <IT_OCP_OTG 0>;
+ regulator-active-discharge = <1>;
+ };
+
+ vbus_sw: pwr_sw2 {
+ regulator-name = "vbus_sw";
+ interrupts = <IT_OCP_SWOUT 0>;
+ regulator-active-discharge = <1>;
+ };
+ };
+
+ onkey {
+ compatible = "st,stpmic1-onkey";
+ interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
+ interrupt-names = "onkey-falling", "onkey-rising";
+ status = "okay";
+ };
+
+ watchdog {
+ compatible = "st,stpmic1-wdt";
+ status = "disabled";
+ };
+ };
+
+ eeprom@53 {
+ compatible = "atmel,24c02";
+ reg = <0x53>;
+ pagesize = <16>;
+ };
+};
+
+&iwdg2 {
+ timeout-sec = <32>;
+ status = "okay";
+};
+
+&pwr_regulators {
+ vdd-supply = <&vdd>;
+ vdd_3v3_usbfs-supply = <&vdd_usb>;
+};
+
+&qspi {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
+ pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
+ reg = <0x58003000 0x1000>, <0x70000000 0x200000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ flash0: spi-flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-rx-bus-width = <4>;
+ spi-max-frequency = <108000000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+};
+
+&rng1 {
+ status = "okay";
+};
+
+&rtc {
+ status = "okay";
+};
--
2.25.1
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^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH 12/12] ARM: dts: stm32: Add DTs for STM32MP15x variants of the DHCOR SOM and AV96
2020-04-29 16:37 [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins Marek Vasut
` (9 preceding siblings ...)
2020-04-29 16:37 ` [PATCH 11/12] ARM: dts: stm32: Split Avenger96 into DHCOR SoM and Avenger96 board Marek Vasut
@ 2020-04-29 16:37 ` Marek Vasut
2020-05-07 15:26 ` Manivannan Sadhasivam
2020-05-06 7:46 ` [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins Alexandre Torgue
11 siblings, 1 reply; 26+ messages in thread
From: Marek Vasut @ 2020-04-29 16:37 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Alexandre Torgue, Patrice Chotard, Patrick Delaunay,
Maxime Coquelin, Manivannan Sadhasivam, linux-stm32
The Avenger96 can be populated with DH Electronics DHCOR SoM with any
STM32MP15xA variant. Add the DTs describing the remaining combinations.
Since the board is a combination of carrier board and SoM, update the
DT name, however keep the old DT for backward compatibility.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
---
arch/arm/boot/dts/Makefile | 3 +
.../boot/dts/stm32mp151a-dhcor-avenger96.dts | 9 +
arch/arm/boot/dts/stm32mp151a-dhcor-som.dtsi | 8 +
.../boot/dts/stm32mp153a-dhcor-avenger96.dts | 23 +
arch/arm/boot/dts/stm32mp153a-dhcor-som.dtsi | 8 +
arch/arm/boot/dts/stm32mp157a-avenger96.dts | 416 +-----------------
.../boot/dts/stm32mp157a-dhcor-avenger96.dts | 23 +
arch/arm/boot/dts/stm32mp157a-dhcor-som.dtsi | 206 +--------
.../boot/dts/stm32mp15xa-dhcor-avenger96.dtsi | 405 +++++++++++++++++
...o1v8.dtsi => stm32mp15xa-dhcor-io1v8.dtsi} | 0
arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi | 209 +++++++++
11 files changed, 692 insertions(+), 618 deletions(-)
create mode 100644 arch/arm/boot/dts/stm32mp151a-dhcor-avenger96.dts
create mode 100644 arch/arm/boot/dts/stm32mp151a-dhcor-som.dtsi
create mode 100644 arch/arm/boot/dts/stm32mp153a-dhcor-avenger96.dts
create mode 100644 arch/arm/boot/dts/stm32mp153a-dhcor-som.dtsi
create mode 100644 arch/arm/boot/dts/stm32mp157a-dhcor-avenger96.dts
create mode 100644 arch/arm/boot/dts/stm32mp15xa-dhcor-avenger96.dtsi
rename arch/arm/boot/dts/{stm32mp157a-dhcor-io1v8.dtsi => stm32mp15xa-dhcor-io1v8.dtsi} (100%)
create mode 100644 arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f43467b02bcd..b4a4d2b0f18e 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1029,6 +1029,9 @@ dtb-$(CONFIG_ARCH_STM32) += \
stm32h743i-eval.dtb \
stm32h743i-disco.dtb \
stm32mp157a-avenger96.dtb \
+ stm32mp151a-dhcor-avenger96.dtb \
+ stm32mp153a-dhcor-avenger96.dtb \
+ stm32mp157a-dhcor-avenger96.dtb \
stm32mp157a-dk1.dtb \
stm32mp157c-dhcom-pdk2.dtb \
stm32mp157c-dk2.dtb \
diff --git a/arch/arm/boot/dts/stm32mp151a-dhcor-avenger96.dts b/arch/arm/boot/dts/stm32mp151a-dhcor-avenger96.dts
new file mode 100644
index 000000000000..0f3875fbdd73
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp151a-dhcor-avenger96.dts
@@ -0,0 +1,9 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+/*
+ * Copyright (C) 2020 Marek Vasut <marex@denx.de>
+ */
+
+/dts-v1/;
+
+#include "stm32mp151a-dhcor-som.dtsi"
+#include "stm32mp15xa-dhcor-avenger96.dtsi"
diff --git a/arch/arm/boot/dts/stm32mp151a-dhcor-som.dtsi b/arch/arm/boot/dts/stm32mp151a-dhcor-som.dtsi
new file mode 100644
index 000000000000..40718ae324b3
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp151a-dhcor-som.dtsi
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+/*
+ * Copyright (C) 2020 Marek Vasut <marex@denx.de>
+ */
+
+#include "stm32mp151.dtsi"
+#include "stm32mp15xc.dtsi"
+#include "stm32mp15xx-dhcor-som.dtsi"
diff --git a/arch/arm/boot/dts/stm32mp153a-dhcor-avenger96.dts b/arch/arm/boot/dts/stm32mp153a-dhcor-avenger96.dts
new file mode 100644
index 000000000000..e6d674e47e7e
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp153a-dhcor-avenger96.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+/*
+ * Copyright (C) 2020 Marek Vasut <marex@denx.de>
+ */
+
+/dts-v1/;
+
+#include "stm32mp153a-dhcor-som.dtsi"
+#include "stm32mp15xa-dhcor-avenger96.dtsi"
+
+&m_can1 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&m_can1_pins_b>;
+ pinctrl-1 = <&m_can1_sleep_pins_b>;
+ status = "disabled";
+};
+
+&m_can2 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&m_can2_pins_a>;
+ pinctrl-1 = <&m_can2_sleep_pins_a>;
+ status = "disabled";
+};
diff --git a/arch/arm/boot/dts/stm32mp153a-dhcor-som.dtsi b/arch/arm/boot/dts/stm32mp153a-dhcor-som.dtsi
new file mode 100644
index 000000000000..e33587e7bd11
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp153a-dhcor-som.dtsi
@@ -0,0 +1,8 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+/*
+ * Copyright (C) 2020 Marek Vasut <marex@denx.de>
+ */
+
+#include "stm32mp153.dtsi"
+#include "stm32mp15xc.dtsi"
+#include "stm32mp15xx-dhcor-som.dtsi"
diff --git a/arch/arm/boot/dts/stm32mp157a-avenger96.dts b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
index 10f11ca53c7d..dc3bbd576756 100644
--- a/arch/arm/boot/dts/stm32mp157a-avenger96.dts
+++ b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
@@ -1,421 +1,9 @@
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
/*
- * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
- * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
* Copyright (C) 2020 Marek Vasut <marex@denx.de>
*/
/dts-v1/;
-#include "stm32mp157a-dhcor-som.dtsi"
-/* Avenger96 uses DHCOR SoM configured for 1V8 IO operation */
-#include "stm32mp157a-dhcor-io1v8.dtsi"
-
-/ {
- model = "Arrow Electronics STM32MP157A Avenger96 board";
- compatible = "arrow,stm32mp157a-avenger96", "st,stm32mp157";
-
- aliases {
- ethernet0 = ðernet0;
- mmc0 = &sdmmc1;
- serial0 = &uart4;
- serial1 = &uart7;
- serial2 = &usart2;
- spi0 = &qspi;
- };
-
- /* XTal Q1 */
- cec_clock: clk-cec-fixed {
- #clock-cells = <0>;
- compatible = "fixed-clock";
- clock-frequency = <24000000>;
- };
-
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- hdmi-out {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con: endpoint {
- remote-endpoint = <&adv7513_out>;
- };
- };
- };
-
- led {
- compatible = "gpio-leds";
- led1 {
- label = "green:user0";
- gpios = <&gpioz 7 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "heartbeat";
- default-state = "off";
- };
-
- led2 {
- label = "green:user1";
- gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "mmc0";
- default-state = "off";
- };
-
- led3 {
- label = "green:user2";
- gpios = <&gpiog 0 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "mmc1";
- default-state = "off";
- };
-
- led4 {
- label = "green:user3";
- gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "none";
- default-state = "off";
- panic-indicator;
- };
- };
-
- sd_switch: regulator-sd_switch {
- compatible = "regulator-gpio";
- regulator-name = "sd_switch";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <2900000>;
- regulator-type = "voltage";
- regulator-always-on;
-
- gpios = <&gpioi 5 GPIO_ACTIVE_HIGH>;
- gpios-states = <0>;
- states = <1800000 0x1>,
- <2900000 0x0>;
- };
-
- sound {
- compatible = "audio-graph-card";
- label = "STM32MP1-AV96-HDMI";
- dais = <&sai2a_port>;
- status = "okay";
- };
-
- wlan_pwr: regulator-wlan {
- compatible = "regulator-fixed";
-
- regulator-name = "wl-reg";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
-
- gpios = <&gpioz 3 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-};
-
-&adc {
- pinctrl-names = "default";
- pinctrl-0 = <&adc12_ain_pins_b>;
- vdd-supply = <&vdd>;
- vdda-supply = <&vdda>;
- vref-supply = <&vdda>;
- status = "okay";
-
- adc1: adc@0 {
- st,adc-channels = <0 1 6>;
- st,min-sample-time-nsecs = <5000>;
- status = "okay";
- };
-
- adc2: adc@100 {
- st,adc-channels = <0 1 2>;
- st,min-sample-time-nsecs = <5000>;
- status = "okay";
- };
-};
-
-ðernet0 {
- status = "okay";
- pinctrl-0 = <ðernet0_rgmii_pins_c>;
- pinctrl-1 = <ðernet0_rgmii_sleep_pins_c>;
- pinctrl-names = "default", "sleep";
- phy-mode = "rgmii";
- max-speed = <1000>;
- phy-handle = <&phy0>;
-
- mdio0 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "snps,dwmac-mdio";
- reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
- reset-delay-us = <1000>;
-
- phy0: ethernet-phy@7 {
- reg = <7>;
-
- rxc-skew-ps = <1500>;
- rxdv-skew-ps = <540>;
- rxd0-skew-ps = <420>;
- rxd1-skew-ps = <420>;
- rxd2-skew-ps = <420>;
- rxd3-skew-ps = <420>;
-
- txc-skew-ps = <1440>;
- txen-skew-ps = <540>;
- txd0-skew-ps = <420>;
- txd1-skew-ps = <420>;
- txd2-skew-ps = <420>;
- txd3-skew-ps = <420>;
- };
- };
-};
-
-&i2c1 { /* X6 I2C1 */
- pinctrl-names = "default";
- pinctrl-0 = <&i2c1_pins_b>;
- i2c-scl-rising-time-ns = <185>;
- i2c-scl-falling-time-ns = <20>;
- status = "okay";
- /delete-property/dmas;
- /delete-property/dma-names;
-};
-
-&i2c2 { /* X6 I2C2 */
- pinctrl-names = "default";
- pinctrl-0 = <&i2c2_pins_c>;
- i2c-scl-rising-time-ns = <185>;
- i2c-scl-falling-time-ns = <20>;
- status = "okay";
- /delete-property/dmas;
- /delete-property/dma-names;
-};
-
-&i2c4 {
- hdmi-transmitter@3d {
- compatible = "adi,adv7513";
- reg = <0x3d>, <0x2d>, <0x4d>, <0x5d>;
- reg-names = "main", "cec", "edid", "packet";
- clocks = <&cec_clock>;
- clock-names = "cec";
-
- avdd-supply = <&v3v3>;
- dvdd-supply = <&v3v3>;
- pvdd-supply = <&v3v3>;
- dvdd-3v-supply = <&v3v3>;
- bgvdd-supply = <&v3v3>;
-
- interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
- interrupt-parent = <&gpiog>;
-
- status = "okay";
-
- adi,input-depth = <8>;
- adi,input-colorspace = "rgb";
- adi,input-clock = "1x";
- adi,input-style = <1>;
- adi,input-justification = "evenly";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- adv7513_in: endpoint {
- remote-endpoint = <<dc_ep0_out>;
- };
- };
-
- port@1 {
- reg = <1>;
- adv7513_out: endpoint {
- remote-endpoint = <&hdmi_con>;
- };
- };
-
- port@2 {
- reg = <2>;
- adv7513_i2s0: endpoint {
- remote-endpoint = <&sai2a_endpoint>;
- };
- };
- };
- };
-};
-
-<dc {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <<dc_pins_d>;
- pinctrl-1 = <<dc_sleep_pins_d>;
- status = "okay";
-
- port {
- #address-cells = <1>;
- #size-cells = <0>;
-
- ltdc_ep0_out: endpoint@0 {
- reg = <0>;
- remote-endpoint = <&adv7513_in>;
- };
- };
-};
-
-&m_can1 {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&m_can1_pins_b>;
- pinctrl-1 = <&m_can1_sleep_pins_b>;
- status = "disabled";
-};
-
-&m_can2 {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&m_can2_pins_a>;
- pinctrl-1 = <&m_can2_sleep_pins_a>;
- status = "disabled";
-};
-
-&sai2 {
- clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&sai2a_pins_c>;
- pinctrl-1 = <&sai2a_sleep_pins_c>;
- clock-names = "pclk", "x8k", "x11k";
- status = "okay";
-
- sai2a: audio-controller@4400b004 {
- #clock-cells = <0>;
- dma-names = "tx";
- clocks = <&rcc SAI2_K>;
- clock-names = "sai_ck";
- status = "okay";
-
- sai2a_port: port {
- sai2a_endpoint: endpoint {
- remote-endpoint = <&adv7513_i2s0>;
- format = "i2s";
- mclk-fs = <256>;
- };
- };
- };
-};
-
-&sdmmc1 {
- pinctrl-names = "default", "opendrain", "sleep";
- pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_b>;
- pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_b>;
- pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_b>;
- cd-gpios = <&gpioi 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
- disable-wp;
- st,sig-dir;
- st,neg-edge;
- st,use-ckin;
- bus-width = <4>;
- vmmc-supply = <&vdd_sd>;
- vqmmc-supply = <&sd_switch>;
- status = "okay";
-};
-
-&sdmmc2 {
- pinctrl-names = "default", "opendrain", "sleep";
- pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_b>;
- pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_b>;
- pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_b>;
- bus-width = <8>;
- mmc-ddr-1_8v;
- no-sd;
- no-sdio;
- non-removable;
- st,neg-edge;
- vmmc-supply = <&v3v3>;
- vqmmc-supply = <&vdd_io>;
- status = "okay";
-};
-
-&sdmmc3 {
- pinctrl-names = "default", "opendrain", "sleep";
- pinctrl-0 = <&sdmmc3_b4_pins_b>;
- pinctrl-1 = <&sdmmc3_b4_od_pins_b>;
- pinctrl-2 = <&sdmmc3_b4_sleep_pins_b>;
- broken-cd;
- non-removable;
- st,neg-edge;
- bus-width = <4>;
- vmmc-supply = <&wlan_pwr>;
- status = "okay";
-
- #address-cells = <1>;
- #size-cells = <0>;
- brcmf: bcrmf@1 {
- reg = <1>;
- compatible = "brcm,bcm4329-fmac";
- };
-};
-
-&spi2 {
- pinctrl-names = "default";
- pinctrl-0 = <&spi2_pins_a>;
- cs-gpios = <&gpioi 0 0>;
- status = "disabled";
- /delete-property/dmas;
- /delete-property/dma-names;
-};
-
-&uart4 {
- /* On Low speed expansion header */
- label = "LS-UART1";
- pinctrl-names = "default";
- pinctrl-0 = <&uart4_pins_b>;
- status = "okay";
-};
-
-&uart7 {
- /* On Low speed expansion header */
- label = "LS-UART0";
- pinctrl-names = "default";
- pinctrl-0 = <&uart7_pins_a>;
- status = "okay";
-};
-
-/* Bluetooth */
-&usart2 {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&usart2_pins_a>;
- pinctrl-1 = <&usart2_sleep_pins_a>;
- st,hw-flow-ctrl;
- status = "okay";
-
- bluetooth {
- compatible = "brcm,bcm43438-bt";
- max-speed = <3000000>;
- shutdown-gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>;
- };
-};
-
-&usbh_ehci {
- phys = <&usbphyc_port0>;
- phy-names = "usb";
- status = "okay";
-};
-
-&usbotg_hs {
- pinctrl-0 = <&usbotg_hs_pins_a>;
- pinctrl-names = "default";
- phy-names = "usb2-phy";
- phys = <&usbphyc_port1 0>;
- status = "okay";
- vbus-supply = <&vbus_otg>;
-};
-
-&usbphyc {
- status = "okay";
-};
-
-&usbphyc_port0 {
- phy-supply = <&vdd_usb>;
- vdda1v1-supply = <®11>;
- vdda1v8-supply = <®18>;
-};
-
-&usbphyc_port1 {
- phy-supply = <&vdd_usb>;
- vdda1v1-supply = <®11>;
- vdda1v8-supply = <®18>;
-};
+/* This DT is here only for backward compatibility */
+#include "stm32mp157a-dhcor-avenger96.dts"
diff --git a/arch/arm/boot/dts/stm32mp157a-dhcor-avenger96.dts b/arch/arm/boot/dts/stm32mp157a-dhcor-avenger96.dts
new file mode 100644
index 000000000000..7355af3d14f6
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp157a-dhcor-avenger96.dts
@@ -0,0 +1,23 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+/*
+ * Copyright (C) 2020 Marek Vasut <marex@denx.de>
+ */
+
+/dts-v1/;
+
+#include "stm32mp157a-dhcor-som.dtsi"
+#include "stm32mp15xa-dhcor-avenger96.dtsi"
+
+&m_can1 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&m_can1_pins_b>;
+ pinctrl-1 = <&m_can1_sleep_pins_b>;
+ status = "disabled";
+};
+
+&m_can2 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&m_can2_pins_a>;
+ pinctrl-1 = <&m_can2_sleep_pins_a>;
+ status = "disabled";
+};
diff --git a/arch/arm/boot/dts/stm32mp157a-dhcor-som.dtsi b/arch/arm/boot/dts/stm32mp157a-dhcor-som.dtsi
index 7144afeab6ca..7dac547e7996 100644
--- a/arch/arm/boot/dts/stm32mp157a-dhcor-som.dtsi
+++ b/arch/arm/boot/dts/stm32mp157a-dhcor-som.dtsi
@@ -1,210 +1,8 @@
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
/*
- * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
- * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
* Copyright (C) 2020 Marek Vasut <marex@denx.de>
*/
#include "stm32mp157.dtsi"
-#include "stm32mp15-pinctrl.dtsi"
-#include "stm32mp15xxac-pinctrl.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/mfd/st,stpmic1.h>
-
-/ {
- aliases {
- spi0 = &qspi;
- };
-
- memory@c0000000 {
- device_type = "memory";
- reg = <0xc0000000 0x40000000>;
- };
-};
-
-&i2c4 {
- pinctrl-names = "default";
- pinctrl-0 = <&i2c4_pins_a>;
- i2c-scl-rising-time-ns = <185>;
- i2c-scl-falling-time-ns = <20>;
- status = "okay";
- /delete-property/dmas;
- /delete-property/dma-names;
-
- pmic: stpmic@33 {
- compatible = "st,stpmic1";
- reg = <0x33>;
- interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
- interrupt-controller;
- #interrupt-cells = <2>;
- status = "okay";
-
- regulators {
- compatible = "st,stpmic1-regulators";
-
- ldo1-supply = <&v3v3>;
- ldo2-supply = <&v3v3>;
- ldo3-supply = <&vdd_ddr>;
- ldo5-supply = <&v3v3>;
- ldo6-supply = <&v3v3>;
- pwr_sw1-supply = <&bst_out>;
- pwr_sw2-supply = <&bst_out>;
-
- vddcore: buck1 {
- regulator-name = "vddcore";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1350000>;
- regulator-always-on;
- regulator-initial-mode = <0>;
- regulator-over-current-protection;
- };
-
- vdd_ddr: buck2 {
- regulator-name = "vdd_ddr";
- regulator-min-microvolt = <1350000>;
- regulator-max-microvolt = <1350000>;
- regulator-always-on;
- regulator-initial-mode = <0>;
- regulator-over-current-protection;
- };
-
- vdd: buck3 {
- regulator-name = "vdd";
- regulator-min-microvolt = <2900000>;
- regulator-max-microvolt = <2900000>;
- regulator-always-on;
- regulator-initial-mode = <0>;
- regulator-over-current-protection;
- };
-
- v3v3: buck4 {
- regulator-name = "v3v3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-over-current-protection;
- regulator-initial-mode = <0>;
- };
-
- vdda: ldo1 {
- regulator-name = "vdda";
- regulator-min-microvolt = <2900000>;
- regulator-max-microvolt = <2900000>;
- interrupts = <IT_CURLIM_LDO1 0>;
- };
-
- v2v8: ldo2 {
- regulator-name = "v2v8";
- regulator-min-microvolt = <2800000>;
- regulator-max-microvolt = <2800000>;
- interrupts = <IT_CURLIM_LDO2 0>;
- };
-
- vtt_ddr: ldo3 {
- regulator-name = "vtt_ddr";
- regulator-min-microvolt = <500000>;
- regulator-max-microvolt = <750000>;
- regulator-always-on;
- regulator-over-current-protection;
- };
-
- vdd_usb: ldo4 {
- regulator-name = "vdd_usb";
- interrupts = <IT_CURLIM_LDO4 0>;
- };
-
- vdd_sd: ldo5 {
- regulator-name = "vdd_sd";
- regulator-min-microvolt = <2900000>;
- regulator-max-microvolt = <2900000>;
- interrupts = <IT_CURLIM_LDO5 0>;
- regulator-boot-on;
- };
-
- v1v8: ldo6 {
- regulator-name = "v1v8";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- interrupts = <IT_CURLIM_LDO6 0>;
- regulator-enable-ramp-delay = <300000>;
- };
-
- vref_ddr: vref_ddr {
- regulator-name = "vref_ddr";
- regulator-always-on;
- };
-
- bst_out: boost {
- regulator-name = "bst_out";
- interrupts = <IT_OCP_BOOST 0>;
- };
-
- vbus_otg: pwr_sw1 {
- regulator-name = "vbus_otg";
- interrupts = <IT_OCP_OTG 0>;
- regulator-active-discharge = <1>;
- };
-
- vbus_sw: pwr_sw2 {
- regulator-name = "vbus_sw";
- interrupts = <IT_OCP_SWOUT 0>;
- regulator-active-discharge = <1>;
- };
- };
-
- onkey {
- compatible = "st,stpmic1-onkey";
- interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
- interrupt-names = "onkey-falling", "onkey-rising";
- status = "okay";
- };
-
- watchdog {
- compatible = "st,stpmic1-wdt";
- status = "disabled";
- };
- };
-
- eeprom@53 {
- compatible = "atmel,24c02";
- reg = <0x53>;
- pagesize = <16>;
- };
-};
-
-&iwdg2 {
- timeout-sec = <32>;
- status = "okay";
-};
-
-&pwr_regulators {
- vdd-supply = <&vdd>;
- vdd_3v3_usbfs-supply = <&vdd_usb>;
-};
-
-&qspi {
- pinctrl-names = "default", "sleep";
- pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
- pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
- reg = <0x58003000 0x1000>, <0x70000000 0x200000>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "okay";
-
- flash0: spi-flash@0 {
- compatible = "jedec,spi-nor";
- reg = <0>;
- spi-rx-bus-width = <4>;
- spi-max-frequency = <108000000>;
- #address-cells = <1>;
- #size-cells = <1>;
- };
-};
-
-&rng1 {
- status = "okay";
-};
-
-&rtc {
- status = "okay";
-};
+#include "stm32mp15xc.dtsi"
+#include "stm32mp15xx-dhcor-som.dtsi"
diff --git a/arch/arm/boot/dts/stm32mp15xa-dhcor-avenger96.dtsi b/arch/arm/boot/dts/stm32mp15xa-dhcor-avenger96.dtsi
new file mode 100644
index 000000000000..baec592aee13
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp15xa-dhcor-avenger96.dtsi
@@ -0,0 +1,405 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+/*
+ * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
+ * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+ * Copyright (C) 2020 Marek Vasut <marex@denx.de>
+ */
+
+#include "stm32mp157a-dhcor-som.dtsi"
+/* Avenger96 uses DHCOR SoM configured for 1V8 IO operation */
+#include "stm32mp15xa-dhcor-io1v8.dtsi"
+
+/ {
+ model = "Arrow Electronics STM32MP157A Avenger96 board";
+ compatible = "arrow,stm32mp157a-avenger96", "st,stm32mp157";
+
+ aliases {
+ ethernet0 = ðernet0;
+ mmc0 = &sdmmc1;
+ serial0 = &uart4;
+ serial1 = &uart7;
+ serial2 = &usart2;
+ spi0 = &qspi;
+ };
+
+ /* XTal Q1 */
+ cec_clock: clk-cec-fixed {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ hdmi-out {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con: endpoint {
+ remote-endpoint = <&adv7513_out>;
+ };
+ };
+ };
+
+ led {
+ compatible = "gpio-leds";
+ led1 {
+ label = "green:user0";
+ gpios = <&gpioz 7 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ default-state = "off";
+ };
+
+ led2 {
+ label = "green:user1";
+ gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc0";
+ default-state = "off";
+ };
+
+ led3 {
+ label = "green:user2";
+ gpios = <&gpiog 0 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc1";
+ default-state = "off";
+ };
+
+ led4 {
+ label = "green:user3";
+ gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "none";
+ default-state = "off";
+ panic-indicator;
+ };
+ };
+
+ sd_switch: regulator-sd_switch {
+ compatible = "regulator-gpio";
+ regulator-name = "sd_switch";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <2900000>;
+ regulator-type = "voltage";
+ regulator-always-on;
+
+ gpios = <&gpioi 5 GPIO_ACTIVE_HIGH>;
+ gpios-states = <0>;
+ states = <1800000 0x1>,
+ <2900000 0x0>;
+ };
+
+ sound {
+ compatible = "audio-graph-card";
+ label = "STM32MP1-AV96-HDMI";
+ dais = <&sai2a_port>;
+ status = "okay";
+ };
+
+ wlan_pwr: regulator-wlan {
+ compatible = "regulator-fixed";
+
+ regulator-name = "wl-reg";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ gpios = <&gpioz 3 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+};
+
+&adc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&adc12_ain_pins_b>;
+ vdd-supply = <&vdd>;
+ vdda-supply = <&vdda>;
+ vref-supply = <&vdda>;
+ status = "okay";
+
+ adc1: adc@0 {
+ st,adc-channels = <0 1 6>;
+ st,min-sample-time-nsecs = <5000>;
+ status = "okay";
+ };
+
+ adc2: adc@100 {
+ st,adc-channels = <0 1 2>;
+ st,min-sample-time-nsecs = <5000>;
+ status = "okay";
+ };
+};
+
+ðernet0 {
+ status = "okay";
+ pinctrl-0 = <ðernet0_rgmii_pins_c>;
+ pinctrl-1 = <ðernet0_rgmii_sleep_pins_c>;
+ pinctrl-names = "default", "sleep";
+ phy-mode = "rgmii";
+ max-speed = <1000>;
+ phy-handle = <&phy0>;
+
+ mdio0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
+ reset-delay-us = <1000>;
+
+ phy0: ethernet-phy@7 {
+ reg = <7>;
+
+ rxc-skew-ps = <1500>;
+ rxdv-skew-ps = <540>;
+ rxd0-skew-ps = <420>;
+ rxd1-skew-ps = <420>;
+ rxd2-skew-ps = <420>;
+ rxd3-skew-ps = <420>;
+
+ txc-skew-ps = <1440>;
+ txen-skew-ps = <540>;
+ txd0-skew-ps = <420>;
+ txd1-skew-ps = <420>;
+ txd2-skew-ps = <420>;
+ txd3-skew-ps = <420>;
+ };
+ };
+};
+
+&i2c1 { /* X6 I2C1 */
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins_b>;
+ i2c-scl-rising-time-ns = <185>;
+ i2c-scl-falling-time-ns = <20>;
+ status = "okay";
+ /delete-property/dmas;
+ /delete-property/dma-names;
+};
+
+&i2c2 { /* X6 I2C2 */
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins_c>;
+ i2c-scl-rising-time-ns = <185>;
+ i2c-scl-falling-time-ns = <20>;
+ status = "okay";
+ /delete-property/dmas;
+ /delete-property/dma-names;
+};
+
+&i2c4 {
+ hdmi-transmitter@3d {
+ compatible = "adi,adv7513";
+ reg = <0x3d>, <0x2d>, <0x4d>, <0x5d>;
+ reg-names = "main", "cec", "edid", "packet";
+ clocks = <&cec_clock>;
+ clock-names = "cec";
+
+ avdd-supply = <&v3v3>;
+ dvdd-supply = <&v3v3>;
+ pvdd-supply = <&v3v3>;
+ dvdd-3v-supply = <&v3v3>;
+ bgvdd-supply = <&v3v3>;
+
+ interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
+ interrupt-parent = <&gpiog>;
+
+ status = "okay";
+
+ adi,input-depth = <8>;
+ adi,input-colorspace = "rgb";
+ adi,input-clock = "1x";
+ adi,input-style = <1>;
+ adi,input-justification = "evenly";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ adv7513_in: endpoint {
+ remote-endpoint = <<dc_ep0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ adv7513_out: endpoint {
+ remote-endpoint = <&hdmi_con>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ adv7513_i2s0: endpoint {
+ remote-endpoint = <&sai2a_endpoint>;
+ };
+ };
+ };
+ };
+};
+
+<dc {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <<dc_pins_d>;
+ pinctrl-1 = <<dc_sleep_pins_d>;
+ status = "okay";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ltdc_ep0_out: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&adv7513_in>;
+ };
+ };
+};
+
+&sai2 {
+ clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&sai2a_pins_c>;
+ pinctrl-1 = <&sai2a_sleep_pins_c>;
+ clock-names = "pclk", "x8k", "x11k";
+ status = "okay";
+
+ sai2a: audio-controller@4400b004 {
+ #clock-cells = <0>;
+ dma-names = "tx";
+ clocks = <&rcc SAI2_K>;
+ clock-names = "sai_ck";
+ status = "okay";
+
+ sai2a_port: port {
+ sai2a_endpoint: endpoint {
+ remote-endpoint = <&adv7513_i2s0>;
+ format = "i2s";
+ mclk-fs = <256>;
+ };
+ };
+ };
+};
+
+&sdmmc1 {
+ pinctrl-names = "default", "opendrain", "sleep";
+ pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_b>;
+ pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_b>;
+ pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_b>;
+ cd-gpios = <&gpioi 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+ disable-wp;
+ st,sig-dir;
+ st,neg-edge;
+ st,use-ckin;
+ bus-width = <4>;
+ vmmc-supply = <&vdd_sd>;
+ vqmmc-supply = <&sd_switch>;
+ status = "okay";
+};
+
+&sdmmc2 {
+ pinctrl-names = "default", "opendrain", "sleep";
+ pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_b>;
+ pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_b>;
+ pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_b>;
+ bus-width = <8>;
+ mmc-ddr-1_8v;
+ no-sd;
+ no-sdio;
+ non-removable;
+ st,neg-edge;
+ vmmc-supply = <&v3v3>;
+ vqmmc-supply = <&vdd_io>;
+ status = "okay";
+};
+
+&sdmmc3 {
+ pinctrl-names = "default", "opendrain", "sleep";
+ pinctrl-0 = <&sdmmc3_b4_pins_b>;
+ pinctrl-1 = <&sdmmc3_b4_od_pins_b>;
+ pinctrl-2 = <&sdmmc3_b4_sleep_pins_b>;
+ broken-cd;
+ non-removable;
+ st,neg-edge;
+ bus-width = <4>;
+ vmmc-supply = <&wlan_pwr>;
+ status = "okay";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ brcmf: bcrmf@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+&spi2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2_pins_a>;
+ cs-gpios = <&gpioi 0 0>;
+ status = "disabled";
+ /delete-property/dmas;
+ /delete-property/dma-names;
+};
+
+&uart4 {
+ /* On Low speed expansion header */
+ label = "LS-UART1";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart4_pins_b>;
+ status = "okay";
+};
+
+&uart7 {
+ /* On Low speed expansion header */
+ label = "LS-UART0";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart7_pins_a>;
+ status = "okay";
+};
+
+/* Bluetooth */
+&usart2 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&usart2_pins_a>;
+ pinctrl-1 = <&usart2_sleep_pins_a>;
+ st,hw-flow-ctrl;
+ status = "okay";
+
+ bluetooth {
+ compatible = "brcm,bcm43438-bt";
+ max-speed = <3000000>;
+ shutdown-gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&usbh_ehci {
+ phys = <&usbphyc_port0>;
+ phy-names = "usb";
+ status = "okay";
+};
+
+&usbotg_hs {
+ pinctrl-0 = <&usbotg_hs_pins_a>;
+ pinctrl-names = "default";
+ phy-names = "usb2-phy";
+ phys = <&usbphyc_port1 0>;
+ status = "okay";
+ vbus-supply = <&vbus_otg>;
+};
+
+&usbphyc {
+ status = "okay";
+};
+
+&usbphyc_port0 {
+ phy-supply = <&vdd_usb>;
+ vdda1v1-supply = <®11>;
+ vdda1v8-supply = <®18>;
+};
+
+&usbphyc_port1 {
+ phy-supply = <&vdd_usb>;
+ vdda1v1-supply = <®11>;
+ vdda1v8-supply = <®18>;
+};
diff --git a/arch/arm/boot/dts/stm32mp157a-dhcor-io1v8.dtsi b/arch/arm/boot/dts/stm32mp15xa-dhcor-io1v8.dtsi
similarity index 100%
rename from arch/arm/boot/dts/stm32mp157a-dhcor-io1v8.dtsi
rename to arch/arm/boot/dts/stm32mp15xa-dhcor-io1v8.dtsi
diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
new file mode 100644
index 000000000000..04fbb324a541
--- /dev/null
+++ b/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
@@ -0,0 +1,209 @@
+// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
+/*
+ * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
+ * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
+ * Copyright (C) 2020 Marek Vasut <marex@denx.de>
+ */
+
+#include "stm32mp15-pinctrl.dtsi"
+#include "stm32mp15xxac-pinctrl.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/mfd/st,stpmic1.h>
+
+/ {
+ aliases {
+ spi0 = &qspi;
+ };
+
+ memory@c0000000 {
+ device_type = "memory";
+ reg = <0xc0000000 0x40000000>;
+ };
+};
+
+&i2c4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c4_pins_a>;
+ i2c-scl-rising-time-ns = <185>;
+ i2c-scl-falling-time-ns = <20>;
+ status = "okay";
+ /delete-property/dmas;
+ /delete-property/dma-names;
+
+ pmic: stpmic@33 {
+ compatible = "st,stpmic1";
+ reg = <0x33>;
+ interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ status = "okay";
+
+ regulators {
+ compatible = "st,stpmic1-regulators";
+
+ ldo1-supply = <&v3v3>;
+ ldo2-supply = <&v3v3>;
+ ldo3-supply = <&vdd_ddr>;
+ ldo5-supply = <&v3v3>;
+ ldo6-supply = <&v3v3>;
+ pwr_sw1-supply = <&bst_out>;
+ pwr_sw2-supply = <&bst_out>;
+
+ vddcore: buck1 {
+ regulator-name = "vddcore";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ regulator-initial-mode = <0>;
+ regulator-over-current-protection;
+ };
+
+ vdd_ddr: buck2 {
+ regulator-name = "vdd_ddr";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <1350000>;
+ regulator-always-on;
+ regulator-initial-mode = <0>;
+ regulator-over-current-protection;
+ };
+
+ vdd: buck3 {
+ regulator-name = "vdd";
+ regulator-min-microvolt = <2900000>;
+ regulator-max-microvolt = <2900000>;
+ regulator-always-on;
+ regulator-initial-mode = <0>;
+ regulator-over-current-protection;
+ };
+
+ v3v3: buck4 {
+ regulator-name = "v3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-over-current-protection;
+ regulator-initial-mode = <0>;
+ };
+
+ vdda: ldo1 {
+ regulator-name = "vdda";
+ regulator-min-microvolt = <2900000>;
+ regulator-max-microvolt = <2900000>;
+ interrupts = <IT_CURLIM_LDO1 0>;
+ };
+
+ v2v8: ldo2 {
+ regulator-name = "v2v8";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ interrupts = <IT_CURLIM_LDO2 0>;
+ };
+
+ vtt_ddr: ldo3 {
+ regulator-name = "vtt_ddr";
+ regulator-min-microvolt = <500000>;
+ regulator-max-microvolt = <750000>;
+ regulator-always-on;
+ regulator-over-current-protection;
+ };
+
+ vdd_usb: ldo4 {
+ regulator-name = "vdd_usb";
+ interrupts = <IT_CURLIM_LDO4 0>;
+ };
+
+ vdd_sd: ldo5 {
+ regulator-name = "vdd_sd";
+ regulator-min-microvolt = <2900000>;
+ regulator-max-microvolt = <2900000>;
+ interrupts = <IT_CURLIM_LDO5 0>;
+ regulator-boot-on;
+ };
+
+ v1v8: ldo6 {
+ regulator-name = "v1v8";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ interrupts = <IT_CURLIM_LDO6 0>;
+ regulator-enable-ramp-delay = <300000>;
+ };
+
+ vref_ddr: vref_ddr {
+ regulator-name = "vref_ddr";
+ regulator-always-on;
+ };
+
+ bst_out: boost {
+ regulator-name = "bst_out";
+ interrupts = <IT_OCP_BOOST 0>;
+ };
+
+ vbus_otg: pwr_sw1 {
+ regulator-name = "vbus_otg";
+ interrupts = <IT_OCP_OTG 0>;
+ regulator-active-discharge = <1>;
+ };
+
+ vbus_sw: pwr_sw2 {
+ regulator-name = "vbus_sw";
+ interrupts = <IT_OCP_SWOUT 0>;
+ regulator-active-discharge = <1>;
+ };
+ };
+
+ onkey {
+ compatible = "st,stpmic1-onkey";
+ interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
+ interrupt-names = "onkey-falling", "onkey-rising";
+ status = "okay";
+ };
+
+ watchdog {
+ compatible = "st,stpmic1-wdt";
+ status = "disabled";
+ };
+ };
+
+ eeprom@53 {
+ compatible = "atmel,24c02";
+ reg = <0x53>;
+ pagesize = <16>;
+ };
+};
+
+&iwdg2 {
+ timeout-sec = <32>;
+ status = "okay";
+};
+
+&pwr_regulators {
+ vdd-supply = <&vdd>;
+ vdd_3v3_usbfs-supply = <&vdd_usb>;
+};
+
+&qspi {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
+ pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
+ reg = <0x58003000 0x1000>, <0x70000000 0x200000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ flash0: spi-flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-rx-bus-width = <4>;
+ spi-max-frequency = <108000000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
+};
+
+&rng1 {
+ status = "okay";
+};
+
+&rtc {
+ status = "okay";
+};
--
2.25.1
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^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH 12/12] ARM: dts: stm32: Add DTs for STM32MP15x variants of the DHCOR SOM and AV96
2020-04-29 16:37 ` [PATCH 12/12] ARM: dts: stm32: Add DTs for STM32MP15x variants of the DHCOR SOM and AV96 Marek Vasut
@ 2020-05-07 15:26 ` Manivannan Sadhasivam
2020-05-07 15:33 ` Marek Vasut
0 siblings, 1 reply; 26+ messages in thread
From: Manivannan Sadhasivam @ 2020-05-07 15:26 UTC (permalink / raw)
To: Marek Vasut
Cc: Alexandre Torgue, Patrice Chotard, Patrick Delaunay,
Maxime Coquelin, linux-stm32, linux-arm-kernel
Hi,
On Wed, Apr 29, 2020 at 06:37:43PM +0200, Marek Vasut wrote:
> The Avenger96 can be populated with DH Electronics DHCOR SoM with any
> STM32MP15xA variant. Add the DTs describing the remaining combinations.
> Since the board is a combination of carrier board and SoM, update the
> DT name, however keep the old DT for backward compatibility.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Alexandre Torgue <alexandre.torgue@st.com>
> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
> Cc: Patrice Chotard <patrice.chotard@st.com>
> Cc: Patrick Delaunay <patrick.delaunay@st.com>
> Cc: linux-stm32@st-md-mailman.stormreply.com
> To: linux-arm-kernel@lists.infradead.org
> ---
> arch/arm/boot/dts/Makefile | 3 +
> .../boot/dts/stm32mp151a-dhcor-avenger96.dts | 9 +
> arch/arm/boot/dts/stm32mp151a-dhcor-som.dtsi | 8 +
> .../boot/dts/stm32mp153a-dhcor-avenger96.dts | 23 +
> arch/arm/boot/dts/stm32mp153a-dhcor-som.dtsi | 8 +
> arch/arm/boot/dts/stm32mp157a-avenger96.dts | 416 +-----------------
> .../boot/dts/stm32mp157a-dhcor-avenger96.dts | 23 +
> arch/arm/boot/dts/stm32mp157a-dhcor-som.dtsi | 206 +--------
> .../boot/dts/stm32mp15xa-dhcor-avenger96.dtsi | 405 +++++++++++++++++
> ...o1v8.dtsi => stm32mp15xa-dhcor-io1v8.dtsi} | 0
> arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi | 209 +++++++++
> 11 files changed, 692 insertions(+), 618 deletions(-)
> create mode 100644 arch/arm/boot/dts/stm32mp151a-dhcor-avenger96.dts
> create mode 100644 arch/arm/boot/dts/stm32mp151a-dhcor-som.dtsi
> create mode 100644 arch/arm/boot/dts/stm32mp153a-dhcor-avenger96.dts
> create mode 100644 arch/arm/boot/dts/stm32mp153a-dhcor-som.dtsi
> create mode 100644 arch/arm/boot/dts/stm32mp157a-dhcor-avenger96.dts
> create mode 100644 arch/arm/boot/dts/stm32mp15xa-dhcor-avenger96.dtsi
> rename arch/arm/boot/dts/{stm32mp157a-dhcor-io1v8.dtsi => stm32mp15xa-dhcor-io1v8.dtsi} (100%)
> create mode 100644 arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index f43467b02bcd..b4a4d2b0f18e 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1029,6 +1029,9 @@ dtb-$(CONFIG_ARCH_STM32) += \
> stm32h743i-eval.dtb \
> stm32h743i-disco.dtb \
> stm32mp157a-avenger96.dtb \
> + stm32mp151a-dhcor-avenger96.dtb \
> + stm32mp153a-dhcor-avenger96.dtb \
> + stm32mp157a-dhcor-avenger96.dtb \
I'm not really sure if keeping SoM name is a good practice here. Since the
board is sold as "Avenger96" alone, why do you want to prepend SoM name to it?
When you say, "stm32mp157a-avenger96.dtb" it obviously means that Avenger96
board uses the stm32mp157a SoC and that comes from SoM.
> stm32mp157a-dk1.dtb \
> stm32mp157c-dhcom-pdk2.dtb \
> stm32mp157c-dk2.dtb \
> diff --git a/arch/arm/boot/dts/stm32mp151a-dhcor-avenger96.dts b/arch/arm/boot/dts/stm32mp151a-dhcor-avenger96.dts
> new file mode 100644
> index 000000000000..0f3875fbdd73
> --- /dev/null
> +++ b/arch/arm/boot/dts/stm32mp151a-dhcor-avenger96.dts
> @@ -0,0 +1,9 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
> +/*
> + * Copyright (C) 2020 Marek Vasut <marex@denx.de>
> + */
> +
> +/dts-v1/;
> +
> +#include "stm32mp151a-dhcor-som.dtsi"
> +#include "stm32mp15xa-dhcor-avenger96.dtsi"
[...]
> diff --git a/arch/arm/boot/dts/stm32mp157a-avenger96.dts b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
> index 10f11ca53c7d..dc3bbd576756 100644
> --- a/arch/arm/boot/dts/stm32mp157a-avenger96.dts
> +++ b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
> @@ -1,421 +1,9 @@
> // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
> /*
> - * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
> - * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
I'd still keep the copyright here.
Rest looks fine to me.
Thanks,
Mani
> * Copyright (C) 2020 Marek Vasut <marex@denx.de>
> */
>
> /dts-v1/;
>
> -#include "stm32mp157a-dhcor-som.dtsi"
> -/* Avenger96 uses DHCOR SoM configured for 1V8 IO operation */
> -#include "stm32mp157a-dhcor-io1v8.dtsi"
> -
> -/ {
> - model = "Arrow Electronics STM32MP157A Avenger96 board";
> - compatible = "arrow,stm32mp157a-avenger96", "st,stm32mp157";
> -
> - aliases {
> - ethernet0 = ðernet0;
> - mmc0 = &sdmmc1;
> - serial0 = &uart4;
> - serial1 = &uart7;
> - serial2 = &usart2;
> - spi0 = &qspi;
> - };
> -
> - /* XTal Q1 */
> - cec_clock: clk-cec-fixed {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - clock-frequency = <24000000>;
> - };
> -
> - chosen {
> - stdout-path = "serial0:115200n8";
> - };
> -
> - hdmi-out {
> - compatible = "hdmi-connector";
> - type = "a";
> -
> - port {
> - hdmi_con: endpoint {
> - remote-endpoint = <&adv7513_out>;
> - };
> - };
> - };
> -
> - led {
> - compatible = "gpio-leds";
> - led1 {
> - label = "green:user0";
> - gpios = <&gpioz 7 GPIO_ACTIVE_HIGH>;
> - linux,default-trigger = "heartbeat";
> - default-state = "off";
> - };
> -
> - led2 {
> - label = "green:user1";
> - gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>;
> - linux,default-trigger = "mmc0";
> - default-state = "off";
> - };
> -
> - led3 {
> - label = "green:user2";
> - gpios = <&gpiog 0 GPIO_ACTIVE_HIGH>;
> - linux,default-trigger = "mmc1";
> - default-state = "off";
> - };
> -
> - led4 {
> - label = "green:user3";
> - gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>;
> - linux,default-trigger = "none";
> - default-state = "off";
> - panic-indicator;
> - };
> - };
> -
> - sd_switch: regulator-sd_switch {
> - compatible = "regulator-gpio";
> - regulator-name = "sd_switch";
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <2900000>;
> - regulator-type = "voltage";
> - regulator-always-on;
> -
> - gpios = <&gpioi 5 GPIO_ACTIVE_HIGH>;
> - gpios-states = <0>;
> - states = <1800000 0x1>,
> - <2900000 0x0>;
> - };
> -
> - sound {
> - compatible = "audio-graph-card";
> - label = "STM32MP1-AV96-HDMI";
> - dais = <&sai2a_port>;
> - status = "okay";
> - };
> -
> - wlan_pwr: regulator-wlan {
> - compatible = "regulator-fixed";
> -
> - regulator-name = "wl-reg";
> - regulator-min-microvolt = <3300000>;
> - regulator-max-microvolt = <3300000>;
> -
> - gpios = <&gpioz 3 GPIO_ACTIVE_HIGH>;
> - enable-active-high;
> - };
> -};
> -
> -&adc {
> - pinctrl-names = "default";
> - pinctrl-0 = <&adc12_ain_pins_b>;
> - vdd-supply = <&vdd>;
> - vdda-supply = <&vdda>;
> - vref-supply = <&vdda>;
> - status = "okay";
> -
> - adc1: adc@0 {
> - st,adc-channels = <0 1 6>;
> - st,min-sample-time-nsecs = <5000>;
> - status = "okay";
> - };
> -
> - adc2: adc@100 {
> - st,adc-channels = <0 1 2>;
> - st,min-sample-time-nsecs = <5000>;
> - status = "okay";
> - };
> -};
> -
> -ðernet0 {
> - status = "okay";
> - pinctrl-0 = <ðernet0_rgmii_pins_c>;
> - pinctrl-1 = <ðernet0_rgmii_sleep_pins_c>;
> - pinctrl-names = "default", "sleep";
> - phy-mode = "rgmii";
> - max-speed = <1000>;
> - phy-handle = <&phy0>;
> -
> - mdio0 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "snps,dwmac-mdio";
> - reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
> - reset-delay-us = <1000>;
> -
> - phy0: ethernet-phy@7 {
> - reg = <7>;
> -
> - rxc-skew-ps = <1500>;
> - rxdv-skew-ps = <540>;
> - rxd0-skew-ps = <420>;
> - rxd1-skew-ps = <420>;
> - rxd2-skew-ps = <420>;
> - rxd3-skew-ps = <420>;
> -
> - txc-skew-ps = <1440>;
> - txen-skew-ps = <540>;
> - txd0-skew-ps = <420>;
> - txd1-skew-ps = <420>;
> - txd2-skew-ps = <420>;
> - txd3-skew-ps = <420>;
> - };
> - };
> -};
> -
> -&i2c1 { /* X6 I2C1 */
> - pinctrl-names = "default";
> - pinctrl-0 = <&i2c1_pins_b>;
> - i2c-scl-rising-time-ns = <185>;
> - i2c-scl-falling-time-ns = <20>;
> - status = "okay";
> - /delete-property/dmas;
> - /delete-property/dma-names;
> -};
> -
> -&i2c2 { /* X6 I2C2 */
> - pinctrl-names = "default";
> - pinctrl-0 = <&i2c2_pins_c>;
> - i2c-scl-rising-time-ns = <185>;
> - i2c-scl-falling-time-ns = <20>;
> - status = "okay";
> - /delete-property/dmas;
> - /delete-property/dma-names;
> -};
> -
> -&i2c4 {
> - hdmi-transmitter@3d {
> - compatible = "adi,adv7513";
> - reg = <0x3d>, <0x2d>, <0x4d>, <0x5d>;
> - reg-names = "main", "cec", "edid", "packet";
> - clocks = <&cec_clock>;
> - clock-names = "cec";
> -
> - avdd-supply = <&v3v3>;
> - dvdd-supply = <&v3v3>;
> - pvdd-supply = <&v3v3>;
> - dvdd-3v-supply = <&v3v3>;
> - bgvdd-supply = <&v3v3>;
> -
> - interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
> - interrupt-parent = <&gpiog>;
> -
> - status = "okay";
> -
> - adi,input-depth = <8>;
> - adi,input-colorspace = "rgb";
> - adi,input-clock = "1x";
> - adi,input-style = <1>;
> - adi,input-justification = "evenly";
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> - adv7513_in: endpoint {
> - remote-endpoint = <<dc_ep0_out>;
> - };
> - };
> -
> - port@1 {
> - reg = <1>;
> - adv7513_out: endpoint {
> - remote-endpoint = <&hdmi_con>;
> - };
> - };
> -
> - port@2 {
> - reg = <2>;
> - adv7513_i2s0: endpoint {
> - remote-endpoint = <&sai2a_endpoint>;
> - };
> - };
> - };
> - };
> -};
> -
> -<dc {
> - pinctrl-names = "default", "sleep";
> - pinctrl-0 = <<dc_pins_d>;
> - pinctrl-1 = <<dc_sleep_pins_d>;
> - status = "okay";
> -
> - port {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - ltdc_ep0_out: endpoint@0 {
> - reg = <0>;
> - remote-endpoint = <&adv7513_in>;
> - };
> - };
> -};
> -
> -&m_can1 {
> - pinctrl-names = "default", "sleep";
> - pinctrl-0 = <&m_can1_pins_b>;
> - pinctrl-1 = <&m_can1_sleep_pins_b>;
> - status = "disabled";
> -};
> -
> -&m_can2 {
> - pinctrl-names = "default", "sleep";
> - pinctrl-0 = <&m_can2_pins_a>;
> - pinctrl-1 = <&m_can2_sleep_pins_a>;
> - status = "disabled";
> -};
> -
> -&sai2 {
> - clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
> - pinctrl-names = "default", "sleep";
> - pinctrl-0 = <&sai2a_pins_c>;
> - pinctrl-1 = <&sai2a_sleep_pins_c>;
> - clock-names = "pclk", "x8k", "x11k";
> - status = "okay";
> -
> - sai2a: audio-controller@4400b004 {
> - #clock-cells = <0>;
> - dma-names = "tx";
> - clocks = <&rcc SAI2_K>;
> - clock-names = "sai_ck";
> - status = "okay";
> -
> - sai2a_port: port {
> - sai2a_endpoint: endpoint {
> - remote-endpoint = <&adv7513_i2s0>;
> - format = "i2s";
> - mclk-fs = <256>;
> - };
> - };
> - };
> -};
> -
> -&sdmmc1 {
> - pinctrl-names = "default", "opendrain", "sleep";
> - pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_b>;
> - pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_b>;
> - pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_b>;
> - cd-gpios = <&gpioi 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> - disable-wp;
> - st,sig-dir;
> - st,neg-edge;
> - st,use-ckin;
> - bus-width = <4>;
> - vmmc-supply = <&vdd_sd>;
> - vqmmc-supply = <&sd_switch>;
> - status = "okay";
> -};
> -
> -&sdmmc2 {
> - pinctrl-names = "default", "opendrain", "sleep";
> - pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_b>;
> - pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_b>;
> - pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_b>;
> - bus-width = <8>;
> - mmc-ddr-1_8v;
> - no-sd;
> - no-sdio;
> - non-removable;
> - st,neg-edge;
> - vmmc-supply = <&v3v3>;
> - vqmmc-supply = <&vdd_io>;
> - status = "okay";
> -};
> -
> -&sdmmc3 {
> - pinctrl-names = "default", "opendrain", "sleep";
> - pinctrl-0 = <&sdmmc3_b4_pins_b>;
> - pinctrl-1 = <&sdmmc3_b4_od_pins_b>;
> - pinctrl-2 = <&sdmmc3_b4_sleep_pins_b>;
> - broken-cd;
> - non-removable;
> - st,neg-edge;
> - bus-width = <4>;
> - vmmc-supply = <&wlan_pwr>;
> - status = "okay";
> -
> - #address-cells = <1>;
> - #size-cells = <0>;
> - brcmf: bcrmf@1 {
> - reg = <1>;
> - compatible = "brcm,bcm4329-fmac";
> - };
> -};
> -
> -&spi2 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&spi2_pins_a>;
> - cs-gpios = <&gpioi 0 0>;
> - status = "disabled";
> - /delete-property/dmas;
> - /delete-property/dma-names;
> -};
> -
> -&uart4 {
> - /* On Low speed expansion header */
> - label = "LS-UART1";
> - pinctrl-names = "default";
> - pinctrl-0 = <&uart4_pins_b>;
> - status = "okay";
> -};
> -
> -&uart7 {
> - /* On Low speed expansion header */
> - label = "LS-UART0";
> - pinctrl-names = "default";
> - pinctrl-0 = <&uart7_pins_a>;
> - status = "okay";
> -};
> -
> -/* Bluetooth */
> -&usart2 {
> - pinctrl-names = "default", "sleep";
> - pinctrl-0 = <&usart2_pins_a>;
> - pinctrl-1 = <&usart2_sleep_pins_a>;
> - st,hw-flow-ctrl;
> - status = "okay";
> -
> - bluetooth {
> - compatible = "brcm,bcm43438-bt";
> - max-speed = <3000000>;
> - shutdown-gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>;
> - };
> -};
> -
> -&usbh_ehci {
> - phys = <&usbphyc_port0>;
> - phy-names = "usb";
> - status = "okay";
> -};
> -
> -&usbotg_hs {
> - pinctrl-0 = <&usbotg_hs_pins_a>;
> - pinctrl-names = "default";
> - phy-names = "usb2-phy";
> - phys = <&usbphyc_port1 0>;
> - status = "okay";
> - vbus-supply = <&vbus_otg>;
> -};
> -
> -&usbphyc {
> - status = "okay";
> -};
> -
> -&usbphyc_port0 {
> - phy-supply = <&vdd_usb>;
> - vdda1v1-supply = <®11>;
> - vdda1v8-supply = <®18>;
> -};
> -
> -&usbphyc_port1 {
> - phy-supply = <&vdd_usb>;
> - vdda1v1-supply = <®11>;
> - vdda1v8-supply = <®18>;
> -};
> +/* This DT is here only for backward compatibility */
> +#include "stm32mp157a-dhcor-avenger96.dts"
> diff --git a/arch/arm/boot/dts/stm32mp157a-dhcor-avenger96.dts b/arch/arm/boot/dts/stm32mp157a-dhcor-avenger96.dts
> new file mode 100644
> index 000000000000..7355af3d14f6
> --- /dev/null
> +++ b/arch/arm/boot/dts/stm32mp157a-dhcor-avenger96.dts
> @@ -0,0 +1,23 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
> +/*
> + * Copyright (C) 2020 Marek Vasut <marex@denx.de>
> + */
> +
> +/dts-v1/;
> +
> +#include "stm32mp157a-dhcor-som.dtsi"
> +#include "stm32mp15xa-dhcor-avenger96.dtsi"
> +
> +&m_can1 {
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&m_can1_pins_b>;
> + pinctrl-1 = <&m_can1_sleep_pins_b>;
> + status = "disabled";
> +};
> +
> +&m_can2 {
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&m_can2_pins_a>;
> + pinctrl-1 = <&m_can2_sleep_pins_a>;
> + status = "disabled";
> +};
> diff --git a/arch/arm/boot/dts/stm32mp157a-dhcor-som.dtsi b/arch/arm/boot/dts/stm32mp157a-dhcor-som.dtsi
> index 7144afeab6ca..7dac547e7996 100644
> --- a/arch/arm/boot/dts/stm32mp157a-dhcor-som.dtsi
> +++ b/arch/arm/boot/dts/stm32mp157a-dhcor-som.dtsi
> @@ -1,210 +1,8 @@
> // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
> /*
> - * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
> - * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> * Copyright (C) 2020 Marek Vasut <marex@denx.de>
> */
>
> #include "stm32mp157.dtsi"
> -#include "stm32mp15-pinctrl.dtsi"
> -#include "stm32mp15xxac-pinctrl.dtsi"
> -#include <dt-bindings/gpio/gpio.h>
> -#include <dt-bindings/mfd/st,stpmic1.h>
> -
> -/ {
> - aliases {
> - spi0 = &qspi;
> - };
> -
> - memory@c0000000 {
> - device_type = "memory";
> - reg = <0xc0000000 0x40000000>;
> - };
> -};
> -
> -&i2c4 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&i2c4_pins_a>;
> - i2c-scl-rising-time-ns = <185>;
> - i2c-scl-falling-time-ns = <20>;
> - status = "okay";
> - /delete-property/dmas;
> - /delete-property/dma-names;
> -
> - pmic: stpmic@33 {
> - compatible = "st,stpmic1";
> - reg = <0x33>;
> - interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
> - interrupt-controller;
> - #interrupt-cells = <2>;
> - status = "okay";
> -
> - regulators {
> - compatible = "st,stpmic1-regulators";
> -
> - ldo1-supply = <&v3v3>;
> - ldo2-supply = <&v3v3>;
> - ldo3-supply = <&vdd_ddr>;
> - ldo5-supply = <&v3v3>;
> - ldo6-supply = <&v3v3>;
> - pwr_sw1-supply = <&bst_out>;
> - pwr_sw2-supply = <&bst_out>;
> -
> - vddcore: buck1 {
> - regulator-name = "vddcore";
> - regulator-min-microvolt = <1200000>;
> - regulator-max-microvolt = <1350000>;
> - regulator-always-on;
> - regulator-initial-mode = <0>;
> - regulator-over-current-protection;
> - };
> -
> - vdd_ddr: buck2 {
> - regulator-name = "vdd_ddr";
> - regulator-min-microvolt = <1350000>;
> - regulator-max-microvolt = <1350000>;
> - regulator-always-on;
> - regulator-initial-mode = <0>;
> - regulator-over-current-protection;
> - };
> -
> - vdd: buck3 {
> - regulator-name = "vdd";
> - regulator-min-microvolt = <2900000>;
> - regulator-max-microvolt = <2900000>;
> - regulator-always-on;
> - regulator-initial-mode = <0>;
> - regulator-over-current-protection;
> - };
> -
> - v3v3: buck4 {
> - regulator-name = "v3v3";
> - regulator-min-microvolt = <3300000>;
> - regulator-max-microvolt = <3300000>;
> - regulator-always-on;
> - regulator-over-current-protection;
> - regulator-initial-mode = <0>;
> - };
> -
> - vdda: ldo1 {
> - regulator-name = "vdda";
> - regulator-min-microvolt = <2900000>;
> - regulator-max-microvolt = <2900000>;
> - interrupts = <IT_CURLIM_LDO1 0>;
> - };
> -
> - v2v8: ldo2 {
> - regulator-name = "v2v8";
> - regulator-min-microvolt = <2800000>;
> - regulator-max-microvolt = <2800000>;
> - interrupts = <IT_CURLIM_LDO2 0>;
> - };
> -
> - vtt_ddr: ldo3 {
> - regulator-name = "vtt_ddr";
> - regulator-min-microvolt = <500000>;
> - regulator-max-microvolt = <750000>;
> - regulator-always-on;
> - regulator-over-current-protection;
> - };
> -
> - vdd_usb: ldo4 {
> - regulator-name = "vdd_usb";
> - interrupts = <IT_CURLIM_LDO4 0>;
> - };
> -
> - vdd_sd: ldo5 {
> - regulator-name = "vdd_sd";
> - regulator-min-microvolt = <2900000>;
> - regulator-max-microvolt = <2900000>;
> - interrupts = <IT_CURLIM_LDO5 0>;
> - regulator-boot-on;
> - };
> -
> - v1v8: ldo6 {
> - regulator-name = "v1v8";
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <1800000>;
> - interrupts = <IT_CURLIM_LDO6 0>;
> - regulator-enable-ramp-delay = <300000>;
> - };
> -
> - vref_ddr: vref_ddr {
> - regulator-name = "vref_ddr";
> - regulator-always-on;
> - };
> -
> - bst_out: boost {
> - regulator-name = "bst_out";
> - interrupts = <IT_OCP_BOOST 0>;
> - };
> -
> - vbus_otg: pwr_sw1 {
> - regulator-name = "vbus_otg";
> - interrupts = <IT_OCP_OTG 0>;
> - regulator-active-discharge = <1>;
> - };
> -
> - vbus_sw: pwr_sw2 {
> - regulator-name = "vbus_sw";
> - interrupts = <IT_OCP_SWOUT 0>;
> - regulator-active-discharge = <1>;
> - };
> - };
> -
> - onkey {
> - compatible = "st,stpmic1-onkey";
> - interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
> - interrupt-names = "onkey-falling", "onkey-rising";
> - status = "okay";
> - };
> -
> - watchdog {
> - compatible = "st,stpmic1-wdt";
> - status = "disabled";
> - };
> - };
> -
> - eeprom@53 {
> - compatible = "atmel,24c02";
> - reg = <0x53>;
> - pagesize = <16>;
> - };
> -};
> -
> -&iwdg2 {
> - timeout-sec = <32>;
> - status = "okay";
> -};
> -
> -&pwr_regulators {
> - vdd-supply = <&vdd>;
> - vdd_3v3_usbfs-supply = <&vdd_usb>;
> -};
> -
> -&qspi {
> - pinctrl-names = "default", "sleep";
> - pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
> - pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
> - reg = <0x58003000 0x1000>, <0x70000000 0x200000>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "okay";
> -
> - flash0: spi-flash@0 {
> - compatible = "jedec,spi-nor";
> - reg = <0>;
> - spi-rx-bus-width = <4>;
> - spi-max-frequency = <108000000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - };
> -};
> -
> -&rng1 {
> - status = "okay";
> -};
> -
> -&rtc {
> - status = "okay";
> -};
> +#include "stm32mp15xc.dtsi"
> +#include "stm32mp15xx-dhcor-som.dtsi"
> diff --git a/arch/arm/boot/dts/stm32mp15xa-dhcor-avenger96.dtsi b/arch/arm/boot/dts/stm32mp15xa-dhcor-avenger96.dtsi
> new file mode 100644
> index 000000000000..baec592aee13
> --- /dev/null
> +++ b/arch/arm/boot/dts/stm32mp15xa-dhcor-avenger96.dtsi
> @@ -0,0 +1,405 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
> +/*
> + * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
> + * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> + * Copyright (C) 2020 Marek Vasut <marex@denx.de>
> + */
> +
> +#include "stm32mp157a-dhcor-som.dtsi"
> +/* Avenger96 uses DHCOR SoM configured for 1V8 IO operation */
> +#include "stm32mp15xa-dhcor-io1v8.dtsi"
> +
> +/ {
> + model = "Arrow Electronics STM32MP157A Avenger96 board";
> + compatible = "arrow,stm32mp157a-avenger96", "st,stm32mp157";
> +
> + aliases {
> + ethernet0 = ðernet0;
> + mmc0 = &sdmmc1;
> + serial0 = &uart4;
> + serial1 = &uart7;
> + serial2 = &usart2;
> + spi0 = &qspi;
> + };
> +
> + /* XTal Q1 */
> + cec_clock: clk-cec-fixed {
> + #clock-cells = <0>;
> + compatible = "fixed-clock";
> + clock-frequency = <24000000>;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + hdmi-out {
> + compatible = "hdmi-connector";
> + type = "a";
> +
> + port {
> + hdmi_con: endpoint {
> + remote-endpoint = <&adv7513_out>;
> + };
> + };
> + };
> +
> + led {
> + compatible = "gpio-leds";
> + led1 {
> + label = "green:user0";
> + gpios = <&gpioz 7 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "heartbeat";
> + default-state = "off";
> + };
> +
> + led2 {
> + label = "green:user1";
> + gpios = <&gpiof 3 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "mmc0";
> + default-state = "off";
> + };
> +
> + led3 {
> + label = "green:user2";
> + gpios = <&gpiog 0 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "mmc1";
> + default-state = "off";
> + };
> +
> + led4 {
> + label = "green:user3";
> + gpios = <&gpiog 1 GPIO_ACTIVE_HIGH>;
> + linux,default-trigger = "none";
> + default-state = "off";
> + panic-indicator;
> + };
> + };
> +
> + sd_switch: regulator-sd_switch {
> + compatible = "regulator-gpio";
> + regulator-name = "sd_switch";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <2900000>;
> + regulator-type = "voltage";
> + regulator-always-on;
> +
> + gpios = <&gpioi 5 GPIO_ACTIVE_HIGH>;
> + gpios-states = <0>;
> + states = <1800000 0x1>,
> + <2900000 0x0>;
> + };
> +
> + sound {
> + compatible = "audio-graph-card";
> + label = "STM32MP1-AV96-HDMI";
> + dais = <&sai2a_port>;
> + status = "okay";
> + };
> +
> + wlan_pwr: regulator-wlan {
> + compatible = "regulator-fixed";
> +
> + regulator-name = "wl-reg";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> +
> + gpios = <&gpioz 3 GPIO_ACTIVE_HIGH>;
> + enable-active-high;
> + };
> +};
> +
> +&adc {
> + pinctrl-names = "default";
> + pinctrl-0 = <&adc12_ain_pins_b>;
> + vdd-supply = <&vdd>;
> + vdda-supply = <&vdda>;
> + vref-supply = <&vdda>;
> + status = "okay";
> +
> + adc1: adc@0 {
> + st,adc-channels = <0 1 6>;
> + st,min-sample-time-nsecs = <5000>;
> + status = "okay";
> + };
> +
> + adc2: adc@100 {
> + st,adc-channels = <0 1 2>;
> + st,min-sample-time-nsecs = <5000>;
> + status = "okay";
> + };
> +};
> +
> +ðernet0 {
> + status = "okay";
> + pinctrl-0 = <ðernet0_rgmii_pins_c>;
> + pinctrl-1 = <ðernet0_rgmii_sleep_pins_c>;
> + pinctrl-names = "default", "sleep";
> + phy-mode = "rgmii";
> + max-speed = <1000>;
> + phy-handle = <&phy0>;
> +
> + mdio0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "snps,dwmac-mdio";
> + reset-gpios = <&gpioz 2 GPIO_ACTIVE_LOW>;
> + reset-delay-us = <1000>;
> +
> + phy0: ethernet-phy@7 {
> + reg = <7>;
> +
> + rxc-skew-ps = <1500>;
> + rxdv-skew-ps = <540>;
> + rxd0-skew-ps = <420>;
> + rxd1-skew-ps = <420>;
> + rxd2-skew-ps = <420>;
> + rxd3-skew-ps = <420>;
> +
> + txc-skew-ps = <1440>;
> + txen-skew-ps = <540>;
> + txd0-skew-ps = <420>;
> + txd1-skew-ps = <420>;
> + txd2-skew-ps = <420>;
> + txd3-skew-ps = <420>;
> + };
> + };
> +};
> +
> +&i2c1 { /* X6 I2C1 */
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c1_pins_b>;
> + i2c-scl-rising-time-ns = <185>;
> + i2c-scl-falling-time-ns = <20>;
> + status = "okay";
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +};
> +
> +&i2c2 { /* X6 I2C2 */
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c2_pins_c>;
> + i2c-scl-rising-time-ns = <185>;
> + i2c-scl-falling-time-ns = <20>;
> + status = "okay";
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +};
> +
> +&i2c4 {
> + hdmi-transmitter@3d {
> + compatible = "adi,adv7513";
> + reg = <0x3d>, <0x2d>, <0x4d>, <0x5d>;
> + reg-names = "main", "cec", "edid", "packet";
> + clocks = <&cec_clock>;
> + clock-names = "cec";
> +
> + avdd-supply = <&v3v3>;
> + dvdd-supply = <&v3v3>;
> + pvdd-supply = <&v3v3>;
> + dvdd-3v-supply = <&v3v3>;
> + bgvdd-supply = <&v3v3>;
> +
> + interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
> + interrupt-parent = <&gpiog>;
> +
> + status = "okay";
> +
> + adi,input-depth = <8>;
> + adi,input-colorspace = "rgb";
> + adi,input-clock = "1x";
> + adi,input-style = <1>;
> + adi,input-justification = "evenly";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + adv7513_in: endpoint {
> + remote-endpoint = <<dc_ep0_out>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + adv7513_out: endpoint {
> + remote-endpoint = <&hdmi_con>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> + adv7513_i2s0: endpoint {
> + remote-endpoint = <&sai2a_endpoint>;
> + };
> + };
> + };
> + };
> +};
> +
> +<dc {
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <<dc_pins_d>;
> + pinctrl-1 = <<dc_sleep_pins_d>;
> + status = "okay";
> +
> + port {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ltdc_ep0_out: endpoint@0 {
> + reg = <0>;
> + remote-endpoint = <&adv7513_in>;
> + };
> + };
> +};
> +
> +&sai2 {
> + clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&sai2a_pins_c>;
> + pinctrl-1 = <&sai2a_sleep_pins_c>;
> + clock-names = "pclk", "x8k", "x11k";
> + status = "okay";
> +
> + sai2a: audio-controller@4400b004 {
> + #clock-cells = <0>;
> + dma-names = "tx";
> + clocks = <&rcc SAI2_K>;
> + clock-names = "sai_ck";
> + status = "okay";
> +
> + sai2a_port: port {
> + sai2a_endpoint: endpoint {
> + remote-endpoint = <&adv7513_i2s0>;
> + format = "i2s";
> + mclk-fs = <256>;
> + };
> + };
> + };
> +};
> +
> +&sdmmc1 {
> + pinctrl-names = "default", "opendrain", "sleep";
> + pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_dir_pins_b>;
> + pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_dir_pins_b>;
> + pinctrl-2 = <&sdmmc1_b4_sleep_pins_a &sdmmc1_dir_sleep_pins_b>;
> + cd-gpios = <&gpioi 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
> + disable-wp;
> + st,sig-dir;
> + st,neg-edge;
> + st,use-ckin;
> + bus-width = <4>;
> + vmmc-supply = <&vdd_sd>;
> + vqmmc-supply = <&sd_switch>;
> + status = "okay";
> +};
> +
> +&sdmmc2 {
> + pinctrl-names = "default", "opendrain", "sleep";
> + pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_b>;
> + pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_b>;
> + pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_b>;
> + bus-width = <8>;
> + mmc-ddr-1_8v;
> + no-sd;
> + no-sdio;
> + non-removable;
> + st,neg-edge;
> + vmmc-supply = <&v3v3>;
> + vqmmc-supply = <&vdd_io>;
> + status = "okay";
> +};
> +
> +&sdmmc3 {
> + pinctrl-names = "default", "opendrain", "sleep";
> + pinctrl-0 = <&sdmmc3_b4_pins_b>;
> + pinctrl-1 = <&sdmmc3_b4_od_pins_b>;
> + pinctrl-2 = <&sdmmc3_b4_sleep_pins_b>;
> + broken-cd;
> + non-removable;
> + st,neg-edge;
> + bus-width = <4>;
> + vmmc-supply = <&wlan_pwr>;
> + status = "okay";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> + brcmf: bcrmf@1 {
> + reg = <1>;
> + compatible = "brcm,bcm4329-fmac";
> + };
> +};
> +
> +&spi2 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&spi2_pins_a>;
> + cs-gpios = <&gpioi 0 0>;
> + status = "disabled";
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +};
> +
> +&uart4 {
> + /* On Low speed expansion header */
> + label = "LS-UART1";
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart4_pins_b>;
> + status = "okay";
> +};
> +
> +&uart7 {
> + /* On Low speed expansion header */
> + label = "LS-UART0";
> + pinctrl-names = "default";
> + pinctrl-0 = <&uart7_pins_a>;
> + status = "okay";
> +};
> +
> +/* Bluetooth */
> +&usart2 {
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&usart2_pins_a>;
> + pinctrl-1 = <&usart2_sleep_pins_a>;
> + st,hw-flow-ctrl;
> + status = "okay";
> +
> + bluetooth {
> + compatible = "brcm,bcm43438-bt";
> + max-speed = <3000000>;
> + shutdown-gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>;
> + };
> +};
> +
> +&usbh_ehci {
> + phys = <&usbphyc_port0>;
> + phy-names = "usb";
> + status = "okay";
> +};
> +
> +&usbotg_hs {
> + pinctrl-0 = <&usbotg_hs_pins_a>;
> + pinctrl-names = "default";
> + phy-names = "usb2-phy";
> + phys = <&usbphyc_port1 0>;
> + status = "okay";
> + vbus-supply = <&vbus_otg>;
> +};
> +
> +&usbphyc {
> + status = "okay";
> +};
> +
> +&usbphyc_port0 {
> + phy-supply = <&vdd_usb>;
> + vdda1v1-supply = <®11>;
> + vdda1v8-supply = <®18>;
> +};
> +
> +&usbphyc_port1 {
> + phy-supply = <&vdd_usb>;
> + vdda1v1-supply = <®11>;
> + vdda1v8-supply = <®18>;
> +};
> diff --git a/arch/arm/boot/dts/stm32mp157a-dhcor-io1v8.dtsi b/arch/arm/boot/dts/stm32mp15xa-dhcor-io1v8.dtsi
> similarity index 100%
> rename from arch/arm/boot/dts/stm32mp157a-dhcor-io1v8.dtsi
> rename to arch/arm/boot/dts/stm32mp15xa-dhcor-io1v8.dtsi
> diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
> new file mode 100644
> index 000000000000..04fbb324a541
> --- /dev/null
> +++ b/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
> @@ -0,0 +1,209 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
> +/*
> + * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
> + * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> + * Copyright (C) 2020 Marek Vasut <marex@denx.de>
> + */
> +
> +#include "stm32mp15-pinctrl.dtsi"
> +#include "stm32mp15xxac-pinctrl.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/mfd/st,stpmic1.h>
> +
> +/ {
> + aliases {
> + spi0 = &qspi;
> + };
> +
> + memory@c0000000 {
> + device_type = "memory";
> + reg = <0xc0000000 0x40000000>;
> + };
> +};
> +
> +&i2c4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&i2c4_pins_a>;
> + i2c-scl-rising-time-ns = <185>;
> + i2c-scl-falling-time-ns = <20>;
> + status = "okay";
> + /delete-property/dmas;
> + /delete-property/dma-names;
> +
> + pmic: stpmic@33 {
> + compatible = "st,stpmic1";
> + reg = <0x33>;
> + interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + status = "okay";
> +
> + regulators {
> + compatible = "st,stpmic1-regulators";
> +
> + ldo1-supply = <&v3v3>;
> + ldo2-supply = <&v3v3>;
> + ldo3-supply = <&vdd_ddr>;
> + ldo5-supply = <&v3v3>;
> + ldo6-supply = <&v3v3>;
> + pwr_sw1-supply = <&bst_out>;
> + pwr_sw2-supply = <&bst_out>;
> +
> + vddcore: buck1 {
> + regulator-name = "vddcore";
> + regulator-min-microvolt = <1200000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-always-on;
> + regulator-initial-mode = <0>;
> + regulator-over-current-protection;
> + };
> +
> + vdd_ddr: buck2 {
> + regulator-name = "vdd_ddr";
> + regulator-min-microvolt = <1350000>;
> + regulator-max-microvolt = <1350000>;
> + regulator-always-on;
> + regulator-initial-mode = <0>;
> + regulator-over-current-protection;
> + };
> +
> + vdd: buck3 {
> + regulator-name = "vdd";
> + regulator-min-microvolt = <2900000>;
> + regulator-max-microvolt = <2900000>;
> + regulator-always-on;
> + regulator-initial-mode = <0>;
> + regulator-over-current-protection;
> + };
> +
> + v3v3: buck4 {
> + regulator-name = "v3v3";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + regulator-over-current-protection;
> + regulator-initial-mode = <0>;
> + };
> +
> + vdda: ldo1 {
> + regulator-name = "vdda";
> + regulator-min-microvolt = <2900000>;
> + regulator-max-microvolt = <2900000>;
> + interrupts = <IT_CURLIM_LDO1 0>;
> + };
> +
> + v2v8: ldo2 {
> + regulator-name = "v2v8";
> + regulator-min-microvolt = <2800000>;
> + regulator-max-microvolt = <2800000>;
> + interrupts = <IT_CURLIM_LDO2 0>;
> + };
> +
> + vtt_ddr: ldo3 {
> + regulator-name = "vtt_ddr";
> + regulator-min-microvolt = <500000>;
> + regulator-max-microvolt = <750000>;
> + regulator-always-on;
> + regulator-over-current-protection;
> + };
> +
> + vdd_usb: ldo4 {
> + regulator-name = "vdd_usb";
> + interrupts = <IT_CURLIM_LDO4 0>;
> + };
> +
> + vdd_sd: ldo5 {
> + regulator-name = "vdd_sd";
> + regulator-min-microvolt = <2900000>;
> + regulator-max-microvolt = <2900000>;
> + interrupts = <IT_CURLIM_LDO5 0>;
> + regulator-boot-on;
> + };
> +
> + v1v8: ldo6 {
> + regulator-name = "v1v8";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + interrupts = <IT_CURLIM_LDO6 0>;
> + regulator-enable-ramp-delay = <300000>;
> + };
> +
> + vref_ddr: vref_ddr {
> + regulator-name = "vref_ddr";
> + regulator-always-on;
> + };
> +
> + bst_out: boost {
> + regulator-name = "bst_out";
> + interrupts = <IT_OCP_BOOST 0>;
> + };
> +
> + vbus_otg: pwr_sw1 {
> + regulator-name = "vbus_otg";
> + interrupts = <IT_OCP_OTG 0>;
> + regulator-active-discharge = <1>;
> + };
> +
> + vbus_sw: pwr_sw2 {
> + regulator-name = "vbus_sw";
> + interrupts = <IT_OCP_SWOUT 0>;
> + regulator-active-discharge = <1>;
> + };
> + };
> +
> + onkey {
> + compatible = "st,stpmic1-onkey";
> + interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
> + interrupt-names = "onkey-falling", "onkey-rising";
> + status = "okay";
> + };
> +
> + watchdog {
> + compatible = "st,stpmic1-wdt";
> + status = "disabled";
> + };
> + };
> +
> + eeprom@53 {
> + compatible = "atmel,24c02";
> + reg = <0x53>;
> + pagesize = <16>;
> + };
> +};
> +
> +&iwdg2 {
> + timeout-sec = <32>;
> + status = "okay";
> +};
> +
> +&pwr_regulators {
> + vdd-supply = <&vdd>;
> + vdd_3v3_usbfs-supply = <&vdd_usb>;
> +};
> +
> +&qspi {
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
> + pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
> + reg = <0x58003000 0x1000>, <0x70000000 0x200000>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "okay";
> +
> + flash0: spi-flash@0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-rx-bus-width = <4>;
> + spi-max-frequency = <108000000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + };
> +};
> +
> +&rng1 {
> + status = "okay";
> +};
> +
> +&rtc {
> + status = "okay";
> +};
> --
> 2.25.1
>
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^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH 12/12] ARM: dts: stm32: Add DTs for STM32MP15x variants of the DHCOR SOM and AV96
2020-05-07 15:26 ` Manivannan Sadhasivam
@ 2020-05-07 15:33 ` Marek Vasut
2020-05-07 16:05 ` Manivannan Sadhasivam
0 siblings, 1 reply; 26+ messages in thread
From: Marek Vasut @ 2020-05-07 15:33 UTC (permalink / raw)
To: Manivannan Sadhasivam
Cc: Alexandre Torgue, Patrice Chotard, Patrick Delaunay,
Maxime Coquelin, linux-stm32, linux-arm-kernel
On 5/7/20 5:26 PM, Manivannan Sadhasivam wrote:
Hi,
[...]
>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>> index f43467b02bcd..b4a4d2b0f18e 100644
>> --- a/arch/arm/boot/dts/Makefile
>> +++ b/arch/arm/boot/dts/Makefile
>> @@ -1029,6 +1029,9 @@ dtb-$(CONFIG_ARCH_STM32) += \
>> stm32h743i-eval.dtb \
>> stm32h743i-disco.dtb \
>> stm32mp157a-avenger96.dtb \
>> + stm32mp151a-dhcor-avenger96.dtb \
>> + stm32mp153a-dhcor-avenger96.dtb \
>> + stm32mp157a-dhcor-avenger96.dtb \
>
> I'm not really sure if keeping SoM name is a good practice here. Since the
> board is sold as "Avenger96" alone, why do you want to prepend SoM name to it?
> When you say, "stm32mp157a-avenger96.dtb" it obviously means that Avenger96
> board uses the stm32mp157a SoC and that comes from SoM.
That's because if you look at the other side of the AV96, you will
notice there is this other piece of PCB on it, that's the DHCOR SoM. The
SoM is soldered on the AV96 carrier board. And only on that SoM is the
STM32MP15xx SoC.
>> stm32mp157a-dk1.dtb \
>> stm32mp157c-dhcom-pdk2.dtb \
>> stm32mp157c-dk2.dtb \
>> diff --git a/arch/arm/boot/dts/stm32mp151a-dhcor-avenger96.dts b/arch/arm/boot/dts/stm32mp151a-dhcor-avenger96.dts
>> new file mode 100644
>> index 000000000000..0f3875fbdd73
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/stm32mp151a-dhcor-avenger96.dts
>> @@ -0,0 +1,9 @@
>> +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
>> +/*
>> + * Copyright (C) 2020 Marek Vasut <marex@denx.de>
>> + */
>> +
>> +/dts-v1/;
>> +
>> +#include "stm32mp151a-dhcor-som.dtsi"
>> +#include "stm32mp15xa-dhcor-avenger96.dtsi"
>
> [...]
>
>> diff --git a/arch/arm/boot/dts/stm32mp157a-avenger96.dts b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
>> index 10f11ca53c7d..dc3bbd576756 100644
>> --- a/arch/arm/boot/dts/stm32mp157a-avenger96.dts
>> +++ b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
>> @@ -1,421 +1,9 @@
>> // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
>> /*
>> - * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
>> - * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
That's fixed in the other submission, sorry.
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^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 12/12] ARM: dts: stm32: Add DTs for STM32MP15x variants of the DHCOR SOM and AV96
2020-05-07 15:33 ` Marek Vasut
@ 2020-05-07 16:05 ` Manivannan Sadhasivam
2020-05-07 16:28 ` Marek Vasut
0 siblings, 1 reply; 26+ messages in thread
From: Manivannan Sadhasivam @ 2020-05-07 16:05 UTC (permalink / raw)
To: Marek Vasut
Cc: Alexandre Torgue, Patrice Chotard, Patrick Delaunay,
Maxime Coquelin, linux-stm32, linux-arm-kernel
On 7 May 2020 9:03:08 PM IST, Marek Vasut <marex@denx.de> wrote:
>On 5/7/20 5:26 PM, Manivannan Sadhasivam wrote:
>
>Hi,
>
>[...]
>
>>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>>> index f43467b02bcd..b4a4d2b0f18e 100644
>>> --- a/arch/arm/boot/dts/Makefile
>>> +++ b/arch/arm/boot/dts/Makefile
>>> @@ -1029,6 +1029,9 @@ dtb-$(CONFIG_ARCH_STM32) += \
>>> stm32h743i-eval.dtb \
>>> stm32h743i-disco.dtb \
>>> stm32mp157a-avenger96.dtb \
>>> + stm32mp151a-dhcor-avenger96.dtb \
>>> + stm32mp153a-dhcor-avenger96.dtb \
>>> + stm32mp157a-dhcor-avenger96.dtb \
>>
>> I'm not really sure if keeping SoM name is a good practice here.
>Since the
>> board is sold as "Avenger96" alone, why do you want to prepend SoM
>name to it?
>> When you say, "stm32mp157a-avenger96.dtb" it obviously means that
>Avenger96
>> board uses the stm32mp157a SoC and that comes from SoM.
>
>That's because if you look at the other side of the AV96, you will
>notice there is this other piece of PCB on it, that's the DHCOR SoM.
>The
>SoM is soldered on the AV96 carrier board. And only on that SoM is the
>STM32MP15xx SoC.
>
Yeah I know but what I was saying is that it is not the usual convention to put SoM name in board DTS. The DTS should reflect the actual product name. Here, the SoC prefix is justified since they reflect the family/SoC name and used as a differentiation factor. But using SoM name seems redundant.
You can use SoM name if there are chances where different family of SoM can be used on the base board, thereby making it as a differentiation factor.
Thanks,
Mani
>>> stm32mp157a-dk1.dtb \
>>> stm32mp157c-dhcom-pdk2.dtb \
>>> stm32mp157c-dk2.dtb \
>>> diff --git a/arch/arm/boot/dts/stm32mp151a-dhcor-avenger96.dts
>b/arch/arm/boot/dts/stm32mp151a-dhcor-avenger96.dts
>>> new file mode 100644
>>> index 000000000000..0f3875fbdd73
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/stm32mp151a-dhcor-avenger96.dts
>>> @@ -0,0 +1,9 @@
>>> +// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
>>> +/*
>>> + * Copyright (C) 2020 Marek Vasut <marex@denx.de>
>>> + */
>>> +
>>> +/dts-v1/;
>>> +
>>> +#include "stm32mp151a-dhcor-som.dtsi"
>>> +#include "stm32mp15xa-dhcor-avenger96.dtsi"
>>
>> [...]
>>
>>> diff --git a/arch/arm/boot/dts/stm32mp157a-avenger96.dts
>b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
>>> index 10f11ca53c7d..dc3bbd576756 100644
>>> --- a/arch/arm/boot/dts/stm32mp157a-avenger96.dts
>>> +++ b/arch/arm/boot/dts/stm32mp157a-avenger96.dts
>>> @@ -1,421 +1,9 @@
>>> // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
>>> /*
>>> - * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
>>> - * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
>
>That's fixed in the other submission, sorry.
--
Sent from my Android device with K-9 Mail. Please excuse my brevity.
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^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 12/12] ARM: dts: stm32: Add DTs for STM32MP15x variants of the DHCOR SOM and AV96
2020-05-07 16:05 ` Manivannan Sadhasivam
@ 2020-05-07 16:28 ` Marek Vasut
0 siblings, 0 replies; 26+ messages in thread
From: Marek Vasut @ 2020-05-07 16:28 UTC (permalink / raw)
To: Manivannan Sadhasivam
Cc: Alexandre Torgue, Patrice Chotard, Patrick Delaunay,
Maxime Coquelin, linux-stm32, linux-arm-kernel
On 5/7/20 6:05 PM, Manivannan Sadhasivam wrote:
>
>
> On 7 May 2020 9:03:08 PM IST, Marek Vasut <marex@denx.de> wrote:
>> On 5/7/20 5:26 PM, Manivannan Sadhasivam wrote:
>>
>> Hi,
>>
>> [...]
>>
>>>> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
>>>> index f43467b02bcd..b4a4d2b0f18e 100644
>>>> --- a/arch/arm/boot/dts/Makefile
>>>> +++ b/arch/arm/boot/dts/Makefile
>>>> @@ -1029,6 +1029,9 @@ dtb-$(CONFIG_ARCH_STM32) += \
>>>> stm32h743i-eval.dtb \
>>>> stm32h743i-disco.dtb \
>>>> stm32mp157a-avenger96.dtb \
>>>> + stm32mp151a-dhcor-avenger96.dtb \
>>>> + stm32mp153a-dhcor-avenger96.dtb \
>>>> + stm32mp157a-dhcor-avenger96.dtb \
>>>
>>> I'm not really sure if keeping SoM name is a good practice here.
>> Since the
>>> board is sold as "Avenger96" alone, why do you want to prepend SoM
>> name to it?
>>> When you say, "stm32mp157a-avenger96.dtb" it obviously means that
>> Avenger96
>>> board uses the stm32mp157a SoC and that comes from SoM.
>>
>> That's because if you look at the other side of the AV96, you will
>> notice there is this other piece of PCB on it, that's the DHCOR SoM.
>> The
>> SoM is soldered on the AV96 carrier board. And only on that SoM is the
>> STM32MP15xx SoC.
>>
>
> Yeah I know but what I was saying is that it is not the usual convention to put SoM name in board DTS. The DTS should reflect the actual product name. Here, the SoC prefix is justified since they reflect the family/SoC name and used as a differentiation factor. But using SoM name seems redundant.
>
> You can use SoM name if there are chances where different family of SoM can be used on the base board, thereby making it as a differentiation factor.
There are other SoCs on the DHCOR SoM form factor, I think MX6ULL, so
technically you can populate a different one on the AV96.
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^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins
2020-04-29 16:37 [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins Marek Vasut
` (10 preceding siblings ...)
2020-04-29 16:37 ` [PATCH 12/12] ARM: dts: stm32: Add DTs for STM32MP15x variants of the DHCOR SOM and AV96 Marek Vasut
@ 2020-05-06 7:46 ` Alexandre Torgue
2020-05-06 13:37 ` Marek Vasut
11 siblings, 1 reply; 26+ messages in thread
From: Alexandre Torgue @ 2020-05-06 7:46 UTC (permalink / raw)
To: Marek Vasut, linux-arm-kernel
Cc: Patrick Delaunay, linux-stm32, Patrice Chotard, Maxime Coquelin,
Manivannan Sadhasivam
Hi Marek
On 4/29/20 6:37 PM, Marek Vasut wrote:
> Add another mux option for I2C2 pins, this is used on AV96 board.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Alexandre Torgue <alexandre.torgue@st.com>
> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
> Cc: Patrice Chotard <patrice.chotard@st.com>
> Cc: Patrick Delaunay <patrick.delaunay@st.com>
> Cc: linux-stm32@st-md-mailman.stormreply.com
> To: linux-arm-kernel@lists.infradead.org
> ---
> arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
> index aeddcaadb829..ca4edcf369d0 100644
> --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
> +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
> @@ -408,6 +408,23 @@ pins {
> };
> };
>
> + i2c2_pins_c: i2c2-4 {
> + pins {
> + pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */
> + <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
> + bias-disable;
> + drive-open-drain;
> + slew-rate = <0>;
> + };
> + };
> +
> + i2c2_pins_sleep_c: i2c2-5 {
should be i2c2-sleep-4. I'll fix it directly when I'll merge.
> + pins {
> + pinmux = <STM32_PINMUX('F', 1, ANALOG)>, /* I2C2_SCL */
> + <STM32_PINMUX('H', 5, ANALOG)>; /* I2C2_SDA */
> + };
> + };
> +
> i2c5_pins_a: i2c5-0 {
> pins {
> pinmux = <STM32_PINMUX('A', 11, AF4)>, /* I2C5_SCL */
>
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^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins
2020-05-06 7:46 ` [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins Alexandre Torgue
@ 2020-05-06 13:37 ` Marek Vasut
2020-05-06 14:26 ` Alexandre Torgue
0 siblings, 1 reply; 26+ messages in thread
From: Marek Vasut @ 2020-05-06 13:37 UTC (permalink / raw)
To: Alexandre Torgue, linux-arm-kernel
Cc: Patrick Delaunay, linux-stm32, Patrice Chotard, Maxime Coquelin,
Manivannan Sadhasivam
On 5/6/20 9:46 AM, Alexandre Torgue wrote:
> Hi Marek
Hi,
> On 4/29/20 6:37 PM, Marek Vasut wrote:
>> Add another mux option for I2C2 pins, this is used on AV96 board.
>>
>> Signed-off-by: Marek Vasut <marex@denx.de>
>> Cc: Alexandre Torgue <alexandre.torgue@st.com>
>> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
>> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
>> Cc: Patrice Chotard <patrice.chotard@st.com>
>> Cc: Patrick Delaunay <patrick.delaunay@st.com>
>> Cc: linux-stm32@st-md-mailman.stormreply.com
>> To: linux-arm-kernel@lists.infradead.org
>> ---
>> arch/arm/boot/dts/stm32mp15-pinctrl.dtsi | 17 +++++++++++++++++
>> 1 file changed, 17 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
>> b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
>> index aeddcaadb829..ca4edcf369d0 100644
>> --- a/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
>> +++ b/arch/arm/boot/dts/stm32mp15-pinctrl.dtsi
>> @@ -408,6 +408,23 @@ pins {
>> };
>> };
>> + i2c2_pins_c: i2c2-4 {
>> + pins {
>> + pinmux = <STM32_PINMUX('F', 1, AF4)>, /* I2C2_SCL */
>> + <STM32_PINMUX('H', 5, AF4)>; /* I2C2_SDA */
>> + bias-disable;
>> + drive-open-drain;
>> + slew-rate = <0>;
>> + };
>> + };
>> +
>> + i2c2_pins_sleep_c: i2c2-5 {
>
> should be i2c2-sleep-4. I'll fix it directly when I'll merge.
All right, thanks.
btw I had this internal discussion now about handling the combinatorial
explosion of board DTs here. If we support them all, by the end of the
lifespan of these devices, we end up with:
STM32MP15{1,3,7}{a,c,d,f} SoM rev. {0..7}00 on baseboard rev. {0..7}00.
There won't be every SoM and baseboard revision combination all right.
But even the amount of SoM options gives me 12 DTs. That is not a low
number. Does ST have some plan to handle such situation ?
I can imagine that U-Boot can patch the DT and enable/disable
functionality , which could handle the {a,c,d,f} options and reduce the
amount of DTs. It could possibly also handle the {1,3,7} options.
Any other ideas ?
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^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins
2020-05-06 13:37 ` Marek Vasut
@ 2020-05-06 14:26 ` Alexandre Torgue
2020-05-06 14:39 ` Marek Vasut
0 siblings, 1 reply; 26+ messages in thread
From: Alexandre Torgue @ 2020-05-06 14:26 UTC (permalink / raw)
To: Marek Vasut, linux-arm-kernel
Cc: Patrick Delaunay, linux-stm32, Patrice Chotard, Maxime Coquelin,
Manivannan Sadhasivam
> All right, thanks.
>
> btw I had this internal discussion now about handling the combinatorial
> explosion of board DTs here. If we support them all, by the end of the
> lifespan of these devices, we end up with:
>
> STM32MP15{1,3,7}{a,c,d,f} SoM rev. {0..7}00 on baseboard rev. {0..7}00.
>
> There won't be every SoM and baseboard revision combination all right.
> But even the amount of SoM options gives me 12 DTs. That is not a low
> number. Does ST have some plan to handle such situation ?
Yes I have the same point in mind. How to maintain all boards ? Should
we refuse some boards and only keep one as example ?
> I can imagine that U-Boot can patch the DT and enable/disable
> functionality , which could handle the {a,c,d,f} options and reduce the
> amount of DTs. It could possibly also handle the {1,3,7} options.
>
It is something I discussed with Kevin Hilman at ELCE and sometime with
Rob on IIRc. We could use u-boot to handle differences between SoC, and
boards. Technically it's possible but the main issue doing that is, you
will hide some updates in your bootloader and then your dtb used by
kernel will not reflect your dts file. It could be confused for
customers and users.
> Any other ideas ?
What is for you the main issue ? the number of files to add or how to
maintain all those files ?
If it is the number of files to add, we can think about several ways:
1-As mentioned above, to only keep kind of reference platforms
2-Have vendor directories in arch/arm/boot/dts (but it's another story
to make it accepted)
3-Or maybe use DTBO to overwrite some configuration.
If the concern is about how to maintain, maybe I'm wrong but I think
that with a good split and factorization we could minimize support.
Currently I only those things in mind but nothing really mature.
regards
alex
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^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins
2020-05-06 14:26 ` Alexandre Torgue
@ 2020-05-06 14:39 ` Marek Vasut
2020-05-06 14:55 ` Alexandre Torgue
0 siblings, 1 reply; 26+ messages in thread
From: Marek Vasut @ 2020-05-06 14:39 UTC (permalink / raw)
To: Alexandre Torgue, linux-arm-kernel
Cc: Patrick Delaunay, linux-stm32, Patrice Chotard, Maxime Coquelin,
Manivannan Sadhasivam
On 5/6/20 4:26 PM, Alexandre Torgue wrote:
>
>
>
>> All right, thanks.
>>
>> btw I had this internal discussion now about handling the combinatorial
>> explosion of board DTs here. If we support them all, by the end of the
>> lifespan of these devices, we end up with:
>>
>> STM32MP15{1,3,7}{a,c,d,f} SoM rev. {0..7}00 on baseboard rev. {0..7}00.
>>
>> There won't be every SoM and baseboard revision combination all right.
>> But even the amount of SoM options gives me 12 DTs. That is not a low
>> number. Does ST have some plan to handle such situation ?
>
> Yes I have the same point in mind. How to maintain all boards ? Should
> we refuse some boards and only keep one as example ?
But which ones do you want to drop? The pdk2 is a devkit , so you can
put in any SoM option, that's the problem.
>> I can imagine that U-Boot can patch the DT and enable/disable
>> functionality , which could handle the {a,c,d,f} options and reduce the
>> amount of DTs. It could possibly also handle the {1,3,7} options.
>>
>
> It is something I discussed with Kevin Hilman at ELCE and sometime with
> Rob on IIRc. We could use u-boot to handle differences between SoC, and
> boards. Technically it's possible but the main issue doing that is, you
> will hide some updates in your bootloader and then your dtb used by
> kernel will not reflect your dts file. It could be confused for
> customers and users.
Yes.
>> Any other ideas ?
>
> What is for you the main issue ? the number of files to add or how to
> maintain all those files ?
The number. Maintaining them is not that much of a problem.
> If it is the number of files to add, we can think about several ways:
>
> 1-As mentioned above, to only keep kind of reference platforms
>
> 2-Have vendor directories in arch/arm/boot/dts (but it's another story
> to make it accepted)
Maybe that's something we should consider for arm32, but that's a
different discussion altogether.
> 3-Or maybe use DTBO to overwrite some configuration.
>
> If the concern is about how to maintain, maybe I'm wrong but I think
> that with a good split and factorization we could minimize support.
>
> Currently I only those things in mind but nothing really mature.
I hope this patchset does the split right, it's the number.
_______________________________________________
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^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins
2020-05-06 14:39 ` Marek Vasut
@ 2020-05-06 14:55 ` Alexandre Torgue
2020-05-06 14:58 ` Marek Vasut
0 siblings, 1 reply; 26+ messages in thread
From: Alexandre Torgue @ 2020-05-06 14:55 UTC (permalink / raw)
To: Marek Vasut, linux-arm-kernel
Cc: Patrick Delaunay, linux-stm32, Patrice Chotard, Maxime Coquelin,
Manivannan Sadhasivam
On 5/6/20 4:39 PM, Marek Vasut wrote:
> On 5/6/20 4:26 PM, Alexandre Torgue wrote:
>>
>>
>>
>>> All right, thanks.
>>>
>>> btw I had this internal discussion now about handling the combinatorial
>>> explosion of board DTs here. If we support them all, by the end of the
>>> lifespan of these devices, we end up with:
>>>
>>> STM32MP15{1,3,7}{a,c,d,f} SoM rev. {0..7}00 on baseboard rev. {0..7}00.
>>>
>>> There won't be every SoM and baseboard revision combination all right.
>>> But even the amount of SoM options gives me 12 DTs. That is not a low
>>> number. Does ST have some plan to handle such situation ?
>>
>> Yes I have the same point in mind. How to maintain all boards ? Should
>> we refuse some boards and only keep one as example ?
>
> But which ones do you want to drop? The pdk2 is a devkit , so you can
> put in any SoM option, that's the problem.
Ok but we could choice to build only one (or few) possibilities. I mean
maybe only mp157 ?
>>> I can imagine that U-Boot can patch the DT and enable/disable
>>> functionality , which could handle the {a,c,d,f} options and reduce the
>>> amount of DTs. It could possibly also handle the {1,3,7} options.
>>>
>>
>> It is something I discussed with Kevin Hilman at ELCE and sometime with
>> Rob on IIRc. We could use u-boot to handle differences between SoC, and
>> boards. Technically it's possible but the main issue doing that is, you
>> will hide some updates in your bootloader and then your dtb used by
>> kernel will not reflect your dts file. It could be confused for
>> customers and users.
>
> Yes.
>
>>> Any other ideas ?
>>
>> What is for you the main issue ? the number of files to add or how to
>> maintain all those files ?
>
> The number. Maintaining them is not that much of a problem.
I agree
>
>> If it is the number of files to add, we can think about several ways:
>>
>> 1-As mentioned above, to only keep kind of reference platforms
>>
>> 2-Have vendor directories in arch/arm/boot/dts (but it's another story
>> to make it accepted)
>
> Maybe that's something we should consider for arm32, but that's a
> different discussion altogether.
I gonna see how to start discussion on that (maybe thanks to Linaro and
device tree evolution)
>> 3-Or maybe use DTBO to overwrite some configuration.
>>
>> If the concern is about how to maintain, maybe I'm wrong but I think
>> that with a good split and factorization we could minimize support.
>>
>> Currently I only those things in mind but nothing really mature.
>
> I hope this patchset does the split right, it's the number.
>
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins
2020-05-06 14:55 ` Alexandre Torgue
@ 2020-05-06 14:58 ` Marek Vasut
2020-05-06 15:15 ` Alexandre Torgue
0 siblings, 1 reply; 26+ messages in thread
From: Marek Vasut @ 2020-05-06 14:58 UTC (permalink / raw)
To: Alexandre Torgue, linux-arm-kernel
Cc: Patrick Delaunay, linux-stm32, Patrice Chotard, Maxime Coquelin,
Manivannan Sadhasivam
On 5/6/20 4:55 PM, Alexandre Torgue wrote:
>
>
> On 5/6/20 4:39 PM, Marek Vasut wrote:
>> On 5/6/20 4:26 PM, Alexandre Torgue wrote:
>>>
>>>
>>>
>>>> All right, thanks.
>>>>
>>>> btw I had this internal discussion now about handling the combinatorial
>>>> explosion of board DTs here. If we support them all, by the end of the
>>>> lifespan of these devices, we end up with:
>>>>
>>>> STM32MP15{1,3,7}{a,c,d,f} SoM rev. {0..7}00 on baseboard rev. {0..7}00.
>>>>
>>>> There won't be every SoM and baseboard revision combination all right.
>>>> But even the amount of SoM options gives me 12 DTs. That is not a low
>>>> number. Does ST have some plan to handle such situation ?
>>>
>>> Yes I have the same point in mind. How to maintain all boards ? Should
>>> we refuse some boards and only keep one as example ?
>>
>> But which ones do you want to drop? The pdk2 is a devkit , so you can
>> put in any SoM option, that's the problem.
>
> Ok but we could choice to build only one (or few) possibilities. I mean
> maybe only mp157 ?
But that one isn't gonna work for e.g. 153 then, would it?
>>>> I can imagine that U-Boot can patch the DT and enable/disable
>>>> functionality , which could handle the {a,c,d,f} options and reduce the
>>>> amount of DTs. It could possibly also handle the {1,3,7} options.
>>>>
>>>
>>> It is something I discussed with Kevin Hilman at ELCE and sometime with
>>> Rob on IIRc. We could use u-boot to handle differences between SoC, and
>>> boards. Technically it's possible but the main issue doing that is, you
>>> will hide some updates in your bootloader and then your dtb used by
>>> kernel will not reflect your dts file. It could be confused for
>>> customers and users.
>>
>> Yes.
>>
>>>> Any other ideas ?
>>>
>>> What is for you the main issue ? the number of files to add or how to
>>> maintain all those files ?
>>
>> The number. Maintaining them is not that much of a problem.
>
> I agree
>
>>
>>> If it is the number of files to add, we can think about several ways:
>>>
>>> 1-As mentioned above, to only keep kind of reference platforms
>>>
>>> 2-Have vendor directories in arch/arm/boot/dts (but it's another story
>>> to make it accepted)
>>
>> Maybe that's something we should consider for arm32, but that's a
>> different discussion altogether.
>
> I gonna see how to start discussion on that (maybe thanks to Linaro and
> device tree evolution)
All right.
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins
2020-05-06 14:58 ` Marek Vasut
@ 2020-05-06 15:15 ` Alexandre Torgue
2020-05-06 15:27 ` Marek Vasut
0 siblings, 1 reply; 26+ messages in thread
From: Alexandre Torgue @ 2020-05-06 15:15 UTC (permalink / raw)
To: Marek Vasut, linux-arm-kernel
Cc: Patrick Delaunay, linux-stm32, Patrice Chotard, Maxime Coquelin,
Manivannan Sadhasivam
On 5/6/20 4:58 PM, Marek Vasut wrote:
> On 5/6/20 4:55 PM, Alexandre Torgue wrote:
>>
>>
>> On 5/6/20 4:39 PM, Marek Vasut wrote:
>>> On 5/6/20 4:26 PM, Alexandre Torgue wrote:
>>>>
>>>>
>>>>
>>>>> All right, thanks.
>>>>>
>>>>> btw I had this internal discussion now about handling the combinatorial
>>>>> explosion of board DTs here. If we support them all, by the end of the
>>>>> lifespan of these devices, we end up with:
>>>>>
>>>>> STM32MP15{1,3,7}{a,c,d,f} SoM rev. {0..7}00 on baseboard rev. {0..7}00.
>>>>>
>>>>> There won't be every SoM and baseboard revision combination all right.
>>>>> But even the amount of SoM options gives me 12 DTs. That is not a low
>>>>> number. Does ST have some plan to handle such situation ?
>>>>
>>>> Yes I have the same point in mind. How to maintain all boards ? Should
>>>> we refuse some boards and only keep one as example ?
>>>
>>> But which ones do you want to drop? The pdk2 is a devkit , so you can
>>> put in any SoM option, that's the problem.
>>
>> Ok but we could choice to build only one (or few) possibilities. I mean
>> maybe only mp157 ?
>
> But that one isn't gonna work for e.g. 153 then, would it?
No but we could let user of 153 do his own dts by hand. With a good
split is not difficult to do.
For e.g I don't plan to upstream stm32mp153c-dk2 (I don't know if it
really exist), but user could easily create his own stm32mp153c-dk2.dts
by assembling well dtsi files and taking stm32mp157c-dk2 (or dk1) as
example.
>>>>> I can imagine that U-Boot can patch the DT and enable/disable
>>>>> functionality , which could handle the {a,c,d,f} options and reduce the
>>>>> amount of DTs. It could possibly also handle the {1,3,7} options.
>>>>>
>>>>
>>>> It is something I discussed with Kevin Hilman at ELCE and sometime with
>>>> Rob on IIRc. We could use u-boot to handle differences between SoC, and
>>>> boards. Technically it's possible but the main issue doing that is, you
>>>> will hide some updates in your bootloader and then your dtb used by
>>>> kernel will not reflect your dts file. It could be confused for
>>>> customers and users.
>>>
>>> Yes.
>>>
>>>>> Any other ideas ?
>>>>
>>>> What is for you the main issue ? the number of files to add or how to
>>>> maintain all those files ?
>>>
>>> The number. Maintaining them is not that much of a problem.
>>
>> I agree
>>
>>>
>>>> If it is the number of files to add, we can think about several ways:
>>>>
>>>> 1-As mentioned above, to only keep kind of reference platforms
>>>>
>>>> 2-Have vendor directories in arch/arm/boot/dts (but it's another story
>>>> to make it accepted)
>>>
>>> Maybe that's something we should consider for arm32, but that's a
>>> different discussion altogether.
>>
>> I gonna see how to start discussion on that (maybe thanks to Linaro and
>> device tree evolution)
>
> All right.
>
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^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH 01/12] ARM: dts: stm32: Add alternate pinmux for I2C2 pins
2020-05-06 15:15 ` Alexandre Torgue
@ 2020-05-06 15:27 ` Marek Vasut
0 siblings, 0 replies; 26+ messages in thread
From: Marek Vasut @ 2020-05-06 15:27 UTC (permalink / raw)
To: Alexandre Torgue, linux-arm-kernel
Cc: Patrick Delaunay, linux-stm32, Patrice Chotard, Maxime Coquelin,
Manivannan Sadhasivam
On 5/6/20 5:15 PM, Alexandre Torgue wrote:
>
>
> On 5/6/20 4:58 PM, Marek Vasut wrote:
>> On 5/6/20 4:55 PM, Alexandre Torgue wrote:
>>>
>>>
>>> On 5/6/20 4:39 PM, Marek Vasut wrote:
>>>> On 5/6/20 4:26 PM, Alexandre Torgue wrote:
>>>>>
>>>>>
>>>>>
>>>>>> All right, thanks.
>>>>>>
>>>>>> btw I had this internal discussion now about handling the
>>>>>> combinatorial
>>>>>> explosion of board DTs here. If we support them all, by the end of
>>>>>> the
>>>>>> lifespan of these devices, we end up with:
>>>>>>
>>>>>> STM32MP15{1,3,7}{a,c,d,f} SoM rev. {0..7}00 on baseboard rev.
>>>>>> {0..7}00.
>>>>>>
>>>>>> There won't be every SoM and baseboard revision combination all
>>>>>> right.
>>>>>> But even the amount of SoM options gives me 12 DTs. That is not a low
>>>>>> number. Does ST have some plan to handle such situation ?
>>>>>
>>>>> Yes I have the same point in mind. How to maintain all boards ? Should
>>>>> we refuse some boards and only keep one as example ?
>>>>
>>>> But which ones do you want to drop? The pdk2 is a devkit , so you can
>>>> put in any SoM option, that's the problem.
>>>
>>> Ok but we could choice to build only one (or few) possibilities. I mean
>>> maybe only mp157 ?
>>
>> But that one isn't gonna work for e.g. 153 then, would it?
>
> No but we could let user of 153 do his own dts by hand. With a good
> split is not difficult to do.
>
> For e.g I don't plan to upstream stm32mp153c-dk2 (I don't know if it
> really exist), but user could easily create his own stm32mp153c-dk2.dts
> by assembling well dtsi files and taking stm32mp157c-dk2 (or dk1) as
> example.
I would still want to make it easy for the users of this SoM to just use
it though. And I am quite sure there will be all combinations of it
eventually.
[...]
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^ permalink raw reply [flat|nested] 26+ messages in thread