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Thu, 2 Jul 2026 21:07:43 -0700 From: Nicolin Chen To: Will Deacon , Robin Murphy , "Joerg Roedel" , Bjorn Helgaas , "Jason Gunthorpe" CC: "Rafael J . Wysocki" , Len Brown , Pranjal Shrivastava , Mostafa Saleh , Lu Baolu , Kevin Tian , , , , , , , Shuai Xue Subject: [PATCH v5 09/18] iommu/arm-smmu-v3: Introduce per-cmdq cmdq_err_handler callback Date: Thu, 2 Jul 2026 21:06:34 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9D9:EE_|SN7PR12MB7107:EE_ X-MS-Office365-Filtering-Correlation-Id: 21bba037-3d68-4250-32d2-08ded8b8ab77 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|36860700016|376014|23010399003|82310400026|1800799024|6133799003|11063799006|56012099006|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: woAVE4HqeDDAK4GxLGXIgDeiJWJdoWQ52yGTdtK0qfQVWW4s4qSY4Na2RVq2uOT2GWbm55UI4hNnoFHtTB5yBdDfIs2M6acDZOPNS7KyMGtsLfQNbjV61YR/WObhSwjLFnMhRKQrO5HTeaXpJmxBlBRnOOWktQsFykvSpC46Hx6UjYwIzIj0RVu/qeHZeX3NdJh6J2kM3BVmYvmj2X7nxKs4hhT/mwkZzD7+v4k8JbeFbUlmzkEthFQtSU82mKXx4X8pJ9j11M1k2j8nh6bIAXsKqwOHh/p4cKcXRg2IRrYvZCewk8xWVzvVhdG5p6iQ4YnTsA+QSwPyZkGFap4JFzmqzAcsdoQCz9PhhXOATdymFOEKtKyhijfREgW6UnxfFcxu+EeN0tmaff8cR2aRMhf0rj4S0MAKNGpHBrZW3A7/kJrACRNNlcoeN3kqerX+GhGtu6qaUS/im/PwDQ1nO4U1842Ll48N2LcqFrIlqDl/ra07MODNTJhFufFfw2GVmphLr+wtmHbwemHwb4FhGXODtHAkWQrbCVEF5MUTWUjlE6AQfY7JzLKTRZmFsv3WScwm1TE7oPE7JWdHHgX+jHo64ZLyjixmkOgS9Ji3wQT0j2zxsCYeueCNJOk+y2Vej5WLxey/hrcmTWhF9YutUa4Kopd0/7DRrWPlxfDFNvf2TFxEhWxRpI3EfLTAZ9SPpPm+E82u6uvd0wjQnbpAkA== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(7416014)(36860700016)(376014)(23010399003)(82310400026)(1800799024)(6133799003)(11063799006)(56012099006)(22082099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: KJxQqwmiao+6TP2YRwG87x0mDCeDtd/tkH8tMlEXVpazDsvK1f/cMwGW9AkXlFbiWveqPSXxBoVYLZS2cc/42cTR6q/ASchnTV+fUe2SY2gXTI82cbLqQJnsgwFviPWJvVud690hPHUasJc84aSv13pTSh4HVIcfy3DbSDn788tzWZ7QJi3hiwSAcWUg+XYGUd0Jd4ZzDs3unvBCLwXZ3p0gHEaF6B9c0yPd8SfkHYc0GEWj7zESjp/pIzAmwbYa4F2aEE31cfreccLvjhpcrN2zgDxKsXIwfq0wbhLDYlTlKS15zAALdLmW/00lxfbY9BFBnX+J1JiPog1Bz6sW4E8VS3VU6hQJ00sypJ2VJSBl/wrasrsyw3za4S0PyxR68VEE/Hyp/4zbGtLMDR7RysMiwx2AVR60ShXop6fYHlS/h3BaMnIiKQZqv8Y3uB0u X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Jul 2026 04:07:59.4289 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 21bba037-3d68-4250-32d2-08ded8b8ab77 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D9.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7107 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260702_210809_796539_01E26CF5 X-CRM114-Status: GOOD ( 15.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org A subsequent change will need arm_smmu_cmdq_issue_cmdlist() to co-clear a pending CMDQ_ERR after a CMD_SYNC poll timeout. And this needs to be done for both smmu->cmdq and tegra241-cmdq. Add a cmdq_err_handler and a paired cmdq_err_lock to struct arm_smmu_cmdq. arm_smmu_gerror_handler() now takes the per-cmdq cmdq_err_lock when acking CMDQ_ERR. It already covers a concurrent ack from cmdq_err_handler via its existing early-exit on no-active-bits. Impl functions and caller will be added in the subsequent change. Assisted-by: Claude:claude-opus-4-7 Signed-off-by: Nicolin Chen --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 12 ++++++++++-- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 18 ++++++++++++++---- drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c | 2 +- 3 files changed, 25 insertions(+), 7 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 56e872e59afeb..86e934d046eaa 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -695,6 +695,10 @@ struct arm_smmu_queue_poll { bool wfe; }; +struct arm_smmu_cmdq; +typedef void (*arm_smmu_cmdq_err_fn)(struct arm_smmu_device *smmu, + struct arm_smmu_cmdq *cmdq); + struct arm_smmu_cmdq { struct arm_smmu_queue q; atomic_long_t *valid_map; @@ -702,6 +706,10 @@ struct arm_smmu_cmdq { atomic_t lock; unsigned long *atc_sync_timeouts; bool (*supports_cmd)(struct arm_smmu_cmd *cmd); + + /* Drain a pending CMDQ_ERR; will hold cmdq_err_lock with irqsave */ + arm_smmu_cmdq_err_fn cmdq_err_handler; + raw_spinlock_t cmdq_err_lock; }; static inline bool arm_smmu_cmdq_supports_cmd(struct arm_smmu_cmdq *cmdq, @@ -1164,8 +1172,8 @@ int arm_smmu_init_one_queue(struct arm_smmu_device *smmu, struct arm_smmu_queue *q, void __iomem *page, unsigned long prod_off, unsigned long cons_off, size_t dwords, const char *name); -int arm_smmu_cmdq_init(struct arm_smmu_device *smmu, - struct arm_smmu_cmdq *cmdq); +int arm_smmu_cmdq_init(struct arm_smmu_device *smmu, struct arm_smmu_cmdq *cmdq, + arm_smmu_cmdq_err_fn cmdq_err_handler); static inline bool arm_smmu_master_canwbs(struct arm_smmu_master *master) { diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 8a4edefeec770..c6e3d1be23403 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2302,13 +2302,18 @@ static irqreturn_t arm_smmu_gerror_handler(int irq, void *dev) { u32 gerror, gerrorn, active; struct arm_smmu_device *smmu = dev; + unsigned long flags; + + raw_spin_lock_irqsave(&smmu->cmdq.cmdq_err_lock, flags); gerror = readl_relaxed(smmu->base + ARM_SMMU_GERROR); gerrorn = readl_relaxed(smmu->base + ARM_SMMU_GERRORN); active = gerror ^ gerrorn; - if (!(active & GERROR_ERR_MASK)) + if (!(active & GERROR_ERR_MASK)) { + raw_spin_unlock_irqrestore(&smmu->cmdq.cmdq_err_lock, flags); return IRQ_NONE; /* No errors pending */ + } dev_warn(smmu->dev, "unexpected global error reported (0x%08x), this could be serious\n", @@ -2317,6 +2322,8 @@ static irqreturn_t arm_smmu_gerror_handler(int irq, void *dev) if (active & GERROR_SFM_ERR) { /* SMMU is being disabled, so other errors don't matter */ writel(gerror, smmu->base + ARM_SMMU_GERRORN); + /* Release before arm_smmu_device_disable() that sleeps */ + raw_spin_unlock_irqrestore(&smmu->cmdq.cmdq_err_lock, flags); dev_err(smmu->dev, "device has entered Service Failure Mode!\n"); arm_smmu_device_disable(smmu); return IRQ_HANDLED; @@ -2344,6 +2351,7 @@ static irqreturn_t arm_smmu_gerror_handler(int irq, void *dev) arm_smmu_cmdq_skip_err(smmu); writel(gerror, smmu->base + ARM_SMMU_GERRORN); + raw_spin_unlock_irqrestore(&smmu->cmdq.cmdq_err_lock, flags); return IRQ_HANDLED; } @@ -4458,13 +4466,15 @@ int arm_smmu_init_one_queue(struct arm_smmu_device *smmu, return 0; } -int arm_smmu_cmdq_init(struct arm_smmu_device *smmu, - struct arm_smmu_cmdq *cmdq) +int arm_smmu_cmdq_init(struct arm_smmu_device *smmu, struct arm_smmu_cmdq *cmdq, + arm_smmu_cmdq_err_fn cmdq_err_handler) { unsigned int nents = 1 << cmdq->q.llq.max_n_shift; atomic_set(&cmdq->owner_prod, 0); atomic_set(&cmdq->lock, 0); + raw_spin_lock_init(&cmdq->cmdq_err_lock); + cmdq->cmdq_err_handler = cmdq_err_handler; cmdq->valid_map = (atomic_long_t *)devm_bitmap_zalloc(smmu->dev, nents, GFP_KERNEL); @@ -4490,7 +4500,7 @@ static int arm_smmu_init_queues(struct arm_smmu_device *smmu) if (ret) return ret; - ret = arm_smmu_cmdq_init(smmu, &smmu->cmdq); + ret = arm_smmu_cmdq_init(smmu, &smmu->cmdq, NULL); if (ret) return ret; diff --git a/drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c b/drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c index 67be62a6e7640..9012ab584d1dd 100644 --- a/drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c +++ b/drivers/iommu/arm/arm-smmu-v3/tegra241-cmdqv.c @@ -643,7 +643,7 @@ static int tegra241_vcmdq_alloc_smmu_cmdq(struct tegra241_vcmdq *vcmdq) q->q_base = q->base_dma & VCMDQ_ADDR; q->q_base |= FIELD_PREP(VCMDQ_LOG2SIZE, q->llq.max_n_shift); - return arm_smmu_cmdq_init(smmu, cmdq); + return arm_smmu_cmdq_init(smmu, cmdq, NULL); } /* VINTF Logical VCMDQ Resource Helpers */ -- 2.43.0