[PATCH 0/3] clk: samsung: auto clock gating fixes for PM

[PATCH 0/3] clk: samsung: auto clock gating fixes for PM

[André Draszik]

Hi,

The attached patches fix issues when CMUs have PM enabled and also a
needless warning message on older Exynos platforms relating to
automatic clock gating as reported by Marek.

Without these it's impossible to enable PM for a CMU when automatic
clock gating is also enabled. While currently no platform uses both,
patches to enable PM on gs101 are in the works but things stopped
working after the auto clock gating changes. I've verified that with
the patches here PM and runtime PM work again.

I've opted to add Fixes: tags to the PM-related patches even though no
current platform uses both, auto clock gating and PM, to ensure the
code is correct nevertheless. Please let me know if that's not desired.

Cheers,
Andre'

Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
André Draszik (3):
      clk: samsung: avoid warning message on legacy Exynos (auto clock gating)
      clk: samsung: fix sysreg save/restore when PM is enabled for CMU
      clk: samsung: allow runtime PM with auto clock gating

 drivers/clk/samsung/clk-exynos-arm64.c | 32 ++++++++++---
 drivers/clk/samsung/clk.c              | 83 ++++++++++++++++++++++++++++------
 drivers/clk/samsung/clk.h              |  5 +-
 3 files changed, 98 insertions(+), 22 deletions(-)
---
base-commit: f8f97927abf7c12382dddc93a144fc9df7919b77
change-id: 20260109-clk-samsung-autoclk-updates-e8a63bd68405

Best regards,
-- 
André Draszik <andre.draszik@linaro.org>

[PATCH 1/3] clk: samsung: avoid warning message on legacy Exynos (auto clock gating)

[André Draszik]

We currently print a warning message that the IO memory size is not
compatible with automatic clock gating for many Exynos-based boards,
including legacy ones, even if not requested to enable automatic clock
gating in the first place.

Change the test in question to avoid that warning.

Fixes: 298fac4f4b96 ("clk: samsung: Implement automatic clock gating mode for CMUs")
Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
Closes: https://lore.kernel.org/all/8b2c412d-3e1e-4be0-a9d5-ef67f6f0d409@samsung.com/
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
 drivers/clk/samsung/clk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c
index 06ea5deef4ee2ffb87dcd14102561886ea80b7bc..417ec1786b5e77e17dda4022b417c1c6b79c59ab 100644
--- a/drivers/clk/samsung/clk.c
+++ b/drivers/clk/samsung/clk.c
@@ -462,7 +462,7 @@ void __init samsung_cmu_register_clocks(struct samsung_clk_provider *ctx,
 					const struct samsung_cmu_info *cmu,
 					struct device_node *np)
 {
-	if (samsung_is_auto_capable(np) && cmu->auto_clock_gate)
+	if (cmu->auto_clock_gate && samsung_is_auto_capable(np))
 		ctx->auto_clock_gate = cmu->auto_clock_gate;
 
 	ctx->gate_dbg_offset = cmu->gate_dbg_offset;

-- 
2.52.0.457.g6b5491de43-goog

Re: [PATCH 1/3] clk: samsung: avoid warning message on legacy Exynos (auto clock gating)

[Peter Griffin]

On Fri, 9 Jan 2026 at 17:27, André Draszik <andre.draszik@linaro.org> wrote:
>
> We currently print a warning message that the IO memory size is not
> compatible with automatic clock gating for many Exynos-based boards,
> including legacy ones, even if not requested to enable automatic clock
> gating in the first place.
>
> Change the test in question to avoid that warning.
>
> Fixes: 298fac4f4b96 ("clk: samsung: Implement automatic clock gating mode for CMUs")
> Reported-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Closes: https://lore.kernel.org/all/8b2c412d-3e1e-4be0-a9d5-ef67f6f0d409@samsung.com/
> Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
> Signed-off-by: André Draszik <andre.draszik@linaro.org>
> ---

Reviewed-by: Peter Griffin <peter.griffin@linaro.org>

[PATCH 2/3] clk: samsung: fix sysreg save/restore when PM is enabled for CMU

[André Draszik]

Currently, sysreg registers of a CMU that has PM and automatic clock
gating enabled are not saved / restored during runtime PM (RPM) or
s2idle. During normal suspend, they are accessed too late, after the
CMU (and potentially power domain) have been shut down, causing an
SError.

The reason is that these registers are registered to be saved/restored
via a syscore suspend handler which doesn't run during RPM or s2idle.
During normal suspend, this handler runs after the CMU has been shut
down. This registration happens as part of
samsung_clk_extended_sleep_init() via samsung_en_dyn_root_clk_gating().

When PM is enabled for a CMU, registers must be saved/restored via
exynos_arm64_cmu_suspend() / exynos_arm64_cmu_resume() respectively
instead. These use their own data structures and are unrelated to
anything that samsung_clk_extended_sleep_init() does. Calling it
unconditionally from samsung_en_dyn_root_clk_gating() therefore isn't
useful.

Update the code to prepare sysreg save / restore in a similar way to
how it handles other clock registers in the PM case already.
exynos_arm64_cmu_suspend() / exynos_arm64_cmu_resume() already handle
sysreg save/restore, just the setup was incorrect.

Fixes: 298fac4f4b96 ("clk: samsung: Implement automatic clock gating mode for CMUs")
Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
 drivers/clk/samsung/clk-exynos-arm64.c | 32 ++++++++++++++++++++++++++------
 drivers/clk/samsung/clk.c              | 19 +++++++++++++------
 drivers/clk/samsung/clk.h              |  3 ++-
 3 files changed, 41 insertions(+), 13 deletions(-)

diff --git a/drivers/clk/samsung/clk-exynos-arm64.c b/drivers/clk/samsung/clk-exynos-arm64.c
index 11e4d49f2390ba714eff5a329bb1f427cd6437b9..35d4de233cc1b4aa25490ff20d0f0372b8d3d0d6 100644
--- a/drivers/clk/samsung/clk-exynos-arm64.c
+++ b/drivers/clk/samsung/clk-exynos-arm64.c
@@ -174,7 +174,7 @@ static int __init exynos_arm64_cmu_prepare_pm(struct device *dev,
 		const struct samsung_cmu_info *cmu)
 {
 	struct exynos_arm64_cmu_data *data = dev_get_drvdata(dev);
-	int i;
+	int i, ret;
 
 	data->clk_save = samsung_clk_alloc_reg_dump(cmu->clk_regs,
 						    cmu->nr_clk_regs);
@@ -182,8 +182,22 @@ static int __init exynos_arm64_cmu_prepare_pm(struct device *dev,
 		return -ENOMEM;
 
 	data->nr_clk_save = cmu->nr_clk_regs;
+
+	if (cmu->nr_sysreg_clk_regs) {
+		data->clk_sysreg_save =
+			samsung_clk_alloc_reg_dump(cmu->sysreg_clk_regs,
+						   cmu->nr_sysreg_clk_regs);
+		if (!data->clk_sysreg_save) {
+			ret = -ENOMEM;
+			goto free_clk_save;
+		}
+
+		data->nr_clk_sysreg = cmu->nr_sysreg_clk_regs;
+	}
+
 	data->clk_suspend = cmu->suspend_regs;
 	data->nr_clk_suspend = cmu->nr_suspend_regs;
+
 	data->nr_pclks = of_clk_get_parent_count(dev->of_node);
 	if (!data->nr_pclks)
 		return 0;
@@ -191,23 +205,29 @@ static int __init exynos_arm64_cmu_prepare_pm(struct device *dev,
 	data->pclks = devm_kcalloc(dev, sizeof(struct clk *), data->nr_pclks,
 				   GFP_KERNEL);
 	if (!data->pclks) {
-		kfree(data->clk_save);
-		return -ENOMEM;
+		ret = -ENOMEM;
+		goto free_sysreg_save;
 	}
 
 	for (i = 0; i < data->nr_pclks; i++) {
 		struct clk *clk = of_clk_get(dev->of_node, i);
 
 		if (IS_ERR(clk)) {
-			kfree(data->clk_save);
 			while (--i >= 0)
 				clk_put(data->pclks[i]);
-			return PTR_ERR(clk);
+			ret = PTR_ERR(clk);
+			goto free_sysreg_save;
 		}
 		data->pclks[i] = clk;
 	}
 
 	return 0;
+
+free_sysreg_save:
+	kfree(data->clk_sysreg_save);
+free_clk_save:
+	kfree(data->clk_save);
+	return ret;
 }
 
 /**
@@ -305,7 +325,7 @@ int __init exynos_arm64_register_cmu_pm(struct platform_device *pdev,
 	samsung_cmu_register_clocks(data->ctx, cmu, np);
 	samsung_clk_of_add_provider(dev->of_node, data->ctx);
 	/* sysreg DT nodes reference a clock in this CMU */
-	samsung_en_dyn_root_clk_gating(np, data->ctx, cmu);
+	samsung_en_dyn_root_clk_gating(np, data->ctx, cmu, true);
 	pm_runtime_put_sync(dev);
 
 	return 0;
diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c
index 417ec1786b5e77e17dda4022b417c1c6b79c59ab..9f68f079fd552f8dfb6898dbfb47dec0e84c626c 100644
--- a/drivers/clk/samsung/clk.c
+++ b/drivers/clk/samsung/clk.c
@@ -496,7 +496,8 @@ void __init samsung_cmu_register_clocks(struct samsung_clk_provider *ctx,
 /* Enable Dynamic Root Clock Gating (DRCG) of bus components */
 void samsung_en_dyn_root_clk_gating(struct device_node *np,
 				    struct samsung_clk_provider *ctx,
-				    const struct samsung_cmu_info *cmu)
+				    const struct samsung_cmu_info *cmu,
+				    bool cmu_has_pm)
 {
 	if (!ctx->auto_clock_gate)
 		return;
@@ -513,10 +514,16 @@ void samsung_en_dyn_root_clk_gating(struct device_node *np,
 			regmap_write_bits(ctx->sysreg, ctx->memclk_offset,
 					  MEMCLK_EN, 0x0);
 
-		samsung_clk_extended_sleep_init(NULL, ctx->sysreg,
-						cmu->sysreg_clk_regs,
-						cmu->nr_sysreg_clk_regs,
-						NULL, 0);
+		if (!cmu_has_pm)
+			/*
+			 * When a CMU has PM support, clocks are saved/restored
+			 * via its PM handlers, so only register them with the
+			 * syscore suspend / resume paths if PM is not in use.
+			 */
+			samsung_clk_extended_sleep_init(NULL, ctx->sysreg,
+							cmu->sysreg_clk_regs,
+							cmu->nr_sysreg_clk_regs,
+							NULL, 0);
 	}
 }
 
@@ -548,7 +555,7 @@ struct samsung_clk_provider * __init samsung_cmu_register_one(
 	samsung_clk_of_add_provider(np, ctx);
 
 	/* sysreg DT nodes reference a clock in this CMU */
-	samsung_en_dyn_root_clk_gating(np, ctx, cmu);
+	samsung_en_dyn_root_clk_gating(np, ctx, cmu, false);
 
 	return ctx;
 }
diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h
index a56aa3be54d817cd24bf2bc29427e783a1a9a859..b1192ca03db5035cc485771ff5597cf132234a2a 100644
--- a/drivers/clk/samsung/clk.h
+++ b/drivers/clk/samsung/clk.h
@@ -476,7 +476,8 @@ struct samsung_clk_reg_dump *samsung_clk_alloc_reg_dump(
 
 void samsung_en_dyn_root_clk_gating(struct device_node *np,
 				struct samsung_clk_provider *ctx,
-				const struct samsung_cmu_info *cmu);
+				const struct samsung_cmu_info *cmu,
+				bool cmu_has_pm);
 
 struct clk_hw *samsung_register_auto_gate(struct device *dev,
 		struct device_node *np, const char *name,

-- 
2.52.0.457.g6b5491de43-goog

Re: [PATCH 2/3] clk: samsung: fix sysreg save/restore when PM is enabled for CMU

[Peter Griffin]

On Fri, 9 Jan 2026 at 17:27, André Draszik <andre.draszik@linaro.org> wrote:
>
> Currently, sysreg registers of a CMU that has PM and automatic clock
> gating enabled are not saved / restored during runtime PM (RPM) or
> s2idle. During normal suspend, they are accessed too late, after the
> CMU (and potentially power domain) have been shut down, causing an
> SError.
>
> The reason is that these registers are registered to be saved/restored
> via a syscore suspend handler which doesn't run during RPM or s2idle.
> During normal suspend, this handler runs after the CMU has been shut
> down. This registration happens as part of
> samsung_clk_extended_sleep_init() via samsung_en_dyn_root_clk_gating().
>
> When PM is enabled for a CMU, registers must be saved/restored via
> exynos_arm64_cmu_suspend() / exynos_arm64_cmu_resume() respectively
> instead. These use their own data structures and are unrelated to
> anything that samsung_clk_extended_sleep_init() does. Calling it
> unconditionally from samsung_en_dyn_root_clk_gating() therefore isn't
> useful.
>
> Update the code to prepare sysreg save / restore in a similar way to
> how it handles other clock registers in the PM case already.
> exynos_arm64_cmu_suspend() / exynos_arm64_cmu_resume() already handle
> sysreg save/restore, just the setup was incorrect.
>
> Fixes: 298fac4f4b96 ("clk: samsung: Implement automatic clock gating mode for CMUs")
> Signed-off-by: André Draszik <andre.draszik@linaro.org>
> ---

Reviewed-by: Peter Griffin <peter.griffin@linaro.org>

[PATCH 3/3] clk: samsung: allow runtime PM with auto clock gating

[André Draszik]

When automatic clock gating is enabled, runtime PM (RPM) isn't entered
even if enabled for a CMU if a sysreg clock exists and is provided by
this CMU (as is generally the case).

The reason is that this driver acquires a CMU's sysreg registers using
syscon_regmap_lookup_by_phandle() which ends up preparing the sysreg
clock. Given the sysreg clock is provided by this CMU, this CMU's usage
count is therefore bumped and RPM can not be entered as this CMU never
becomes idle.

Switch to using device_node_to_regmap() which doesn't handle resources
(the clock), leaving the CMU's usage count unaffected.

Note1: sysreg clock handling is completely removed with this commit
because sysreg register access is only required during suspend/resume.
In the runtime suspend case, we would have to enable the clock to read
the registers, but we can not do that as that would cause a resume of
this driver which is not allowed. This is not a problem because we
would only need to handle the clock manually if automatic clock gating
wasn't enabled in the first. This code is only relevant if automatic
clock gating is enabled, though.

Fixes: 298fac4f4b96 ("clk: samsung: Implement automatic clock gating mode for CMUs")
Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
 drivers/clk/samsung/clk.c | 92 +++++++++++++++++++++++++++++++++++------------
 drivers/clk/samsung/clk.h |  2 ++
 2 files changed, 71 insertions(+), 23 deletions(-)

diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c
index 9f68f079fd552f8dfb6898dbfb47dec0e84c626c..6515df81fcbc79b90f5262843e67575f6a4e0dda 100644
--- a/drivers/clk/samsung/clk.c
+++ b/drivers/clk/samsung/clk.c
@@ -9,11 +9,13 @@
  */
 
 #include <linux/slab.h>
+#include <linux/clk.h>
 #include <linux/clkdev.h>
 #include <linux/clk-provider.h>
 #include <linux/io.h>
 #include <linux/mfd/syscon.h>
 #include <linux/mod_devicetable.h>
+#include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/regmap.h>
 #include <linux/syscore_ops.h>
@@ -489,6 +491,50 @@ void __init samsung_cmu_register_clocks(struct samsung_clk_provider *ctx,
 		samsung_clk_register_cpu(ctx, cmu->cpu_clks, cmu->nr_cpu_clks);
 }
 
+static int samsung_get_sysreg_regmap(struct device_node *np,
+				     struct samsung_clk_provider *ctx)
+{
+	struct device_node *sysreg_np;
+	struct clk *sysreg_clk;
+	struct regmap *regmap;
+	int ret;
+
+	sysreg_np = of_parse_phandle(np, "samsung,sysreg", 0);
+	if (!sysreg_np)
+		return -ENODEV;
+
+	sysreg_clk = of_clk_get(sysreg_np, 0);
+	if (IS_ERR(sysreg_clk)) {
+		ret = PTR_ERR(sysreg_clk);
+		/* clock is optional */
+		if (ret != -ENOENT) {
+			pr_warn("%pOF: Unable to get sysreg clock: %d\n", np,
+				ret);
+			goto put_sysreg_np;
+		}
+		sysreg_clk = NULL;
+	}
+
+	regmap = device_node_to_regmap(sysreg_np);
+	if (IS_ERR(regmap)) {
+		ret = PTR_ERR(regmap);
+		pr_warn("%pOF: Unable to get CMU sysreg: %d\n", np, ret);
+		goto put_clk;
+	}
+
+	ctx->sysreg_clk = sysreg_clk;
+	ctx->sysreg = regmap;
+
+	of_node_put(sysreg_np);
+	return 0;
+
+put_clk:
+	clk_put(sysreg_clk);
+put_sysreg_np:
+	of_node_put(sysreg_np);
+	return ret;
+}
+
 /* Each bit enable/disables DRCG of a bus component */
 #define DRCG_EN_MSK	GENMASK(31, 0)
 #define MEMCLK_EN	BIT(0)
@@ -499,32 +545,32 @@ void samsung_en_dyn_root_clk_gating(struct device_node *np,
 				    const struct samsung_cmu_info *cmu,
 				    bool cmu_has_pm)
 {
+	int ret;
+
 	if (!ctx->auto_clock_gate)
 		return;
 
-	ctx->sysreg = syscon_regmap_lookup_by_phandle(np, "samsung,sysreg");
-	if (IS_ERR(ctx->sysreg)) {
-		pr_warn("%pOF: Unable to get CMU sysreg\n", np);
-		ctx->sysreg = NULL;
-	} else {
-		/* Enable DRCG for all bus components */
-		regmap_write(ctx->sysreg, ctx->drcg_offset, DRCG_EN_MSK);
-		/* Enable memclk gate (not present on all sysreg) */
-		if (ctx->memclk_offset)
-			regmap_write_bits(ctx->sysreg, ctx->memclk_offset,
-					  MEMCLK_EN, 0x0);
-
-		if (!cmu_has_pm)
-			/*
-			 * When a CMU has PM support, clocks are saved/restored
-			 * via its PM handlers, so only register them with the
-			 * syscore suspend / resume paths if PM is not in use.
-			 */
-			samsung_clk_extended_sleep_init(NULL, ctx->sysreg,
-							cmu->sysreg_clk_regs,
-							cmu->nr_sysreg_clk_regs,
-							NULL, 0);
-	}
+	ret = samsung_get_sysreg_regmap(np, ctx);
+	if (ret)
+		return;
+
+	/* Enable DRCG for all bus components */
+	regmap_write(ctx->sysreg, ctx->drcg_offset, DRCG_EN_MSK);
+	/* Enable memclk gate (not present on all sysreg) */
+	if (ctx->memclk_offset)
+		regmap_write_bits(ctx->sysreg, ctx->memclk_offset,
+				  MEMCLK_EN, 0x0);
+
+	if (!cmu_has_pm)
+		/*
+		 * When a CMU has PM support, clocks are saved/restored via its
+		 * PM handlers, so only register them with the syscore
+		 * suspend / resume paths if PM is not in use.
+		 */
+		samsung_clk_extended_sleep_init(NULL, ctx->sysreg,
+						cmu->sysreg_clk_regs,
+						cmu->nr_sysreg_clk_regs,
+						NULL, 0);
 }
 
 /*
diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h
index b1192ca03db5035cc485771ff5597cf132234a2a..deb426fbb0942f21b63c583f0ad55738239b04e4 100644
--- a/drivers/clk/samsung/clk.h
+++ b/drivers/clk/samsung/clk.h
@@ -21,6 +21,7 @@
  * @reg_base: virtual address for the register base
  * @dev: clock provider device needed for runtime PM
  * @sysreg: syscon regmap for clock-provider sysreg controller
+ * @sysreg_clk: clock for sysreg access, if required
  * @lock: maintains exclusion between callbacks for a given clock-provider
  * @auto_clock_gate: enable auto clk mode for all clocks in clock-provider
  * @gate_dbg_offset: gate debug reg offset. Used for all gates in auto clk mode
@@ -33,6 +34,7 @@ struct samsung_clk_provider {
 	void __iomem *reg_base;
 	struct device *dev;
 	struct regmap *sysreg;
+	struct clk *sysreg_clk;
 	spinlock_t lock;
 	bool auto_clock_gate;
 	u32 gate_dbg_offset;

-- 
2.52.0.457.g6b5491de43-goog

Re: [PATCH 3/3] clk: samsung: allow runtime PM with auto clock gating

[Krzysztof Kozlowski]

On 09/01/2026 18:27, André Draszik wrote:
> When automatic clock gating is enabled, runtime PM (RPM) isn't entered
> even if enabled for a CMU if a sysreg clock exists and is provided by
> this CMU (as is generally the case).
> 
> The reason is that this driver acquires a CMU's sysreg registers using
> syscon_regmap_lookup_by_phandle() which ends up preparing the sysreg
> clock. Given the sysreg clock is provided by this CMU, this CMU's usage
> count is therefore bumped and RPM can not be entered as this CMU never
> becomes idle.
> 
> Switch to using device_node_to_regmap() which doesn't handle resources
> (the clock), leaving the CMU's usage count unaffected.
> 
> Note1: sysreg clock handling is completely removed with this commit

I miss where do you remove in this commit the sysreg clock handling?

> because sysreg register access is only required during suspend/resume.
> In the runtime suspend case, we would have to enable the clock to read
> the registers, but we can not do that as that would cause a resume of
> this driver which is not allowed. This is not a problem because we
> would only need to handle the clock manually if automatic clock gating
> wasn't enabled in the first. This code is only relevant if automatic
> clock gating is enabled, though.
> 
> Fixes: 298fac4f4b96 ("clk: samsung: Implement automatic clock gating mode for CMUs")
> Signed-off-by: André Draszik <andre.draszik@linaro.org>
> ---
>  drivers/clk/samsung/clk.c | 92 +++++++++++++++++++++++++++++++++++------------
>  drivers/clk/samsung/clk.h |  2 ++
>  2 files changed, 71 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c
> index 9f68f079fd552f8dfb6898dbfb47dec0e84c626c..6515df81fcbc79b90f5262843e67575f6a4e0dda 100644
> --- a/drivers/clk/samsung/clk.c
> +++ b/drivers/clk/samsung/clk.c
> @@ -9,11 +9,13 @@
>   */
>  
>  #include <linux/slab.h>
> +#include <linux/clk.h>
>  #include <linux/clkdev.h>
>  #include <linux/clk-provider.h>
>  #include <linux/io.h>
>  #include <linux/mfd/syscon.h>
>  #include <linux/mod_devicetable.h>
> +#include <linux/of.h>
>  #include <linux/of_address.h>
>  #include <linux/regmap.h>
>  #include <linux/syscore_ops.h>
> @@ -489,6 +491,50 @@ void __init samsung_cmu_register_clocks(struct samsung_clk_provider *ctx,
>  		samsung_clk_register_cpu(ctx, cmu->cpu_clks, cmu->nr_cpu_clks);
>  }
>  
> +static int samsung_get_sysreg_regmap(struct device_node *np,
> +				     struct samsung_clk_provider *ctx)
> +{
> +	struct device_node *sysreg_np;
> +	struct clk *sysreg_clk;
> +	struct regmap *regmap;
> +	int ret;
> +
> +	sysreg_np = of_parse_phandle(np, "samsung,sysreg", 0);
> +	if (!sysreg_np)
> +		return -ENODEV;
> +
> +	sysreg_clk = of_clk_get(sysreg_np, 0);

I don't think you should be poking clock of some other device. This
clearly breaks encapsulation. What sysreg is needs to do to access
registers, is only business of sysreg. No other drivers should
re-implement this.

> +	if (IS_ERR(sysreg_clk)) {
> +		ret = PTR_ERR(sysreg_clk);
> +		/* clock is optional */
> +		if (ret != -ENOENT) {
> +			pr_warn("%pOF: Unable to get sysreg clock: %d\n", np,
> +				ret);
> +			goto put_sysreg_np;
> +		}
> +		sysreg_clk = NULL;
> +	}


Best regards,
Krzysztof

Re: [PATCH 3/3] clk: samsung: allow runtime PM with auto clock gating

[André Draszik]

Hi Krzysztof,

On Sat, 2026-01-17 at 20:25 +0100, Krzysztof Kozlowski wrote:
> On 09/01/2026 18:27, André Draszik wrote:
> > When automatic clock gating is enabled, runtime PM (RPM) isn't entered
> > even if enabled for a CMU if a sysreg clock exists and is provided by
> > this CMU (as is generally the case).
> > 
> > The reason is that this driver acquires a CMU's sysreg registers using
> > syscon_regmap_lookup_by_phandle() which ends up preparing the sysreg
> > clock. Given the sysreg clock is provided by this CMU, this CMU's usage
> > count is therefore bumped and RPM can not be entered as this CMU never
> > becomes idle.
> > 
> > Switch to using device_node_to_regmap() which doesn't handle resources
> > (the clock), leaving the CMU's usage count unaffected.
> > 
> > Note1: sysreg clock handling is completely removed with this commit
> 
> I miss where do you remove in this commit the sysreg clock handling?

The CMU driver originally used syscon_regmap_lookup_by_phandle() for sysreg,
which does clk_get() and clk_prepare(), and then implicitly and for each
register access clk_enable()/disable() for the clock specified in DT for the
(sysreg) node.

This commit changes it to using device_node_to_regmap(), which does nothing
with the clock (or any other resources). I opted to have the CMU driver still
do a clk_get(), so that the relationship is still visible, e.g. in
$debugfs/clk/clk_summary.

> > because sysreg register access is only required during suspend/resume.
> > In the runtime suspend case, we would have to enable the clock to read
> > the registers, but we can not do that as that would cause a resume of
> > this driver which is not allowed. This is not a problem because we
> > would only need to handle the clock manually if automatic clock gating
> > wasn't enabled in the first. This code is only relevant if automatic
> > clock gating is enabled, though.
> > 
> > Fixes: 298fac4f4b96 ("clk: samsung: Implement automatic clock gating mode for CMUs")
> > Signed-off-by: André Draszik <andre.draszik@linaro.org>
> > ---
> >  drivers/clk/samsung/clk.c | 92 +++++++++++++++++++++++++++++++++++------------
> >  drivers/clk/samsung/clk.h |  2 ++
> >  2 files changed, 71 insertions(+), 23 deletions(-)
> > 
> > diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c
> > index 9f68f079fd552f8dfb6898dbfb47dec0e84c626c..6515df81fcbc79b90f5262843e67575f6a4e0dda 100644
> > --- a/drivers/clk/samsung/clk.c
> > +++ b/drivers/clk/samsung/clk.c
> > @@ -9,11 +9,13 @@
> >   */
> >  
> >  #include <linux/slab.h>
> > +#include <linux/clk.h>
> >  #include <linux/clkdev.h>
> >  #include <linux/clk-provider.h>
> >  #include <linux/io.h>
> >  #include <linux/mfd/syscon.h>
> >  #include <linux/mod_devicetable.h>
> > +#include <linux/of.h>
> >  #include <linux/of_address.h>
> >  #include <linux/regmap.h>
> >  #include <linux/syscore_ops.h>
> > @@ -489,6 +491,50 @@ void __init samsung_cmu_register_clocks(struct samsung_clk_provider *ctx,
> >  		samsung_clk_register_cpu(ctx, cmu->cpu_clks, cmu->nr_cpu_clks);
> >  }
> >  
> > +static int samsung_get_sysreg_regmap(struct device_node *np,
> > +				     struct samsung_clk_provider *ctx)
> > +{
> > +	struct device_node *sysreg_np;
> > +	struct clk *sysreg_clk;
> > +	struct regmap *regmap;
> > +	int ret;
> > +
> > +	sysreg_np = of_parse_phandle(np, "samsung,sysreg", 0);
> > +	if (!sysreg_np)
> > +		return -ENODEV;
> > +
> > +	sysreg_clk = of_clk_get(sysreg_np, 0);
> 
> I don't think you should be poking clock of some other device. This
> clearly breaks encapsulation. What sysreg is needs to do to access
> registers, is only business of sysreg. No other drivers should
> re-implement this.

Similarly, to how other drivers (like UFS and peric/USI) also poke in
the sysreg region in a similar way, the CMU related parts of sysreg are
handled in this driver, though, as only the CMU driver knows how to
configure them based on the gating (auto vs. manual).

No separate driver was sysreg was added when this code was introduced.
The clk_get() used to be part of syscon_regmap_lookup_by_phandle(), and
I chose to keep only that, as per above.

I propose to add an actual sysreg driver once the need arises, then
this can also move, but for now keeping it here seems straight forward.

Is that OK with you?

Cheers,
Andre'

Re: [PATCH 3/3] clk: samsung: allow runtime PM with auto clock gating

[André Draszik]

On Mon, 2026-01-19 at 15:00 +0000, André Draszik wrote:
> Hi Krzysztof,
> 
> On Sat, 2026-01-17 at 20:25 +0100, Krzysztof Kozlowski wrote:
> > On 09/01/2026 18:27, André Draszik wrote:
> > > When automatic clock gating is enabled, runtime PM (RPM) isn't entered
> > > even if enabled for a CMU if a sysreg clock exists and is provided by
> > > this CMU (as is generally the case).
> > > 
> > > The reason is that this driver acquires a CMU's sysreg registers using
> > > syscon_regmap_lookup_by_phandle() which ends up preparing the sysreg
> > > clock. Given the sysreg clock is provided by this CMU, this CMU's usage
> > > count is therefore bumped and RPM can not be entered as this CMU never
> > > becomes idle.
> > > 
> > > Switch to using device_node_to_regmap() which doesn't handle resources
> > > (the clock), leaving the CMU's usage count unaffected.
> > > 
> > > Note1: sysreg clock handling is completely removed with this commit
> > 
> > I miss where do you remove in this commit the sysreg clock handling?
> 
> The CMU driver originally used syscon_regmap_lookup_by_phandle() for sysreg,
> which does clk_get() and clk_prepare(), and then implicitly and for each
> register access clk_enable()/disable() for the clock specified in DT for the
> (sysreg) node.
> 
> This commit changes it to using device_node_to_regmap(), which does nothing
> with the clock (or any other resources). I opted to have the CMU driver still
> do a clk_get(), so that the relationship is still visible, e.g. in
> $debugfs/clk/clk_summary.
> 
> > > because sysreg register access is only required during suspend/resume.
> > > In the runtime suspend case, we would have to enable the clock to read
> > > the registers, but we can not do that as that would cause a resume of
> > > this driver which is not allowed. This is not a problem because we
> > > would only need to handle the clock manually if automatic clock gating
> > > wasn't enabled in the first. This code is only relevant if automatic
> > > clock gating is enabled, though.
> > > 
> > > Fixes: 298fac4f4b96 ("clk: samsung: Implement automatic clock gating mode for CMUs")
> > > Signed-off-by: André Draszik <andre.draszik@linaro.org>
> > > ---
> > >  drivers/clk/samsung/clk.c | 92 +++++++++++++++++++++++++++++++++++------------
> > >  drivers/clk/samsung/clk.h |  2 ++
> > >  2 files changed, 71 insertions(+), 23 deletions(-)
> > > 
> > > diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c
> > > index 9f68f079fd552f8dfb6898dbfb47dec0e84c626c..6515df81fcbc79b90f5262843e67575f6a4e0dda 100644
> > > --- a/drivers/clk/samsung/clk.c
> > > +++ b/drivers/clk/samsung/clk.c
> > > @@ -9,11 +9,13 @@
> > >   */
> > >  
> > >  #include <linux/slab.h>
> > > +#include <linux/clk.h>
> > >  #include <linux/clkdev.h>
> > >  #include <linux/clk-provider.h>
> > >  #include <linux/io.h>
> > >  #include <linux/mfd/syscon.h>
> > >  #include <linux/mod_devicetable.h>
> > > +#include <linux/of.h>
> > >  #include <linux/of_address.h>
> > >  #include <linux/regmap.h>
> > >  #include <linux/syscore_ops.h>
> > > @@ -489,6 +491,50 @@ void __init samsung_cmu_register_clocks(struct samsung_clk_provider *ctx,
> > >  		samsung_clk_register_cpu(ctx, cmu->cpu_clks, cmu->nr_cpu_clks);
> > >  }
> > >  
> > > +static int samsung_get_sysreg_regmap(struct device_node *np,
> > > +				     struct samsung_clk_provider *ctx)
> > > +{
> > > +	struct device_node *sysreg_np;
> > > +	struct clk *sysreg_clk;
> > > +	struct regmap *regmap;
> > > +	int ret;
> > > +
> > > +	sysreg_np = of_parse_phandle(np, "samsung,sysreg", 0);
> > > +	if (!sysreg_np)
> > > +		return -ENODEV;
> > > +
> > > +	sysreg_clk = of_clk_get(sysreg_np, 0);
> > 
> > I don't think you should be poking clock of some other device. This
> > clearly breaks encapsulation. What sysreg is needs to do to access
> > registers, is only business of sysreg. No other drivers should
> > re-implement this.
> 
> Similarly, to how other drivers (like UFS and peric/USI) also poke in
> the sysreg region in a similar way, the CMU related parts of sysreg are
> handled in this driver, though, as only the CMU driver knows how to
> configure them based on the gating (auto vs. manual).
> 
> No separate driver was sysreg was added when this code was introduced.
> The clk_get() used to be part of syscon_regmap_lookup_by_phandle(), and
> I chose to keep only that, as per above.
> 
> I propose to add an actual sysreg driver once the need arises, then
> this can also move, but for now keeping it here seems straight forward.
> 
> Is that OK with you?

Forgot to say, I can of course remove all clock related code (clk_get() etc).

What do you think? Is that acceptable?


CHeers,
Andre'

Re: (subset) [PATCH 0/3] clk: samsung: auto clock gating fixes for PM

[Krzysztof Kozlowski]

On Fri, 09 Jan 2026 17:27:22 +0000, André Draszik wrote:
> The attached patches fix issues when CMUs have PM enabled and also a
> needless warning message on older Exynos platforms relating to
> automatic clock gating as reported by Marek.
> 
> Without these it's impossible to enable PM for a CMU when automatic
> clock gating is also enabled. While currently no platform uses both,
> patches to enable PM on gs101 are in the works but things stopped
> working after the auto clock gating changes. I've verified that with
> the patches here PM and runtime PM work again.
> 
> [...]

Applied, thanks!



Best regards,
-- 
Krzysztof Kozlowski <krzk@kernel.org>

Re: [PATCH 0/3] clk: samsung: auto clock gating fixes for PM

[Krzysztof Kozlowski]

On 09/01/2026 18:27, André Draszik wrote:
> Hi,
> 
> The attached patches fix issues when CMUs have PM enabled and also a
> needless warning message on older Exynos platforms relating to
> automatic clock gating as reported by Marek.
> 
> Without these it's impossible to enable PM for a CMU when automatic
> clock gating is also enabled. While currently no platform uses both,
> patches to enable PM on gs101 are in the works but things stopped
> working after the auto clock gating changes. I've verified that with
> the patches here PM and runtime PM work again.
> 
> I've opted to add Fixes: tags to the PM-related patches even though no
> current platform uses both, auto clock gating and PM, to ensure the
> code is correct nevertheless. Please let me know if that's not desired.
> 
> Cheers,
> Andre'
> 
> Signed-off-by: André Draszik <andre.draszik@linaro.org>
> ---

Here I got also not a correct b4 TY letter, so confirming - applied only
#1 and #2. For the 3/3 I left comment.

Best regards,
Krzysztof