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From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: Krzysztof Kozlowski <krzk@kernel.org>,
	Jianjun Wang <jianjun.wang@mediatek.com>,
	Chunfeng Yun <chunfeng.yun@mediatek.com>,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Chen-Yu Tsai <wenst@chromium.org>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org,
	 linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, rex-bc.chen@mediatek.com,
	randy.wu@mediatek.com, jieyy.yang@mediatek.com,
	chuanjia.liu@mediatek.com, qizhong.cheng@mediatek.com,
	jian.yang@mediatek.com
Subject: Re: [PATCH v2 1/2] dt-bindings: phy: mediatek: Add YAML schema for PCIe PHY
Date: Fri, 18 Mar 2022 14:56:23 +0100	[thread overview]
Message-ID: <e0adbb4d-aa87-49ea-d79f-11c5f4fc4bdd@collabora.com> (raw)
In-Reply-To: <319cf016-55fb-dcd4-9157-ad795c8e68ff@kernel.org>

Il 18/03/22 14:51, Krzysztof Kozlowski ha scritto:
> On 18/03/2022 12:12, AngeloGioacchino Del Regno wrote:
>> Il 18/03/22 10:54, Jianjun Wang ha scritto:
>>> Add YAML schema documentation for PCIe PHY on MediaTek chipsets.
>>>
>>> Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
>>> ---
>>>    .../bindings/phy/mediatek,pcie-phy.yaml       | 75 +++++++++++++++++++
>>>    1 file changed, 75 insertions(+)
>>>    create mode 100644 Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml
>>>
>>> diff --git a/Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml
>>> new file mode 100644
>>> index 000000000000..868bf976568b
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/phy/mediatek,pcie-phy.yaml
>>> @@ -0,0 +1,75 @@
>>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/phy/mediatek,pcie-phy.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: MediaTek PCIe PHY
>>> +
>>> +maintainers:
>>> +  - Jianjun Wang <jianjun.wang@mediatek.com>
>>> +
>>> +description: |
>>> +  The PCIe PHY supports physical layer functionality for PCIe Gen3 port.
>>> +
>>> +properties:
>>> +  compatible:
>>> +    const: mediatek,mt8195-pcie-phy
>>
>> Since I don't expect this driver to be only for MT8195, but to be extended to
>> support some more future MediaTek SoCs and, depending on the number of differences
>> in the possible future Gen4 PHYs, even different gen's, I propose to add a generic
>> compatible as const.
>>
>> So you'll have something like:
>>
>> - enum:
>>       - mediatek,mt8195-pcie-phy
>> - const: mediatek,pcie-gen3-phy
> 
> I am not sure if this is a good idea. How sure are you that there will
> be no different PCIe Gen3 PHY not compatible with this one?
> 
> 

Thanks for pointing that out, I have underestimated this option.

Perhaps Jianjun may be more informed about whether my proposal is valid or not.

Cheers,
Angelo

> Best regards,
> Krzysztof



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  reply	other threads:[~2022-03-18 13:57 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-18  9:54 [PATCH v2 0/2] phy: mediatek: Add PCIe PHY driver Jianjun Wang
2022-03-18  9:54 ` [PATCH v2 1/2] dt-bindings: phy: mediatek: Add YAML schema for PCIe PHY Jianjun Wang
2022-03-18 11:12   ` AngeloGioacchino Del Regno
2022-03-18 13:51     ` Krzysztof Kozlowski
2022-03-18 13:56       ` AngeloGioacchino Del Regno [this message]
2022-03-18 14:43         ` Jianjun Wang
2022-03-21  4:24         ` Chen-Yu Tsai
2022-03-18 13:55   ` Krzysztof Kozlowski
2022-03-18 14:45     ` Jianjun Wang
2022-03-18  9:54 ` [PATCH v2 2/2] phy: mediatek: Add PCIe PHY driver Jianjun Wang
2022-03-18  9:59   ` Chen-Yu Tsai
2022-03-18 10:57   ` AngeloGioacchino Del Regno
2022-03-18 11:48     ` Jianjun Wang

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