From: Jinjie Ruan <ruanjinjie@huawei.com>
To: Mark Rutland <mark.rutland@arm.com>,
<linux-arm-kernel@lists.infradead.org>
Cc: vladimir.murzin@arm.com, peterz@infradead.org, maz@kernel.org,
hca@linux.ibm.com, linux-kernel@vger.kernel.org,
yang@os.amperecomputing.com, catalin.marinas@arm.com,
will@kernel.org, ardb@kernel.org
Subject: Re: [RFC PATCH 04/13] arm64: percpu: Factor out percpu offset asm
Date: Wed, 29 Jul 2026 12:03:37 +0800 [thread overview]
Message-ID: <e2486a36-c582-4dd5-9f9b-dc5dad030e0e@huawei.com> (raw)
In-Reply-To: <20260728123859.2911495-5-mark.rutland@arm.com>
在 2026/7/28 20:38, Mark Rutland 写道:
> Depending on whether the kernel runs at EL1 or EL2, the percpu offset is
> stored in either TPIDR_EL1 or TPIDR_EL2, and __kern_my_cpu_offset() uses
> an ALTERNATIVE() sequence to read the relevant TPIDR_ELx.
>
> In subsequent patches we'll need to read the percpu offset in other
> assembly sequences. Factor the ALTERNATIVE sequence out of
> __kern_my_cpu_offset() into a new __KERN_ASM_CPU_OFFSET() macro so that
> we can share the code sequence.
Reviewed-by: Jinjie Ruan <ruanjinjie@huawei.com>
>
> There should be no functional change as a result of this patch.
>
> Signed-off-by: Mark Rutland <mark.rutland@arm.com>
> Cc: Ada Couprie Diaz <ada.coupriediaz@arm.com>
> Cc: Ard Biesheuvel <ardb@kernel.org>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Jinjie Ruan <ruanjinjie@huawei.com>
> Cc: Marc Zyngier <maz@kernel.org>
> Cc: Peter Zijlstra <peterz@infradead.org>
> Cc: Vladimir Murzin <vladimir.murzin@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: Yang Shi <yang@os.amperecomputing.com>
> ---
> arch/arm64/include/asm/percpu.h | 15 ++++++++++-----
> 1 file changed, 10 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm64/include/asm/percpu.h b/arch/arm64/include/asm/percpu.h
> index b57b2bb009677..98823c97d534c 100644
> --- a/arch/arm64/include/asm/percpu.h
> +++ b/arch/arm64/include/asm/percpu.h
> @@ -29,6 +29,11 @@ static inline unsigned long __hyp_my_cpu_offset(void)
> return read_sysreg(tpidr_el2);
> }
>
> +#define __KERN_ASM_CPU_OFFSET(dst) \
> + ALTERNATIVE("mrs " dst ", tpidr_el1", \
> + "mrs " dst ", tpidr_el2", \
> + ARM64_HAS_VIRT_HOST_EXTN)
> +
> static inline unsigned long __kern_my_cpu_offset(void)
> {
> unsigned long off;
> @@ -37,11 +42,11 @@ static inline unsigned long __kern_my_cpu_offset(void)
> * We want to allow caching the value, so avoid using volatile and
> * instead use a fake stack read to hazard against barrier().
> */
> - asm(ALTERNATIVE("mrs %0, tpidr_el1",
> - "mrs %0, tpidr_el2",
> - ARM64_HAS_VIRT_HOST_EXTN)
> - : "=r" (off) :
> - "Q" (*(const unsigned long *)current_stack_pointer));
> + asm(
> + __KERN_ASM_CPU_OFFSET("%0")
> + : "=r" (off)
> + : "Q" (*(const unsigned long *)current_stack_pointer)
> + );
>
> return off;
> }
next prev parent reply other threads:[~2026-07-29 4:03 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-28 12:38 [RFC PATCH 00/13] arm64: Preemptible this_cpu_*() operations Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 01/13] arm64: preempt: Simplify and optimize __preempt_count_dec_and_test() Mark Rutland
2026-07-29 3:56 ` Jinjie Ruan
2026-07-28 12:38 ` [RFC PATCH 02/13] arm64: preempt: Treat should_resched() as unlikely Mark Rutland
2026-07-29 4:00 ` Jinjie Ruan
2026-07-28 12:38 ` [RFC PATCH 03/13] arm64: ptrace: Always inline pt_regs_[read,write}_reg() Mark Rutland
2026-07-29 4:02 ` Jinjie Ruan
2026-07-28 12:38 ` [RFC PATCH 04/13] arm64: percpu: Factor out percpu offset asm Mark Rutland
2026-07-29 4:03 ` Jinjie Ruan [this message]
2026-07-28 12:38 ` [RFC PATCH 05/13] arm64: gpr-num: Add wxN aliases for wN registers Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 06/13] arm64: percpu: Add infrastructure for preemptible this_cpu_*() ops Mark Rutland
2026-07-28 14:19 ` Peter Zijlstra
2026-07-28 14:30 ` Peter Zijlstra
2026-07-28 16:03 ` Mark Rutland
2026-07-28 16:49 ` Peter Zijlstra
2026-07-28 15:53 ` Mark Rutland
2026-07-28 16:46 ` Peter Zijlstra
2026-07-28 16:49 ` Peter Zijlstra
2026-07-28 16:51 ` Heiko Carstens
2026-07-29 8:16 ` Heiko Carstens
2026-07-28 12:38 ` [RFC PATCH 07/13] arm64: percpu: Implement preemptible read/write ops Mark Rutland
2026-07-28 21:47 ` David Laight
2026-07-28 22:05 ` David Laight
2026-07-28 12:38 ` [RFC PATCH 08/13] arm64: percpu: Implement preemptible void RMW ops Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 09/13] arm64: percpu: Implement preemptible return " Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 10/13] arm64: percpu: Implement preemptible XCHG ops Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 11/13] arm64: percpu: Implement preemptible CMPXCHG ops Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 12/13] arm64: percpu: Implement preemptible CMPXCHG128 ops Mark Rutland
2026-07-28 12:38 ` [RFC PATCH 13/13] arm64: percpu: Remove _pcp_protect*() wrappers Mark Rutland
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=e2486a36-c582-4dd5-9f9b-dc5dad030e0e@huawei.com \
--to=ruanjinjie@huawei.com \
--cc=ardb@kernel.org \
--cc=catalin.marinas@arm.com \
--cc=hca@linux.ibm.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=maz@kernel.org \
--cc=peterz@infradead.org \
--cc=vladimir.murzin@arm.com \
--cc=will@kernel.org \
--cc=yang@os.amperecomputing.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox