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Wed, 20 Jan 2021 14:50:37 -0600 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Wed, 20 Jan 2021 14:50:37 -0600 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Wed, 20 Jan 2021 14:50:37 -0600 Received: from [10.250.35.71] (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 10KKoadD058607; Wed, 20 Jan 2021 14:50:36 -0600 Subject: Re: [PATCH v3 2/5] dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM64 To: Dave Gerlach , Nishanth Menon References: <20210120202532.9011-1-d-gerlach@ti.com> <20210120202532.9011-3-d-gerlach@ti.com> From: Suman Anna Message-ID: Date: Wed, 20 Jan 2021 14:50:36 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210120202532.9011-3-d-gerlach@ti.com> Content-Language: en-US X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210120_155043_761268_B82466F1 X-CRM114-Status: GOOD ( 19.24 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Vignesh Raghavendra , Tony Lindgren , Sekhar Nori , Kishon Vijay Abraham , Lokesh Vutla , Rob Herring , Aswath Govindraju , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 1/20/21 2:25 PM, Dave Gerlach wrote: > Add pinctrl macros for AM64 SoC. These macro definitions are similar to > that of previous platforms, but adding new definitions to avoid any > naming confusions in the soc dts files. > > Unlike what checkpatch insists, we do not need parentheses enclosing > the values for this macro as we do intend it to generate two separate > values as has been done for other similar platforms. > > Signed-off-by: Dave Gerlach Reviewed-by: Suman Anna > --- > include/dt-bindings/pinctrl/k3.h | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/include/dt-bindings/pinctrl/k3.h b/include/dt-bindings/pinctrl/k3.h > index b0eea7cc6e23..e085f102b283 100644 > --- a/include/dt-bindings/pinctrl/k3.h > +++ b/include/dt-bindings/pinctrl/k3.h > @@ -3,7 +3,7 @@ > * This header provides constants for pinctrl bindings for TI's K3 SoC > * family. > * > - * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ > + * Copyright (C) 2018-2021 Texas Instruments Incorporated - https://www.ti.com/ > */ > #ifndef _DT_BINDINGS_PINCTRL_TI_K3_H > #define _DT_BINDINGS_PINCTRL_TI_K3_H > @@ -35,4 +35,7 @@ > #define J721E_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) > #define J721E_WKUP_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) > > +#define AM64X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) > +#define AM64X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) > + > #endif > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel