Re: [PATCH] arm64: ls1046ardb: Replace XGMII with 10GBASE-R phy mode

From: Sean Anderson <sean.anderson@seco.com>
To: Vladimir Oltean <vladimir.oltean@nxp.com>
Cc: zachary.goldstein@concurrent-rt.com,
	Shawn Guo <shawnguo@kernel.org>,
	Madalin Bucur <madalin.bucur@nxp.com>,
	Li Yang <leoyang.li@nxp.com>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>, Andrew Lunn <andrew@lunn.ch>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Russell King <linux@armlinux.org.uk>,
	"David S. Miller" <davem@davemloft.net>,
	Eric Dumazet <edumazet@google.com>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, netdev@vger.kernel.org
Subject: Re: [PATCH] arm64: ls1046ardb: Replace XGMII with 10GBASE-R phy mode
Date: Tue, 20 Feb 2024 17:52:36 -0500	[thread overview]
Message-ID: <e39c811e-ad9d-4e90-8710-629b822944e0@seco.com> (raw)
In-Reply-To: <20240220223706.o7wc5r57omkmgtgh@skbuf>

On 2/20/24 17:37, Vladimir Oltean wrote:
> On Tue, Feb 20, 2024 at 02:12:52PM -0500, Sean Anderson wrote:
>> On 2/20/24 09:50, Vladimir Oltean wrote:
>> > Notice that unlike fm1-mac10 (node "ethernet@f2000"), there is no
>> > pcs-handle-names property (fm1-mac10 has it defined in fsl-ls1046-post.dtsi,
>> > whereas fm1-mac9 doesn't. Don't ask me why, I don't know....)
>>
>> I think this is just because this ethernet is always XFI and never (Q)SGMII.
>
> Is that so? With SerDes protocol 0x3333, won't the PCS that's connected
> to fm1-mac9 use SGMII/1000BASE-X (thus not 10GBASE-R)?

Yeah, so I guess it just can't be QSGMII.

> And as for QSGMII, what's the relevance of that? You can't have one
> device tree good for all SerDes protocols and RCW pinmuxing options.

The goal is for the "generic" includes to be generic. So the board-specific
stuff lives in the board-specific device tree source. And the only thing
board-specific is the phy interface, since the drivers can figure out
the rest.

> Either there are 4 MACs aggregated onto a single lane, or there is one
> MAC per lane, but I've never encountered any use case for alternating
> between these 2 configurations at runtime, or with same device tree for
> that matter, have you? QSGMII seems to have been the original motivation
> for listing all possible PCSes of a MAC in pcs-handle-names, but again, why?

With SGMII and XFI, the PCS sits on the MAC's MDIO bus. So for SGMII and
XFI if we don't have any labels we can just assume the PCS handle is for
the right PCS. But for QSGMII the PCSs sit on another MAC's MDIO bus. So
we need to tell the MAC where to find the PCS. This means we need to
supply multiple PCSs to the MAC, and thus we need names to differentiate
them. Since MAC9 doesn't have QSGMII, I suppose I never bothered to add
names.

--Sean

[Embedded World 2024, SECO SpA]<https://www.messe-ticket.de/Nuernberg/embeddedworld2024/Register/ew24517689>

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