From: Mark Brown <broonie@kernel.org>
To: Marc Zyngier <maz@kernel.org>
Cc: Oliver Upton <oupton@kernel.org>,
Fuad Tabba <fuad.tabba@linux.dev>,
Joey Gouly <joey.gouly@arm.com>,
Steffen Eiden <seiden@linux.ibm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] KVM: arm64: Enable S1PIE for hVHE
Date: Wed, 9 Sep 2026 13:17:33 +0100 [thread overview]
Message-ID: <e3c716c2-66ef-4dd0-bcae-6df4ff814e48@sirena.org.uk> (raw)
In-Reply-To: <861pb24v45.wl-maz@kernel.org>
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On Wed, Sep 09, 2026 at 10:44:26AM +0100, Marc Zyngier wrote:
> Mark Brown <broonie@kernel.org> wrote:
> > hVHE. Enable FEAT_S1PIE with hVHE only, hVHE is used for protected VMs
> > but there is no real use case for nVHE mode on hardware with this
> > feature.
> That's not the reason. The reason is that there is no nVHE-only
> hardware with PIE, and that on VHE-capable HW, nVHE and hVHE are
> strictly equivalent. Therefore there is no need to add support for HW
> that does not exist.
Right, that's the reason why there is no real use case for nVHE on this
hardware - even where S1PIE capable hardware can run nVHE there is
always a preferable mode that delivers the same functionality. I'll
make this more explicit.
> > This should have no practical impact other than causing any unexpected
> > encodings to map to no permissions instead of their default
> > meanings.
> What default meanings?
The meanings that are defined when S1PIE is not enabled. I will make
this more explicit, or given your comments further down about not
sharing code possibly just renumber so it's not a thing any more.
> > +#define KVM_HYP_PIR_IDX(uxn, pxn, dbm, ap1) (((uxn) << 3) | ((pxn) << 2) | \
> > + ((dbm) << 1) | (ap1))
> > +
> This is not what these bits are called. They are just PIIndex[] bits.
I was trying to make it easier to map thing between non-S1PIE and S1PIE
encodings, I'll rename and add a comment to help people follow when
updating.
> > +alternative_if ARM64_HAS_S1PIE
> > + /* S1PIE is only enabled with TCR2_EL2.PIE if we are running hVHE */
> > + mov_q x1, KVM_HVHE_PIR_EL2
> > + msr REG_PIR_EL2, x1
> > + msr REG_PIRE0_EL2, xzr
> > +alternative_else_nop_endif
> > +alternative_if ARM64_HAS_TCR2
> > + ldr x1, [x0, #NVHE_INIT_TCR2_EL2]
> > + msr REG_TCR2_EL2, x1
> > +alternative_else_nop_endif
> S1PIE implies TCR2. Why the additional alternatives?
That is true but TCR2 does not imply S1PIE, I wrote things this way so
that TCR2 is initialised even if we end up on a system where that is
present but S1PIE is not (or S1PIE is present but has been disabled by a
command line override). This is during startup so it seemed reasonable
to write things in a straightforward and easy to read fashion.
> TBH, I think this is completely going the wrong way. Why can't we
> write this as a discrete enumeration of the permission combination we
> support (all 3 of them), and map that to the correct index?
I was deliberately following a similar pattern to that used for the host
kernel, intended to minimise code changes. I will rework so we have an
alternative path for S1PIE rather than trying to share.
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next prev parent reply other threads:[~2026-09-09 12:17 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-08 19:40 [PATCH v2] KVM: arm64: Enable S1PIE for hVHE Mark Brown
2026-09-09 9:44 ` Marc Zyngier
2026-09-09 12:17 ` Mark Brown [this message]
2026-09-09 14:29 ` Marc Zyngier
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