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Wed, 4 Nov 2020 12:18:06 +0900 (KST) Received: from [10.113.111.64] (unknown [10.113.111.64]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20201104031806epsmtip1dcf07a6a3f0d156db0931ffac3f6422f~EL8QZO_QG0625306253epsmtip16; Wed, 4 Nov 2020 03:18:06 +0000 (GMT) Subject: Re: [PATCH v2 7/7] drm/vc4: kms: Don't disable the muxing of an active CRTC To: Maxime Ripard , Mark Rutland , Rob Herring , Frank Rowand , Daniel Vetter , David Airlie , Maarten Lankhorst , Thomas Zimmermann , Eric Anholt From: Hoegeun Kwon Message-ID: Date: Wed, 4 Nov 2020 12:17:27 +0900 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <469ead5de989938fcf079505cbc232a620e713bc.1603888799.git-series.maxime@cerno.tech> Content-Language: en-US X-Brightmail-Tracker: H4sIAAAAAAAAA01TfVRTZRz2vbu7GxZ5G6jvQdOx0A7EYBccXDyAihy7FhmdOp5EO3PAFTiM be0O8oOTk0K+lfkRbQYIiDuHY0Ab3+WJQBQqRhbBCcOl4AfEQlE+Ioq2XTzx3/N7f8/zPu/z e8+PzxHoeF78FKWW1ijlChG2Em3q9BWLVS9VyiQPy9eRRdYehPyiqAslTT/Uckh7aRVKll+z csn+6UmMbD/xMyANE4sYOWnKx0jzyACX1N+q55EVjxtRsnrwJkJ+NvcvIGuH/sDI7KvXeOTd 8zZANkzoudsFVNbkdYy6UnYFUEZbL0b9Zu3DqFbjMI+q+noMocw1eRjVPPM7lyrreZuyFdxA KMul41R21zxKnWqoAZTl+2PUE/OG2FVxqeHJtDyR1ghpZYIqMUWZFCF64x3ZTpk0REKIiTAy VCRUytPoCFF0TKx4V4rCEVYkzJAr0h1HsXKGEQVGhmtU6VpamKxitBEiWp2oUIepAxh5GpOu TApIUKVtJSSSIKmDeDA1+XL+I666jzg83NvJ0YHyV/KBGx/iW+BPCzUgH6zkC/AWAHVdFoQt pgA8rS/hssUMgJfni8Azid5WjzqxAL8KYMvCLpZkBzDXUIk4Gx74Xlg90o05G574KAIvjTxx mXBwGwLbegY5ThaGi+F04aBL4Y5HQmvdY8yJUdwHFj/tddmtxvfB1ntjPJbzIuwxjLqs3XAZ nLvX7dJy8I2w2f45h8Vr4dBouSsExE1u0J63uPTuaDh9u4nHYg84fqNhCXvBsdMnlzAD+w3j KCvWOSdwYakRDL+pPuu4le9w8IV1bYHssTds/bsUsMYvwD+nC7lOCsTdYe5JAUvZDO/r2rks Xg+/KzIhLKbgL1lZaDHwNi6LZlwWx7gsjvF/44sArQFraDWTlkQzhJpY/t9m4FoFP2kL0Nsf BXQAhA86AORzRJ7umfvKZAL3RPmRo7RGJdOkK2imA0gdw9ZzvFYnqBy7pNTKCGlQcHAwuYUI kRKEaK37wqu5MgGeJNfSqTStpjXPdAjfzUuH7NDi7fj9sZw8XcyXJW89tVQ0HjBpVnhn75/N zDxapdAUDUR6xZjW1zGyksh3w/0+9PHbM/d86QQFP+nv/GuD/2zY1rvlpRVB1+vObIKTbXuK a3cftGbQd5o1U/bt8JjnhYeENWrM80xgy0zoe5WHd0StiouJ76ooiEuzde89f67v7Oyhm7t7 ZyXJMdtydMH++Zslhcb4YVkI+XLUa6P/PPAwmy7eZlYYan2YecvHTbJxy6YdH8RbPhK27Sx8 veCBOsV/G2qcE3v6qtZ0CO/c2m9tPQdDj/sORBmeIw4xR3K+zS0dMK9THZBHjzdW1r8/HXJi yrRx6Mekr978NKDQP2Nx7lcRyiTLCT+OhpH/B/S5QlqTBAAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrHIsWRmVeSWpSXmKPExsWy7bCSnG6e7KJ4g/5r+ha9504yWaztPcpi sfzMOmaLt3MXs1jMP3KO1eLK1/dsFgcaLzNazHzzn83i/fIuNotNj6+xWky8vYHdYuHHrSwW S69fZLKY8eMfo8W6W6/ZLFr3HmG3eDT1PqPFljcTWR2EPJreH2PzWDNvDaPHrPtn2TzunDvP 5rFz1l12j8V7XjJ5bFrVyeax/dsDVo95JwM97ncfZ/LYvKTeo/XoLxaPvi2rGD02n672+LxJ LoA/issmJTUnsyy1SN8ugStjWdcH1oLzhhV3zx5mbmCcr97FyMkhIWAiMfH+BpYuRi4OIYHd jBLT921ng0jISKzq38LaxcgBZAtLHD5cDFHzmlHi9Y6/TCA1wgJhEksfn2ADSYgIPGGSmHXu CZjDLHCfSeLOy9VsEC29TBJ7dkxlB2lhE9CV+NpzHaydV8BO4tz6j2DrWARUJCZ8OcsIsk5U IFJi5w5LiBJBiZMzn7CA2JwC8RI/np4Aa2UWMJOYt/khM4QtL7H97RwoW1zi1pP5TBMYhWYh aZ+FpGUWkpZZSFoWMLKsYpRMLSjOTc8tNiwwzEst1ytOzC0uzUvXS87P3cQITgJamjsYt6/6 oHeIkYmD8RCjBAezkghvTeS8eCHelMTKqtSi/Pii0pzU4kOM0hwsSuK8NwoXxgkJpCeWpGan phakFsFkmTg4pRqYJL9JGS+ZoyuWE77oS4OKiktkUfDRkMnZ9g/srro4fIlNZTM717utM/po sWNDrqKS7vZLFff23zn3c9Hlxm9HTvJIBB7aeZBt3rxs8daw/lzLqLsKyo17fs47dWDB9JU7 fX5m+57p8eHfrSER+ks+k3lKxPWfu8NPtucbHwo8HPqE81Nb8VI7vluBFcdMFovprfh+fP90 jiybFUr3714tO6Z+OVFef4FyeeEEBrN/OUapFms/nf31snp3VkaF2O4dazw2l3KG7Nlsszjq xO+fp+a92nEtMLOka9rVi2q89wJM/e7uXZ/zfWXPi3lbnROun/Y/v2pH3+HZd+SulgrrhPbk XHmudkI1+yj7v5q2ViWW4oxEQy3mouJEAF1597JxAwAA X-CMS-MailID: 20201104031806epcas1p2cc512545d5dac02382bf999ae6731718 X-Msg-Generator: CA X-Sendblock-Type: SVC_REQ_APPROVE CMS-TYPE: 101P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20201029081313epcas1p165edbd0c8e54d978a8130f5fb9d2a422 References: <469ead5de989938fcf079505cbc232a620e713bc.1603888799.git-series.maxime@cerno.tech> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201103_221818_030403_359E4A17 X-CRM114-Status: GOOD ( 36.68 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Tim Gover , Dave Stevenson , dri-devel@lists.freedesktop.org, Hoegeun Kwon , bcm-kernel-feedback-list@broadcom.com, linux-rpi-kernel@lists.infradead.org, Phil Elwell , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Maxime, On 10/28/20 9:41 PM, Maxime Ripard wrote: > The current HVS muxing code will consider the CRTCs in a given state to > setup their muxing in the HVS, and disable the other CRTCs muxes. > > However, it's valid to only update a single CRTC with a state, and in this > situation we would mux out a CRTC that was enabled but left untouched by > the new state. > > Fix this by setting a flag on the CRTC state when the muxing has been > changed, and only change the muxing configuration when that flag is there. > > Fixes: 87ebcd42fb7b ("drm/vc4: crtc: Assign output to channel automatically") > Signed-off-by: Maxime Ripard I checked all patches well works. All patches: Reviewed-by: Hoegeun Kwon Tested-by: Hoegeun Kwon Best regards, Hoegeun > --- > drivers/gpu/drm/vc4/vc4_drv.h | 1 +- > drivers/gpu/drm/vc4/vc4_kms.c | 84 +++++++++++++++++++++--------------- > 2 files changed, 50 insertions(+), 35 deletions(-) > > diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h > index c6208b040f77..c074c0538e57 100644 > --- a/drivers/gpu/drm/vc4/vc4_drv.h > +++ b/drivers/gpu/drm/vc4/vc4_drv.h > @@ -523,6 +523,7 @@ struct vc4_crtc_state { > struct drm_mm_node mm; > bool feed_txp; > bool txp_armed; > + bool needs_muxing; > unsigned int assigned_channel; > > struct { > diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c > index 2aa726b7422c..409aeb19d210 100644 > --- a/drivers/gpu/drm/vc4/vc4_kms.c > +++ b/drivers/gpu/drm/vc4/vc4_kms.c > @@ -224,10 +224,7 @@ static void vc5_hvs_pv_muxing_commit(struct vc4_dev *vc4, > { > struct drm_crtc_state *crtc_state; > struct drm_crtc *crtc; > - unsigned char dsp2_mux = 0; > - unsigned char dsp3_mux = 3; > - unsigned char dsp4_mux = 3; > - unsigned char dsp5_mux = 3; > + unsigned char mux; > unsigned int i; > u32 reg; > > @@ -235,50 +232,59 @@ static void vc5_hvs_pv_muxing_commit(struct vc4_dev *vc4, > struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc_state); > struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); > > - if (!crtc_state->active) > + if (!vc4_state->needs_muxing) > continue; > > switch (vc4_crtc->data->hvs_output) { > case 2: > - dsp2_mux = (vc4_state->assigned_channel == 2) ? 0 : 1; > + mux = (vc4_state->assigned_channel == 2) ? 0 : 1; > + reg = HVS_READ(SCALER_DISPECTRL); > + HVS_WRITE(SCALER_DISPECTRL, > + (reg & ~SCALER_DISPECTRL_DSP2_MUX_MASK) | > + VC4_SET_FIELD(mux, SCALER_DISPECTRL_DSP2_MUX)); > break; > > case 3: > - dsp3_mux = vc4_state->assigned_channel; > + if (vc4_state->assigned_channel == VC4_HVS_CHANNEL_DISABLED) > + mux = 3; > + else > + mux = vc4_state->assigned_channel; > + > + reg = HVS_READ(SCALER_DISPCTRL); > + HVS_WRITE(SCALER_DISPCTRL, > + (reg & ~SCALER_DISPCTRL_DSP3_MUX_MASK) | > + VC4_SET_FIELD(mux, SCALER_DISPCTRL_DSP3_MUX)); > break; > > case 4: > - dsp4_mux = vc4_state->assigned_channel; > + if (vc4_state->assigned_channel == VC4_HVS_CHANNEL_DISABLED) > + mux = 3; > + else > + mux = vc4_state->assigned_channel; > + > + reg = HVS_READ(SCALER_DISPEOLN); > + HVS_WRITE(SCALER_DISPEOLN, > + (reg & ~SCALER_DISPEOLN_DSP4_MUX_MASK) | > + VC4_SET_FIELD(mux, SCALER_DISPEOLN_DSP4_MUX)); > + > break; > > case 5: > - dsp5_mux = vc4_state->assigned_channel; > + if (vc4_state->assigned_channel == VC4_HVS_CHANNEL_DISABLED) > + mux = 3; > + else > + mux = vc4_state->assigned_channel; > + > + reg = HVS_READ(SCALER_DISPDITHER); > + HVS_WRITE(SCALER_DISPDITHER, > + (reg & ~SCALER_DISPDITHER_DSP5_MUX_MASK) | > + VC4_SET_FIELD(mux, SCALER_DISPDITHER_DSP5_MUX)); > break; > > default: > break; > } > } > - > - reg = HVS_READ(SCALER_DISPECTRL); > - HVS_WRITE(SCALER_DISPECTRL, > - (reg & ~SCALER_DISPECTRL_DSP2_MUX_MASK) | > - VC4_SET_FIELD(dsp2_mux, SCALER_DISPECTRL_DSP2_MUX)); > - > - reg = HVS_READ(SCALER_DISPCTRL); > - HVS_WRITE(SCALER_DISPCTRL, > - (reg & ~SCALER_DISPCTRL_DSP3_MUX_MASK) | > - VC4_SET_FIELD(dsp3_mux, SCALER_DISPCTRL_DSP3_MUX)); > - > - reg = HVS_READ(SCALER_DISPEOLN); > - HVS_WRITE(SCALER_DISPEOLN, > - (reg & ~SCALER_DISPEOLN_DSP4_MUX_MASK) | > - VC4_SET_FIELD(dsp4_mux, SCALER_DISPEOLN_DSP4_MUX)); > - > - reg = HVS_READ(SCALER_DISPDITHER); > - HVS_WRITE(SCALER_DISPDITHER, > - (reg & ~SCALER_DISPDITHER_DSP5_MUX_MASK) | > - VC4_SET_FIELD(dsp5_mux, SCALER_DISPDITHER_DSP5_MUX)); > } > > static void > @@ -769,21 +775,29 @@ static int vc4_pv_muxing_atomic_check(struct drm_device *dev, > return -EINVAL; > > for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { > + struct vc4_crtc_state *old_vc4_crtc_state = > + to_vc4_crtc_state(old_crtc_state); > struct vc4_crtc_state *new_vc4_crtc_state = > to_vc4_crtc_state(new_crtc_state); > struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); > unsigned int matching_channels; > > - if (old_crtc_state->enable && !new_crtc_state->enable) { > - hvs_state->unassigned_channels |= BIT(old_vc4_crtc_state->assigned_channel); > - new_vc4_crtc_state->assigned_channel = VC4_HVS_CHANNEL_DISABLED; > + /* Nothing to do here, let's skip it */ > + if ((old_crtc_state->enable && new_crtc_state->enable) || > + (!old_crtc_state->enable && !new_crtc_state->enable)) { > + new_vc4_crtc_state->needs_muxing = false; > + continue; > } > > - if (!new_crtc_state->enable) > - continue; > + /* Muxing will need to be modified, mark it as such */ > + new_vc4_crtc_state->needs_muxing = true; > > - if (new_vc4_crtc_state->assigned_channel != VC4_HVS_CHANNEL_DISABLED) > + /* If we're disabling our CRTC, we put back our channel */ > + if (old_crtc_state->enable && !new_crtc_state->enable) { > + hvs_state->unassigned_channels |= BIT(old_vc4_crtc_state->assigned_channel); > + new_vc4_crtc_state->assigned_channel = VC4_HVS_CHANNEL_DISABLED; > continue; > + } > > /* > * The problem we have to solve here is that we have _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel