From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 68F16C25B78 for ; Thu, 16 May 2024 13:56:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:References:Cc:To:From: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=o3jDqYn2O8D7ip1RjmP4IsYsbWzK2ID7bVFriMvlyOg=; b=pU7JV7qowhm02E yUsUmgYxEej1KQfzV7spiGl7O9Y/HQHIAxc0ZLuP4yiWJZnl0r1PA7S7NtBDn1Bi1n9J++d/E5NNl kZtI1yunllDo1VSDdnT+MHjMADR0TxDE2C6bFu8FWxhCb0KI6r8HeLemApoZuk6cS25+R/lRbFJf+ /MqQnHFAIhI6UHIh7poMmgCdSVHcLUvZLVFRwlO58+ZLPuJH86NRQt4b/SQP2biMBGokRD0CG0fCU avZg/eANUSgb5ikJRFE7VHtTp3cCk5wmM9vbDreQl0v9ltwuOzpqLE59/LwGOP2+pbm63cn9PDXIg RM2V4uieVa0VS5x4Xc4w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s7bay-000000054zU-48EJ; Thu, 16 May 2024 13:56:32 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1s7bav-000000054ye-16SM for linux-arm-kernel@lists.infradead.org; Thu, 16 May 2024 13:56:30 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 82BEDDA7; Thu, 16 May 2024 06:56:48 -0700 (PDT) Received: from [10.91.2.16] (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E147D3F7A6; Thu, 16 May 2024 06:56:21 -0700 (PDT) Message-ID: Date: Thu, 16 May 2024 15:56:26 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 2/3] coresight: Add reserve trace id support From: James Clark To: Mao Jinlong Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Tingwei Zhang , Yuanfang Zhang , Tao Zhang , songchai , Suzuki K Poulose , Mike Leach , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexander Shishkin References: <20240516025644.4383-1-quic_jinlmao@quicinc.com> <20240516025644.4383-3-quic_jinlmao@quicinc.com> <34e8c1b9-e351-46c9-abbc-2cef9d0a71db@arm.com> Content-Language: en-US In-Reply-To: <34e8c1b9-e351-46c9-abbc-2cef9d0a71db@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240516_065629_505339_E2DD9DD2 X-CRM114-Status: GOOD ( 25.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 16/05/2024 15:23, James Clark wrote: > > > On 16/05/2024 04:56, Mao Jinlong wrote: >> Dynamic trace id was introduced in coresight subsystem so trace id is >> allocated dynamically. However, some hardware ATB source has static trace >> id and it cannot be changed via software programming. Reserve trace id >> for this kind of hardware source. >> >> Signed-off-by: Mao Jinlong >> --- >> .../hwtracing/coresight/coresight-platform.c | 26 +++++++++++++++++++ >> .../hwtracing/coresight/coresight-trace-id.c | 24 +++++++++++++++++ >> .../hwtracing/coresight/coresight-trace-id.h | 11 ++++++++ >> include/linux/coresight.h | 1 + >> 4 files changed, 62 insertions(+) >> >> diff --git a/drivers/hwtracing/coresight/coresight-platform.c b/drivers/hwtracing/coresight/coresight-platform.c >> index 9d550f5697fa..d3e22a2608df 100644 >> --- a/drivers/hwtracing/coresight/coresight-platform.c >> +++ b/drivers/hwtracing/coresight/coresight-platform.c >> @@ -183,6 +183,17 @@ static int of_coresight_get_cpu(struct device *dev) >> return cpu; >> } >> >> +/* >> + * of_coresight_get_trace_id: Get the atid of a source device. >> + * >> + * Returns 0 on success. >> + */ >> +static int of_coresight_get_trace_id(struct device *dev, u32 *id) >> +{ >> + >> + return of_property_read_u32(dev->of_node, "trace-id", id); >> +} >> + >> /* >> * of_coresight_parse_endpoint : Parse the given output endpoint @ep >> * and fill the connection information in @pdata->out_conns >> @@ -315,6 +326,12 @@ static inline int of_coresight_get_cpu(struct device *dev) >> { >> return -ENODEV; >> } >> + >> +static int of_coresight_get_trace_id(struct device *dev, u32 *id) >> +{ >> + return -ENODEV; >> +} >> + >> #endif >> >> #ifdef CONFIG_ACPI >> @@ -794,6 +811,15 @@ int coresight_get_cpu(struct device *dev) >> } >> EXPORT_SYMBOL_GPL(coresight_get_cpu); >> >> +int coresight_get_trace_id(struct device *dev, u32 *id) >> +{ >> + if (!is_of_node(dev->fwnode)) >> + return -EINVAL; >> + >> + return of_coresight_get_trace_id(dev, id); Can we somehow make this function name distinct from the trace ID functions. It's a bit hard to read that it's called coresight_get_trace_id() but it doesn't actually get an ID from the existing trace ID stuff. >> +} >> +EXPORT_SYMBOL_GPL(coresight_get_trace_id); >> + >> struct coresight_platform_data * >> coresight_get_platform_data(struct device *dev) >> { >> diff --git a/drivers/hwtracing/coresight/coresight-trace-id.c b/drivers/hwtracing/coresight/coresight-trace-id.c >> index af5b4ef59cea..536a34e9de6f 100644 >> --- a/drivers/hwtracing/coresight/coresight-trace-id.c >> +++ b/drivers/hwtracing/coresight/coresight-trace-id.c >> @@ -110,6 +110,24 @@ static int coresight_trace_id_alloc_new_id(struct coresight_trace_id_map *id_map >> return id; >> } >> >> +static int coresight_trace_id_set(int id, struct coresight_trace_id_map *id_map) >> +{ >> + unsigned long flags; >> + >> + spin_lock_irqsave(&id_map_lock, flags); >> + >> + if (WARN(!IS_VALID_CS_TRACE_ID(id), "Invalid Trace ID %d\n", id)) >> + return -EINVAL; >> + if (WARN(test_bit(id, id_map->used_ids), "ID is already used: %d\n", id)) >> + return -EINVAL; > > Do these returns not skip unlocking the spinlock? > > It might be slightly fewer changes if we update the existing > coresight_trace_id_alloc_new_id() to add a new "only_preferred" option. > > Then use the existing system id allocator which already handles the lock > and unlock properly: > > static int coresight_trace_id_map_get_system_id(struct > coresight_trace_id_map *id_map, int id, > > bool only_preferred) > { > ... > spin_lock_irqsave(&id_map_lock, flags); > /* prefer odd IDs for system components to avoid legacy CPU IDS > id = coresight_trace_id_alloc_new_id(id_map, id, true, > only_preferred); > spin_unlock_irqrestore(&id_map_lock, flags); > ... > > I suppose the end result is the same as your implementation, but it > trades making one existing function slightly more complicated instead of > adding some new ones. It's also not that obvious that there is the new reserve function, but you still free the ID with the same coresight_trace_id_put_system_id(). Another benefit of adding arguments to the existing functions is that we keep just ...get...() and ...put...(). 'Reserve' implies some other new mechanism, but it's really a normal get. I think we should do one of these two options for the top level API: #1 (when id != 0, then it's an "only preferred" preferred ID: coresight_trace_id_get_system_id(int id) coresight_trace_id_put_system_id(int id) #2 coresight_trace_id_get_system_id() coresight_trace_id_get_system_id_resrv(int id) coresight_trace_id_put_system_id(int id) _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel