From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Bibek Kumar Patro <quic_bibekkum@quicinc.com>,
will@kernel.org, robin.murphy@arm.com, joro@8bytes.org,
dmitry.baryshkov@linaro.org, a39.skl@gmail.com,
quic_pkondeti@quicinc.com, quic_molvera@quicinc.com
Cc: linux-arm-msm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
linux-kernel@vger.kernel.org, qipl.kernel.upstream@quicinc.com
Subject: Re: [PATCH v2 3/3] iommu/arm-smmu: re-enable context caching in smmu reset operation
Date: Wed, 15 Nov 2023 17:43:42 +0100 [thread overview]
Message-ID: <e5b0d8c7-82cf-4a3a-9a6e-28e7b468df8d@linaro.org> (raw)
In-Reply-To: <20231114135654.30475-4-quic_bibekkum@quicinc.com>
On 11/14/23 14:56, Bibek Kumar Patro wrote:
> Context caching is re-enabled in the prefetch buffer for Qualcomm SoCs
> through SoC specific reset ops, which is disabled in the default MMU-500
> reset ops, but is expected for context banks using ACTLR register to
> retain the prefetch value during reset and runtime suspend.
>
> Signed-off-by: Bibek Kumar Patro <quic_bibekkum@quicinc.com>
> ---
And I assume that goes for all SMMU500 implementations?
Looking at the 8550 ACTRL array from patch 2, CPRE is not enabled
at all times.. Is that because of performance, or some other
technical reason?
Will this regress platforms without ACTRL tables?
Konrad
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next prev parent reply other threads:[~2023-11-15 16:44 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-14 13:56 [PATCH v2 0/3] iommu/arm-smmu: introduction of ACTLR implementation for Qualcomm SoCs Bibek Kumar Patro
2023-11-14 13:56 ` [PATCH v2 1/3] iommu/arm-smmu: introduction of ACTLR for custom prefetcher settings Bibek Kumar Patro
2023-11-14 14:08 ` Dmitry Baryshkov
2023-11-15 5:42 ` Bibek Kumar Patro
2023-11-14 16:55 ` Robin Murphy
2023-11-15 12:32 ` Bibek Kumar Patro
2023-11-15 15:04 ` Robin Murphy
2023-11-20 10:24 ` Bibek Kumar Patro
2023-11-15 13:54 ` Bibek Kumar Patro
2023-11-15 14:53 ` Robin Murphy
2023-11-17 5:27 ` Bibek Kumar Patro
2023-11-14 13:56 ` [PATCH v2 2/3] iommu/arm-smmu: add ACTLR data and support for SM8550 Bibek Kumar Patro
2023-11-14 14:12 ` Dmitry Baryshkov
2023-11-15 9:22 ` Bibek Kumar Patro
2023-11-15 9:38 ` Dmitry Baryshkov
2023-11-15 9:51 ` Bibek Kumar Patro
2023-11-15 10:45 ` Dmitry Baryshkov
2023-11-15 12:49 ` Bibek Kumar Patro
2023-11-15 13:10 ` Dmitry Baryshkov
2023-11-15 16:42 ` Konrad Dybcio
2023-11-16 6:09 ` Bibek Kumar Patro
2023-11-16 6:51 ` Dmitry Baryshkov
2023-11-17 5:36 ` Bibek Kumar Patro
2023-11-14 13:56 ` [PATCH v2 3/3] iommu/arm-smmu: re-enable context caching in smmu reset operation Bibek Kumar Patro
2023-11-14 14:15 ` Dmitry Baryshkov
2023-11-15 9:45 ` Bibek Kumar Patro
2023-11-15 11:03 ` Dmitry Baryshkov
2023-11-16 12:44 ` Bibek Kumar Patro
2023-11-16 15:24 ` Dmitry Baryshkov
2023-11-16 17:04 ` Robin Murphy
2023-11-17 9:10 ` Bibek Kumar Patro
2023-11-15 16:43 ` Konrad Dybcio [this message]
2023-11-17 7:15 ` Bibek Kumar Patro
2023-11-14 14:06 ` [PATCH v2 0/3] iommu/arm-smmu: introduction of ACTLR implementation for Qualcomm SoCs Dmitry Baryshkov
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