From: Nick Chan <towinchenmi@gmail.com>
To: Sven Peter <sven@kernel.org>
Cc: asahi@lists.linux.dev, Krzysztof Kozlowski <krzk+dt@kernel.org>,
Rob Herring <robh@kernel.org>,
Jassi Brar <jassisinghbrar@gmail.com>,
Neal Gompa <neal@gompa.dev>, Janne Grunau <j@jannau.net>,
Christoph Hellwig <hch@lst.de>, Keith Busch <kbusch@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Will Deacon <will@kernel.org>, Joerg Roedel <joro@8bytes.org>,
Sagi Grimberg <sagi@grimberg.me>,
Hector Martin <marcan@marcan.st>, Jens Axboe <axboe@kernel.dk>,
Conor Dooley <conor+dt@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
iommu@lists.linux.dev, linux-nvme@lists.infradead.org,
Alyssa Rosenzweig <alyssa@rosenzweig.io>
Subject: Re: [PATCH 7/9] nvme: apple: Add Apple A11 support
Date: Mon, 18 Aug 2025 00:36:55 +0800 [thread overview]
Message-ID: <e67860f1-bec4-4a55-91e8-61ade069f0a5@gmail.com> (raw)
In-Reply-To: <56be1cd1-73cc-4733-b364-31b74f588e9b@kernel.org>
On 17/8/2025 18:47, Sven Peter wrote:
> On 11.08.25 15:50, Nick Chan wrote:
>> Add support for ANS2 NVMe on Apple A11 SoC.
>>
>> This version of ANS2 is less quirky than the one in M1, and does not have
>> NVMMU or Linear SQ. However, it still requires a non-standard 128-byte
>> SQE.
>>
>> Signed-off-by: Nick Chan <towinchenmi@gmail.com>
>> ---
>> drivers/nvme/host/apple.c | 228 +++++++++++++++++++++++++++++++---------------
>
> [...]
>
>> }
>>
>> static void apple_nvme_rtkit_crashed(void *cookie, const void *crashlog, size_t crashlog_size)
>> @@ -284,21 +294,8 @@ static void apple_nvme_submit_cmd(struct apple_nvme_queue *q,
>> struct nvme_command *cmd)
>> {
>
> Please just create a separate submit function here.
> There's just not much code that's shared between the two variants.
Will do in v2.
>
> [...]
>
>> }
>>
>> @@ -587,10 +618,17 @@ static inline void apple_nvme_handle_cqe(struct apple_nvme_queue *q,
>> {
>> struct apple_nvme *anv = queue_to_apple_nvme(q);
>> struct nvme_completion *cqe = &q->cqes[idx];
>> - __u16 command_id = READ_ONCE(cqe->command_id);
>> struct request *req;
>>
>> - apple_nvmmu_inval(q, command_id);
>> + if (!anv->hw->has_lsq_nvmmu)
>> + cqe->command_id--;
>> +
>> + __u16 command_id = READ_ONCE(cqe->command_id);
>> +
>> + if (anv->hw->has_lsq_nvmmu)
>> + apple_nvmmu_inval(q, command_id);
>> + else
>> + command_id++;
>
> This entire block here looks weird. First you decrease the command_id
> directly inside the shared memory structure, then you read it with
> READ_ONCE to a local variable only to increase it again. Why?
Thanks for spotting! Looks like this is merely an artifact of how the code
is hacked to work that slipped under my radar, so I will remove the useless
codes in v2.
>
>
>
> Sven
Nick Chan
next prev parent reply other threads:[~2025-08-17 16:39 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-11 13:50 [PATCH 0/9] Add support ANS2 NVMe on Apple A11 Nick Chan
2025-08-11 13:50 ` [PATCH 1/9] dt-bindings: mailbox: apple,mailbox: Add ASC mailboxes on Apple A11 and T2 Nick Chan
2025-08-11 13:50 ` [PATCH 2/9] soc: apple: mailbox: Add Apple A11 and T2 mailbox support Nick Chan
2025-08-17 10:30 ` Sven Peter
2025-08-11 13:50 ` [PATCH 3/9] dt-bindings: iommu: apple,sart: Add Apple A11 Nick Chan
2025-08-17 10:50 ` Sven Peter
2025-08-11 13:50 ` [PATCH 4/9] soc: apple: sart: Make allow flags SART version dependent Nick Chan
2025-08-17 10:31 ` Sven Peter
2025-08-11 13:50 ` [PATCH 5/9] soc: apple: sart: Add SARTv0 support Nick Chan
2025-08-17 10:32 ` Sven Peter
2025-08-11 13:50 ` [PATCH 6/9] dt-bindings: nvme: apple,nvme-ans: Add Apple A11 Nick Chan
2025-08-11 13:50 ` [PATCH 7/9] nvme: apple: Add Apple A11 support Nick Chan
2025-08-17 10:47 ` Sven Peter
2025-08-17 16:36 ` Nick Chan [this message]
2025-08-11 13:51 ` [PATCH 8/9] arm64: dts: apple: t8015: Fix PCIE power domains dependencies Nick Chan
2025-08-11 13:51 ` [PATCH 9/9] arm64: dts: apple: t8015: Add NVMe nodes Nick Chan
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