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Thu, 16 Apr 2020 10:26:30 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 325B2C433CB; Thu, 16 Apr 2020 10:26:29 +0000 (UTC) Received: from mail.codeaurora.org (localhost.localdomain [127.0.0.1]) (using TLSv1 with cipher ECDHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) (Authenticated sender: saiprakash.ranjan) by smtp.codeaurora.org (Postfix) with ESMTPSA id 9BE44C433F2; Thu, 16 Apr 2020 10:26:28 +0000 (UTC) MIME-Version: 1.0 Date: Thu, 16 Apr 2020 15:56:28 +0530 From: Sai Prakash Ranjan To: Will Deacon Subject: Re: [PATCH 0/8] Relax sanity checking for mismatched AArch32 EL1 In-Reply-To: References: <20200414213114.2378-1-will@kernel.org> Message-ID: X-Sender: saiprakash.ranjan@codeaurora.org User-Agent: Roundcube Webmail/1.3.9 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200416_032637_841497_33B6BBD6 X-CRM114-Status: GOOD ( 13.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Anshuman Khandual , Marc Zyngier , Suzuki K Poulose , linux-kernel@vger.kernel.org, Doug Anderson , Catalin Marinas , kernel-team@android.com, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2020-04-16 14:09, Sai Prakash Ranjan wrote: > On 2020-04-15 03:01, Will Deacon wrote: >> Hi all, >> >> For better or worse, there are SoCs in production where some, but not >> all of the CPUs, support AArch32 at EL1 and above. Right now, that >> results in "SANITY CHECK" warnings during boot and an unconditional >> kernel taint. >> >> This patch series tries to do a bit better: the only time we care >> about >> AArch32 at EL1 is for KVM, so rather than throw our toys out of the >> pram, we can instead just disable support for 32-bit guests on these >> systems. In the unlikely scenario of a late CPU hotplug being the >> first >> time we notice that AArch32 is not available, then we fail the hotplug >> (right now we let the thing come online, which leads to hilarious >> results for any pre-existing 32-bit guests). >> >> Feedback welcome, >> >> Will >> > > Thanks Will, tested this series on QCOM SC7180 and SM8150 SoCs. > > For the entire series, > > Tested-by: saiprakash.ranjan@codeaurora.org > Urgh sorry, it should be Tested-by: Sai Prakash Ranjan -Sai -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel