From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 00B67C369B2 for ; Mon, 14 Apr 2025 22:04:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=gpN+J4J4To8sLOKznC03b8b/j5LFvgXLkH+eUpY2/rA=; b=G9u5Mei3+yUmOEtzCplsCqaTlt 1pLv5pYBLFszIp0088QDkfGkQ6VIo5VzSqF/I4yGDrpgWFX5DFsuMy0hEEpWKPedulHrX30FEJJcE uI/iT0BEkwINhuXf2iszzrgJ0zDoY6wQb4ukjpl8wELKCQaaDANSIOr17GG6jCsJI/oHpqQXUJDcb AV78AqHOS5PxGLSZTsJiQZXSt9Syc/ewo9Xju9grlmBAmHT6c7/uFhq9F8ccX9wPX9WOO2WUQOnUe f3W0Db3WNquH3pVFKx0EkgirFpRG2s2ANonHC7azUJDFBotLTDoB8SVrWo4UdHVpXAsdRC7eFEhaK iLat7gpg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1u4RuL-00000003fNR-3yVl; Mon, 14 Apr 2025 22:04:01 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1u4RZ5-00000003afD-0dVL for linux-arm-kernel@lists.infradead.org; Mon, 14 Apr 2025 21:42:04 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1744666922; x=1776202922; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Lw4rXsYC+bu7ZWiwiV6VoaI+H0Ns4VGc7RhKmXhNrBk=; b=lL4qcCI/5swnbbFMGcOAQ2jA7bIJoM6pA7arbfgZuoQiqLybuEqRf7nQ 18oEvHc8ajLf7tw6LcaeXhigaKts1ZEguN5nsOOP+uYQLZWdyuO5zOJCv jAwGD/eUwhnw+9sqqdDSf4Bd8/CLDPs6s/cB3kM91utuF/FUh1G4sBoam gX0hC3JKOsk8QfU5LwYu9t0wUUwT/05GSl6MQxAmITF8X94+mbOPyBm2f 3Z5LxmoiR45zJ/1RzozfJVSYZqy/svSGlCXqZyOTuEsc7CWPibLS9YzT7 7dZ4YCE8A6AtgN1X25qEcpIrjFeGVASRqk8sYBexRktjMnmxb66TYEZxR Q==; X-CSE-ConnectionGUID: jf75aQsXSneWELgtntpGWQ== X-CSE-MsgGUID: hNKqRSUARQqRIMPx+wlHXw== X-IronPort-AV: E=Sophos;i="6.15,212,1739862000"; d="scan'208";a="40006678" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 14 Apr 2025 14:41:58 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.44; Mon, 14 Apr 2025 14:41:06 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.44 via Frontend Transport; Mon, 14 Apr 2025 14:41:06 -0700 From: To: , , , , , , , , CC: , , , , , Ryan Wanner Subject: [PATCH v5 10/11] ARM: dts: microchip: sama7d65: Add RTT and GPBR Support for sama7d65 SoC Date: Mon, 14 Apr 2025 14:41:27 -0700 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250414_144203_268620_0AD13B36 X-CRM114-Status: UNSURE ( 9.42 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ryan Wanner Add RTT support for SAMA7D65 SoC. The GPBR is added so the SoC is able to store the RTT time data. Signed-off-by: Ryan Wanner --- arch/arm/boot/dts/microchip/sama7d65.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi index 8439c6a9e9f2..bec70164a75c 100644 --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi @@ -132,6 +132,13 @@ shdwc: poweroff@e001d200 { status = "disabled"; }; + rtt: rtc@e001d300 { + compatible = "microchip,sama7d65-rtt", "atmel,at91sam9260-rtt"; + reg = <0xe001d300 0x30>; + interrupts = ; + clocks = <&clk32k 0>; + }; + clk32k: clock-controller@e001d500 { compatible = "microchip,sama7d65-sckc", "microchip,sam9x60-sckc"; reg = <0xe001d500 0x4>; @@ -146,6 +153,11 @@ rtc: rtc@e001d800 { clocks = <&clk32k 1>; }; + gpbr: syscon@e001d700 { + compatible = "microchip,sama7d65-gpbr", "syscon"; + reg = <0xe001d700 0x48>; + }; + chipid@e0020000 { compatible = "microchip,sama7d65-chipid"; reg = <0xe0020000 0x8>; -- 2.43.0