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[217.229.165.118]) by smtp.gmail.com with ESMTPSA id m11sm2288979wmq.33.2021.05.27.04.31.17 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 27 May 2021 04:31:18 -0700 (PDT) Subject: Re: [RFC PATCH] Revert "arm64: PCI: Exclude ACPI "consumer" resources from host bridge windows" To: Lorenzo Pieralisi , Will Deacon , Bjorn Helgaas Cc: "Rafael J. Wysocki" , Len Brown , Catalin Marinas , linux-pci@vger.kernel.org, linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20210510234020.1330087-1-luzmaximilian@gmail.com> <20210526205836.GA20320@willie-the-truck> <20210527093200.GA16444@lpieralisi> From: Maximilian Luz Message-ID: Date: Thu, 27 May 2021 13:31:17 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.10.1 MIME-Version: 1.0 In-Reply-To: <20210527093200.GA16444@lpieralisi> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210527_043121_606644_7EC50451 X-CRM114-Status: GOOD ( 27.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 5/27/21 11:32 AM, Lorenzo Pieralisi wrote: > On Wed, May 26, 2021 at 09:58:36PM +0100, Will Deacon wrote: >> On Tue, May 11, 2021 at 01:40:20AM +0200, Maximilian Luz wrote: >>> The Microsoft Surface Pro X has host bridges defined as >>> >>> Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID >>> Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID >>> >>> Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings >>> { >>> Name (RBUF, ResourceTemplate () >>> { >>> Memory32Fixed (ReadWrite, >>> 0x60200000, // Address Base >>> 0x01DF0000, // Address Length >>> ) >>> WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, >>> 0x0000, // Granularity >>> 0x0000, // Range Minimum >>> 0x0001, // Range Maximum >>> 0x0000, // Translation Offset >>> 0x0002, // Length >>> ,, ) >>> }) >>> Return (RBUF) /* \_SB_.PCI0._CRS.RBUF */ >>> } >>> >>> meaning that the memory resources aren't (explicitly) defined as >>> "producers", i.e. host bridge windows. >>> >>> Commit 8fd4391ee717 ("arm64: PCI: Exclude ACPI "consumer" resources from >>> host bridge windows") introduced a check that removes such resources, >>> causing BAR allocation failures later on: >>> >>> [ 0.150731] pci 0002:00:00.0: BAR 14: no space for [mem size 0x00100000] >>> [ 0.150744] pci 0002:00:00.0: BAR 14: failed to assign [mem size 0x00100000] >>> [ 0.150758] pci 0002:01:00.0: BAR 0: no space for [mem size 0x00004000 64bit] >>> [ 0.150769] pci 0002:01:00.0: BAR 0: failed to assign [mem size 0x00004000 64bit] >>> >>> This eventually prevents the PCIe NVME drive from being accessible. >>> >>> On x86 we already skip the check for producer/window due to some history >>> with negligent firmware. It seems that Microsoft is intent on continuing >>> that history on their ARM devices, so let's drop that check here too. >>> >>> Signed-off-by: Maximilian Luz >>> --- >>> >>> Please note: I am not sure if this is the right way to fix that, e.g. I >>> don't know if any additional checks like on IA64 or x86 might be >>> required instead, or if this might break things on other devices. So >>> please consider this more as a bug report rather than a fix. >>> >>> Apologies for the re-send, I seem to have unintentionally added a blank >>> line before the subject. >>> >>> --- >>> arch/arm64/kernel/pci.c | 14 -------------- >>> 1 file changed, 14 deletions(-) >> >> Adding Lorenzo to cc, as he'll have a much better idea about this than me. >> >> This is: >> >> https://lore.kernel.org/r/20210510234020.1330087-1-luzmaximilian@gmail.com > > Sigh. We can't apply this patch since it would trigger regressions on > other platforms (IIUC the root complex registers would end up in the > host bridge memory windows). > > I am not keen on reverting commit 8fd4391ee717 because it does the > right thing. > > I think this requires a quirk and immediate reporting to Microsoft. Since I wrote this I have found other arm64 devices with the same problem. I don't think that this is Microsoft exclusive anymore, but rather that this is a Qualcomm problem (Qualcomm SoC seems to be the common thread). See e.g. DSDTs in [1]. So it should probably be reported to them. Regards, Max [1]: https://github.com/aarch64-laptops/build/tree/dfce25bc12655713c7e1e0422b191e9c944e4fb2/misc _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel