From: James Clark <james.clark@arm.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>,
coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
kvmarm@lists.linux.dev, broonie@kernel.org, maz@kernel.org,
acme@kernel.org
Cc: Oliver Upton <oliver.upton@linux.dev>,
James Morse <james.morse@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Mike Leach <mike.leach@linaro.org>,
Leo Yan <leo.yan@linaro.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Anshuman Khandual <anshuman.khandual@arm.com>,
Rob Herring <robh@kernel.org>,
Miguel Luis <miguel.luis@oracle.com>,
Jintack Lim <jintack.lim@linaro.org>,
Ard Biesheuvel <ardb@kernel.org>,
Mark Rutland <mark.rutland@arm.com>, Helge Deller <deller@gmx.de>,
Arnd Bergmann <arnd@arndb.de>,
Kalesh Singh <kaleshsingh@google.com>,
Quentin Perret <qperret@google.com>,
Vincent Donnefort <vdonnefort@google.com>,
Fuad Tabba <tabba@google.com>,
Akihiko Odaki <akihiko.odaki@daynix.com>,
Joey Gouly <joey.gouly@arm.com>,
Jing Zhang <jingzhangos@google.com>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 6/7] arm64: KVM: Write TRFCR value on guest switch with nVHE
Date: Fri, 5 Jan 2024 10:05:08 +0000 [thread overview]
Message-ID: <ea427dbc-a1ec-9461-9f39-992d5b22e83e@arm.com> (raw)
In-Reply-To: <8ba4d3dd-6ab2-49e3-9d25-d742e4958afc@arm.com>
On 05/01/2024 09:50, Suzuki K Poulose wrote:
> On 04/01/2024 16:27, James Clark wrote:
>> The guest value for TRFCR requested by the Coresight driver is saved in
>> kvm_host_global_state. On guest switch this value needs to be written to
>> the register. Currently TRFCR is only modified when we want to disable
>> trace completely in guests due to an issue with TRBE. Expand the
>> __debug_save_trace() function to always write to the register if a
>> different value for guests is required, but also keep the existing TRBE
>> disable behavior if that's required.
>>
>> The TRFCR restore function remains functionally the same, except a value
>> of 0 doesn't mean "don't restore" anymore. Now that we save both guest
>> and host values the register is restored any time the guest and host
>> values differ.
>>
>> Signed-off-by: James Clark <james.clark@arm.com>
>> ---
>> arch/arm64/kvm/hyp/nvhe/debug-sr.c | 55 ++++++++++++++++++------------
>> 1 file changed, 34 insertions(+), 21 deletions(-)
>>
>> diff --git a/arch/arm64/kvm/hyp/nvhe/debug-sr.c
>> b/arch/arm64/kvm/hyp/nvhe/debug-sr.c
>> index 4558c02eb352..7fd876d4f034 100644
>> --- a/arch/arm64/kvm/hyp/nvhe/debug-sr.c
>> +++ b/arch/arm64/kvm/hyp/nvhe/debug-sr.c
>> @@ -51,32 +51,45 @@ static void __debug_restore_spe(u64 pmscr_el1)
>> write_sysreg_s(pmscr_el1, SYS_PMSCR_EL1);
>> }
>> -static void __debug_save_trace(u64 *trfcr_el1)
>> +/*
>> + * Save TRFCR and disable trace completely if TRBE is being used,
>> otherwise
>> + * apply required guest TRFCR value.
>> + */
>> +static void __debug_save_trace(struct kvm_vcpu *vcpu)
>> {
>> - *trfcr_el1 = 0;
>> + u64 host_trfcr_el1 = read_sysreg_s(SYS_TRFCR_EL1);
>> + u64 guest_trfcr_el1;
>> +
>> + vcpu->arch.host_debug_state.trfcr_el1 = host_trfcr_el1;
>> /* Check if the TRBE is enabled */
>> - if (!(read_sysreg_s(SYS_TRBLIMITR_EL1) & TRBLIMITR_EL1_E))
>> - return;
>> - /*
>> - * Prohibit trace generation while we are in guest.
>> - * Since access to TRFCR_EL1 is trapped, the guest can't
>> - * modify the filtering set by the host.
>> - */
>> - *trfcr_el1 = read_sysreg_s(SYS_TRFCR_EL1);
>> - write_sysreg_s(0, SYS_TRFCR_EL1);
>> - isb();
>> - /* Drain the trace buffer to memory */
>> - tsb_csync();
>> + if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRBE) &&
>> + (read_sysreg_s(SYS_TRBLIMITR_EL1) & TRBLIMITR_EL1_E)) {
>> + /*
>> + * Prohibit trace generation while we are in guest. Since access
>> + * to TRFCR_EL1 is trapped, the guest can't modify the filtering
>> + * set by the host.
>> + */
>> + write_sysreg_s(0, SYS_TRFCR_EL1);
>> + isb();
>> + /* Drain the trace buffer to memory */
>> + tsb_csync();
>> + } else {
>> + /*
>> + * Not using TRBE, so guest trace works. Apply the guest filters
>> + * provided by the Coresight driver, if different.
>> + */
>> + guest_trfcr_el1 =
>> kvm_host_global_state[vcpu->cpu].guest_trfcr_el1;
>> + if (host_trfcr_el1 != guest_trfcr_el1)
>> + write_sysreg_s(guest_trfcr_el1, SYS_TRFCR_EL1);
>> + }
>> }
>> static void __debug_restore_trace(u64 trfcr_el1)
>> {
>> - if (!trfcr_el1)
>> - return;
>> -
>> /* Restore trace filter controls */
>> - write_sysreg_s(trfcr_el1, SYS_TRFCR_EL1);
>> + if (trfcr_el1 != read_sysreg_s(SYS_TRFCR_EL1))
>> + write_sysreg_s(trfcr_el1, SYS_TRFCR_EL1);
>
> Could we not write it unconditionally here ? In the saving step, we have
> to save the host setting. But while restoring, we could skip the check.
> A read and write is probably the same cost, as the value is implicitly
> synchronized by a later ISB.
>
> Eitherways,
>
> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
>
>
I did also wonder if it was better to just do it unconditionally. I'll
update it in the next version.
>> }
>> void __debug_save_host_buffers_nvhe(struct kvm_vcpu *vcpu)
>> @@ -85,8 +98,8 @@ void __debug_save_host_buffers_nvhe(struct kvm_vcpu
>> *vcpu)
>> if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_SPE))
>> __debug_save_spe(&vcpu->arch.host_debug_state.pmscr_el1);
>> /* Disable and flush Self-Hosted Trace generation */
>> - if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRBE))
>> - __debug_save_trace(&vcpu->arch.host_debug_state.trfcr_el1);
>> + if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRFCR))
>> + __debug_save_trace(vcpu);
>> }
>> void __debug_switch_to_guest(struct kvm_vcpu *vcpu)
>> @@ -98,7 +111,7 @@ void __debug_restore_host_buffers_nvhe(struct
>> kvm_vcpu *vcpu)
>> {
>> if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_SPE))
>> __debug_restore_spe(vcpu->arch.host_debug_state.pmscr_el1);
>> - if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRBE))
>> + if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRFCR))
>> __debug_restore_trace(vcpu->arch.host_debug_state.trfcr_el1);
>> }
>>
>
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next prev parent reply other threads:[~2024-01-05 10:05 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-04 16:27 [PATCH v4 0/7] kvm/coresight: Support exclude guest and exclude host James Clark
2024-01-04 16:27 ` [PATCH v4 1/7] arm64: KVM: Fix renamed function in comment James Clark
2024-01-04 16:58 ` Suzuki K Poulose
2024-01-04 16:27 ` [PATCH v4 2/7] arm64: KVM: Use shared area to pass PMU event state to hypervisor James Clark
2024-01-05 9:40 ` Suzuki K Poulose
2024-02-01 16:14 ` James Clark
2024-02-02 22:00 ` Oliver Upton
2024-02-05 12:16 ` James Clark
2024-02-05 13:04 ` Oliver Upton
2024-02-05 13:15 ` Marc Zyngier
2024-02-05 13:21 ` Oliver Upton
2024-02-05 14:16 ` Marc Zyngier
2024-02-05 14:17 ` James Clark
2024-02-05 14:52 ` Marc Zyngier
2024-02-05 15:37 ` James Clark
2024-02-05 15:50 ` Marc Zyngier
2024-02-05 16:38 ` Oliver Upton
2024-01-04 16:27 ` [PATCH v4 3/7] arm64/sysreg/tools: Move TRFCR definitions to sysreg James Clark
2024-01-05 9:18 ` Suzuki K Poulose
2024-01-05 9:59 ` James Clark
2024-01-04 16:27 ` [PATCH v4 4/7] arm64: KVM: Add iflag for FEAT_TRF James Clark
2024-01-04 16:27 ` [PATCH v4 5/7] arm64: KVM: Add interface to set guest value for TRFCR register James Clark
2024-01-05 9:20 ` Suzuki K Poulose
2024-01-04 16:27 ` [PATCH v4 6/7] arm64: KVM: Write TRFCR value on guest switch with nVHE James Clark
2024-01-05 9:50 ` Suzuki K Poulose
2024-01-05 10:05 ` James Clark [this message]
2024-01-04 16:27 ` [PATCH v4 7/7] coresight: Pass guest TRFCR value to KVM James Clark
2024-01-05 9:55 ` Suzuki K Poulose
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