From: <Manikandan.M@microchip.com>
To: <lee@kernel.org>
Cc: <maarten.lankhorst@linux.intel.com>, <mripard@kernel.org>,
<tzimmermann@suse.de>, <airlied@gmail.com>, <simona@ffwll.ch>,
<Nicolas.Ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
<claudiu.beznea@tuxon.dev>, <dri-devel@lists.freedesktop.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <Dharma.B@microchip.com>
Subject: Re: [PATCH v2 RESEND 2/3] mfd: atmel-hlcdc: fetch LVDS PLL clock for LVDS display
Date: Tue, 11 Nov 2025 03:05:56 +0000 [thread overview]
Message-ID: <ec44b024-a06c-4ea1-be7d-3a8993a5b362@microchip.com> (raw)
In-Reply-To: <20251106130233.GK8064@google.com>
Hi Lee,
On 06/11/25 6:32 pm, Lee Jones wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On Wed, 22 Oct 2025, Manikandan Muralidharan wrote:
>
>> The XLCDC IP supports parallel RGB, MIPI DSI and LVDS Display.
>> The LCD Generic clock (sys_clk) is used for Parallel RGB and MIPI
>> displays, while the LVDS PLL clock (lvds_pll_clk) is used for LVDS
>> displays.Since both the clocks cannot co-exist together in the DT
>> for a given display, this patch first attempts to retrieve sys_clk
>> If that fails,it then tries to acquire lvds_pll_clk.
>>
>> Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
>> Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com>
>> ---
>> changes in v2:
>> - Rephrase the comments, commit message and err logs
>> - Replace dev_err wwith dev_warn
>> - Remove Initializing sys_clk and lvds_pll_clk to NULL post
>> devm_kzalloc() call
>>
>> ---
>> drivers/mfd/atmel-hlcdc.c | 16 ++++++++++++++--
>> include/linux/mfd/atmel-hlcdc.h | 1 +
>> 2 files changed, 15 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/mfd/atmel-hlcdc.c b/drivers/mfd/atmel-hlcdc.c
>> index 4c4e35d404f3..f680392b01ba 100644
>> --- a/drivers/mfd/atmel-hlcdc.c
>> +++ b/drivers/mfd/atmel-hlcdc.c
>> @@ -108,10 +108,22 @@ static int atmel_hlcdc_probe(struct platform_device *pdev)
>> return PTR_ERR(hlcdc->periph_clk);
>> }
>>
>> + /*
>> + * Retrieve any one of the Main clk required by the LCD to operate:
>> + *
>> + * LCDC Generic Clock (sys_clk) - Parallel RGB and MIPI displays,
>> + * LVDS PLL (lvds_pll_clk) - LVDS display
>> + */
>> hlcdc->sys_clk = devm_clk_get(dev, "sys_clk");
>> if (IS_ERR(hlcdc->sys_clk)) {
>> - dev_err(dev, "failed to get system clock\n");
>> - return PTR_ERR(hlcdc->sys_clk);
>> + dev_warn(dev,
>> + "failed to get LCDC generic clock, trying for LVDS PLL clock instead\n");
>
> Does the user really care which clock they use?
>
> Can this just happen silently instead?
>
>> + hlcdc->lvds_pll_clk = devm_clk_get(dev, "lvds_pll_clk");
>> + if (IS_ERR(hlcdc->lvds_pll_clk)) {
>> + dev_err(dev, "failed to get LVDS PLL clock\n");
>
> Failed to obtain both the LCDC (generic) and LVDS PLL clocks
>
Thankyou, I will make sure v3 addresses these comments.
>> + return PTR_ERR(hlcdc->lvds_pll_clk);
>> + }
>> }
>>
>> hlcdc->slow_clk = devm_clk_get(dev, "slow_clk");
>> diff --git a/include/linux/mfd/atmel-hlcdc.h b/include/linux/mfd/atmel-hlcdc.h
>> index 80d675a03b39..07c2081867fd 100644
>> --- a/include/linux/mfd/atmel-hlcdc.h
>> +++ b/include/linux/mfd/atmel-hlcdc.h
>> @@ -75,6 +75,7 @@
>> */
>> struct atmel_hlcdc {
>> struct regmap *regmap;
>> + struct clk *lvds_pll_clk;
>> struct clk *periph_clk;
>> struct clk *sys_clk;
>> struct clk *slow_clk;
>> --
>> 2.25.1
>>
>
> --
> Lee Jones [李琼斯]
--
Thanks and Regards,
Manikandan M.
next prev parent reply other threads:[~2025-11-11 3:06 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-22 9:13 [PATCH v2 RESEND 0/3] Add LVDS display support and PLL handling Manikandan Muralidharan
2025-10-22 9:13 ` [PATCH v2 RESEND 1/3] drm: atmel-hlcdc: add support for LVDS encoder type Manikandan Muralidharan
2025-10-22 9:13 ` [PATCH v2 RESEND 2/3] mfd: atmel-hlcdc: fetch LVDS PLL clock for LVDS display Manikandan Muralidharan
2025-11-06 13:02 ` Lee Jones
2025-11-11 3:05 ` Manikandan.M [this message]
2025-10-22 9:13 ` [PATCH v2 RESEND 3/3] drm: atmel-hlcdc: set LVDS PLL clock rate for LVDS Displays Manikandan Muralidharan
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