From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB21EC4727C for ; Wed, 30 Sep 2020 16:11:25 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3C47020789 for ; Wed, 30 Sep 2020 16:11:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="KR//SzpP" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3C47020789 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=KSfHZbaQPonngSYnVu0FnKcCW6JbNAmYtE5VKAlAS+8=; b=KR//SzpPodbTNKrq9LnTb8cFq XwFl8T+u/Botm/lkK9zAw84Q8yQaVvW0wvvf8Vr9anOMThVoad8hLaaRA4ZC/dIVoniyg547iLr98 nlH/ix1UNmYTByCddnmffYIjB/p4aeOmcoalk9MpuaDWR6T7il3p0XLAYT0YtZWg1/64aMw/s1ma2 HJHpBS+p1TYdZbu18nzs+u4AnbFr843Ie8wSDXwsVwQwb+LWuJ8665eOnbg7LO/2T63Cfm3bhd1q4 bpxrr0+kZ3Itm8FbaXbvzFk7ujK6hQ7oaYFRgdAenzkL7EkRc+lzb8YnS1mnspUuJgbzdaM1LPOw7 EBXn4J3Hw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kNeg1-0007WR-S8; Wed, 30 Sep 2020 16:09:57 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kNefy-0007UU-9q for linux-arm-kernel@lists.infradead.org; Wed, 30 Sep 2020 16:09:55 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CEDA6D6E; Wed, 30 Sep 2020 09:09:50 -0700 (PDT) Received: from [172.16.1.113] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B117F3F73B; Wed, 30 Sep 2020 09:09:49 -0700 (PDT) Subject: Re: [PATCH 03/13] arm64: head.S: always initialize PSTATE To: Mark Rutland , linux-arm-kernel@lists.infradead.org References: <20200925160722.27155-1-mark.rutland@arm.com> <20200925160722.27155-4-mark.rutland@arm.com> From: James Morse Message-ID: Date: Wed, 30 Sep 2020 17:09:47 +0100 User-Agent: Mozilla/5.0 (X11; Linux aarch64; rv:68.0) Gecko/20100101 Thunderbird/68.12.0 MIME-Version: 1.0 In-Reply-To: <20200925160722.27155-4-mark.rutland@arm.com> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200930_120954_396199_DA0369FA X-CRM114-Status: GOOD ( 23.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: catalin.marinas@arm.com, robin.murphy@arm.com, hch@lst.de, will@kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Mark, On 25/09/2020 17:07, Mark Rutland wrote: > As with SCTLR_ELx and other control registers, some PSTATE bits are > UNKNOWN out-of-reset, and we may not be able to rely on hardware of > firmware (hardware or firmware) > to initialize them to our liking prior to entry to the kernel, > e.g. in the primary/secondary boot paths and return from idle/suspend. > > It would be more robust (and easier to reason about) if we consistently > initialized PSTATE to a default value, as we do with control registers. > This will ensure that the kernel is not adversely affected by bits it is > not aware of, e.g. when support for a feature such as PAN/UAO is > disabled. > > This patch ensures that PSTATE is consistently initialized at boot time > via an ERET. This is not intended to relax the existing requirements > (e.g. DAIF bits must still be set prior to entering the kernel). For > features detected dynamically (which may require system-wide support), > it is still necessary to subsequently modify PSTATE. > diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S > index 9bb07be45249a..b8ee9a62c9b61 100644 > --- a/arch/arm64/kernel/head.S > +++ b/arch/arm64/kernel/head.S > @@ -494,17 +494,22 @@ EXPORT_SYMBOL(kimage_vaddr) > * booted in EL1 or EL2 respectively. > */ > SYM_FUNC_START(init_kernel_el) > - msr SPsel, #1 // We want to use SP_EL{1,2} > mrs x0, CurrentEL > cmp x0, #CurrentEL_EL2 > - b.eq 1f > + b.eq init_el2 > + > +SYM_INNER_LABEL(init_el1, SYM_L_LOCAL) > mov_q x0, INIT_SCTLR_EL1_MMU_OFF > msr sctlr_el1, x0 > - mov w0, #BOOT_CPU_MODE_EL1 // This cpu booted in EL1 > isb Could you add a comment covering why this ISB isn't rolled into the ERET? I'm guessing its in case SCTLR_EL1 previously had v8.5s EOS 'Exception Exit is Context Synchronizing' clear. > - ret > + mov_q x0, INIT_PSTATE_EL1 > + msr spsr_el1, x0 > + msr elr_el1, lr > + mov w0, #BOOT_CPU_MODE_EL1 > + eret Thanks, James _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel