[PATCH 01/10] ARM: orion5x: Rename PCI_CONF_{REG,FUNC}() out of the way

[PATCH 01/10] ARM: orion5x: Rename PCI_CONF_{REG,FUNC}() out of the way

[Ilpo Järvinen]

orion5x defines PCI_CONF_REG() and PCI_CONF_FUNC() that are problematic
because PCI core is going to introduce defines with the same names.

Add ORION5X prefix to those defines to avoid name conflicts.

Note: as this is part of series that replaces the code in question
anyway, only bare minimum renaming is done and other similarly named
macros are not touched.

Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
 arch/arm/mach-orion5x/pci.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index 3313bc5a63ea..77ddab90f448 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -219,8 +219,8 @@ static int __init pcie_setup(struct pci_sys_data *sys)
 /*
  * PCI_CONF_ADDR bits
  */
-#define PCI_CONF_REG(reg)		((reg) & 0xfc)
-#define PCI_CONF_FUNC(func)		(((func) & 0x3) << 8)
+#define ORION5X_PCI_CONF_REG(reg)	((reg) & 0xfc)
+#define ORION5X_PCI_CONF_FUNC(func)	(((func) & 0x3) << 8)
 #define PCI_CONF_DEV(dev)		(((dev) & 0x1f) << 11)
 #define PCI_CONF_BUS(bus)		(((bus) & 0xff) << 16)
 #define PCI_CONF_ADDR_EN		(1 << 31)
@@ -277,8 +277,8 @@ static int orion5x_pci_hw_rd_conf(int bus, int dev, u32 func,
 	spin_lock_irqsave(&orion5x_pci_lock, flags);
 
 	writel(PCI_CONF_BUS(bus) |
-		PCI_CONF_DEV(dev) | PCI_CONF_REG(where) |
-		PCI_CONF_FUNC(func) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
+		PCI_CONF_DEV(dev) | ORION5X_PCI_CONF_REG(where) |
+		ORION5X_PCI_CONF_FUNC(func) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
 
 	*val = readl(PCI_CONF_DATA);
 
@@ -301,8 +301,8 @@ static int orion5x_pci_hw_wr_conf(int bus, int dev, u32 func,
 	spin_lock_irqsave(&orion5x_pci_lock, flags);
 
 	writel(PCI_CONF_BUS(bus) |
-		PCI_CONF_DEV(dev) | PCI_CONF_REG(where) |
-		PCI_CONF_FUNC(func) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
+		PCI_CONF_DEV(dev) | ORION5X_PCI_CONF_REG(where) |
+		ORION5X_PCI_CONF_FUNC(func) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
 
 	if (size == 4) {
 		__raw_writel(val, PCI_CONF_DATA);
-- 
2.39.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 01/10] ARM: orion5x: Rename PCI_CONF_{REG,FUNC}() out of the way

[Andrew Lunn]

On Mon, Apr 29, 2024 at 01:46:24PM +0300, Ilpo Järvinen wrote:
> orion5x defines PCI_CONF_REG() and PCI_CONF_FUNC() that are problematic
> because PCI core is going to introduce defines with the same names.
> 
> Add ORION5X prefix to those defines to avoid name conflicts.
> 
> Note: as this is part of series that replaces the code in question
> anyway, only bare minimum renaming is done and other similarly named
> macros are not touched.
> 
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 01/10] ARM: orion5x: Rename PCI_CONF_{REG,FUNC}() out of the way

[Andrew Lunn]

On Mon, Apr 29, 2024 at 01:46:24PM +0300, Ilpo Järvinen wrote:
> orion5x defines PCI_CONF_REG() and PCI_CONF_FUNC() that are problematic
> because PCI core is going to introduce defines with the same names.
> 
> Add ORION5X prefix to those defines to avoid name conflicts.
> 
> Note: as this is part of series that replaces the code in question
> anyway, only bare minimum renaming is done and other similarly named
> macros are not touched.
> 
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>

Hi Ilpo

What branch do these apply to? I wanted to test them, but i get hunks
rejected:

git am < 20240429104633.11060-1-ilpo.jarvinen@linux.intel.com.mbx
Applying: ARM: orion5x: Rename PCI_CONF_{REG,FUNC}() out of the way
Applying: ARM: orion5x: Use generic PCI Conf Type 1 helper
error: patch failed: arch/arm/mach-orion5x/pci.c:276
error: arch/arm/mach-orion5x/pci.c: patch does not apply
Patch failed at 0002 ARM: orion5x: Use generic PCI Conf Type 1 helper

I tried linux-next, v6.9-rc6, pci:next

Thanks
	Andrew

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 01/10] ARM: orion5x: Rename PCI_CONF_{REG,FUNC}() out of the way

[Ilpo Järvinen]

[-- Attachment #1: Type: text/plain, Size: 1362 bytes --]

On Mon, 29 Apr 2024, Andrew Lunn wrote:

> On Mon, Apr 29, 2024 at 01:46:24PM +0300, Ilpo Järvinen wrote:
> > orion5x defines PCI_CONF_REG() and PCI_CONF_FUNC() that are problematic
> > because PCI core is going to introduce defines with the same names.
> > 
> > Add ORION5X prefix to those defines to avoid name conflicts.
> > 
> > Note: as this is part of series that replaces the code in question
> > anyway, only bare minimum renaming is done and other similarly named
> > macros are not touched.
> > 
> > Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
> 
> Hi Ilpo
> 
> What branch do these apply to? I wanted to test them, but i get hunks
> rejected:
> 
> git am < 20240429104633.11060-1-ilpo.jarvinen@linux.intel.com.mbx
> Applying: ARM: orion5x: Rename PCI_CONF_{REG,FUNC}() out of the way
> Applying: ARM: orion5x: Use generic PCI Conf Type 1 helper
> error: patch failed: arch/arm/mach-orion5x/pci.c:276
> error: arch/arm/mach-orion5x/pci.c: patch does not apply
> Patch failed at 0002 ARM: orion5x: Use generic PCI Conf Type 1 helper
> 
> I tried linux-next, v6.9-rc6, pci:next

Hi,

On top of pci:main (so v6.9-rc1).

"ARM: orion5x: Use generic PCI Conf Type 1 helper" should be only 4th 
patch but your command seems to apply it as 2nd patch (is the mbx file 
having them out-of-order?).

-- 
 i.

[-- Attachment #2: Type: text/plain, Size: 176 bytes --]

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 01/10] ARM: orion5x: Rename PCI_CONF_{REG,FUNC}() out of the way

[Gregory CLEMENT]

Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> writes:

> orion5x defines PCI_CONF_REG() and PCI_CONF_FUNC() that are problematic
> because PCI core is going to introduce defines with the same names.
>
> Add ORION5X prefix to those defines to avoid name conflicts.
>
> Note: as this is part of series that replaces the code in question
> anyway, only bare minimum renaming is done and other similarly named
> macros are not touched.
>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>

Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>

As some other patches of the series depend on patches in the PCIe
subsystem, the best approach would be to let you apply the series
through the PCIe subsystem.

Thanks,

Gregory
> ---
>  arch/arm/mach-orion5x/pci.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
> index 3313bc5a63ea..77ddab90f448 100644
> --- a/arch/arm/mach-orion5x/pci.c
> +++ b/arch/arm/mach-orion5x/pci.c
> @@ -219,8 +219,8 @@ static int __init pcie_setup(struct pci_sys_data *sys)
>  /*
>   * PCI_CONF_ADDR bits
>   */
> -#define PCI_CONF_REG(reg)		((reg) & 0xfc)
> -#define PCI_CONF_FUNC(func)		(((func) & 0x3) << 8)
> +#define ORION5X_PCI_CONF_REG(reg)	((reg) & 0xfc)
> +#define ORION5X_PCI_CONF_FUNC(func)	(((func) & 0x3) << 8)
>  #define PCI_CONF_DEV(dev)		(((dev) & 0x1f) << 11)
>  #define PCI_CONF_BUS(bus)		(((bus) & 0xff) << 16)
>  #define PCI_CONF_ADDR_EN		(1 << 31)
> @@ -277,8 +277,8 @@ static int orion5x_pci_hw_rd_conf(int bus, int dev, u32 func,
>  	spin_lock_irqsave(&orion5x_pci_lock, flags);
>  
>  	writel(PCI_CONF_BUS(bus) |
> -		PCI_CONF_DEV(dev) | PCI_CONF_REG(where) |
> -		PCI_CONF_FUNC(func) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
> +		PCI_CONF_DEV(dev) | ORION5X_PCI_CONF_REG(where) |
> +		ORION5X_PCI_CONF_FUNC(func) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
>  
>  	*val = readl(PCI_CONF_DATA);
>  
> @@ -301,8 +301,8 @@ static int orion5x_pci_hw_wr_conf(int bus, int dev, u32 func,
>  	spin_lock_irqsave(&orion5x_pci_lock, flags);
>  
>  	writel(PCI_CONF_BUS(bus) |
> -		PCI_CONF_DEV(dev) | PCI_CONF_REG(where) |
> -		PCI_CONF_FUNC(func) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
> +		PCI_CONF_DEV(dev) | ORION5X_PCI_CONF_REG(where) |
> +		ORION5X_PCI_CONF_FUNC(func) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
>  
>  	if (size == 4) {
>  		__raw_writel(val, PCI_CONF_DATA);
> -- 
> 2.39.2

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 03/10] ARM: orion5x: Pass devfn to orion5x_pci_hw_{rd,wr}_conf()

[Ilpo Järvinen]

Pass the usual devfn instead of individual components into
orion5x_pci_hw_{rd,wr}_conf() to make the change into
pci_conf1_offset() in an upcoming commit easier.

Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
 arch/arm/mach-orion5x/pci.c | 45 +++++++++++++++++++------------------
 1 file changed, 23 insertions(+), 22 deletions(-)

diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index 77ddab90f448..6376e1db6386 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -270,15 +270,15 @@ static int orion5x_pci_local_bus_nr(void)
 	return((conf & PCI_P2P_BUS_MASK) >> PCI_P2P_BUS_OFFS);
 }
 
-static int orion5x_pci_hw_rd_conf(int bus, int dev, u32 func,
-					u32 where, u32 size, u32 *val)
+static int orion5x_pci_hw_rd_conf(int bus, u8 devfn, u32 where,
+				  u32 size, u32 *val)
 {
 	unsigned long flags;
 	spin_lock_irqsave(&orion5x_pci_lock, flags);
 
 	writel(PCI_CONF_BUS(bus) |
-		PCI_CONF_DEV(dev) | ORION5X_PCI_CONF_REG(where) |
-		ORION5X_PCI_CONF_FUNC(func) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
+		PCI_CONF_DEV(PCI_SLOT(devfn)) | ORION5X_PCI_CONF_REG(where) |
+		ORION5X_PCI_CONF_FUNC(PCI_FUNC(devfn)) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
 
 	*val = readl(PCI_CONF_DATA);
 
@@ -292,8 +292,8 @@ static int orion5x_pci_hw_rd_conf(int bus, int dev, u32 func,
 	return PCIBIOS_SUCCESSFUL;
 }
 
-static int orion5x_pci_hw_wr_conf(int bus, int dev, u32 func,
-					u32 where, u32 size, u32 val)
+static int orion5x_pci_hw_wr_conf(int bus, u8 devfn, u32 where,
+				  u32 size, u32 val)
 {
 	unsigned long flags;
 	int ret = PCIBIOS_SUCCESSFUL;
@@ -301,8 +301,8 @@ static int orion5x_pci_hw_wr_conf(int bus, int dev, u32 func,
 	spin_lock_irqsave(&orion5x_pci_lock, flags);
 
 	writel(PCI_CONF_BUS(bus) |
-		PCI_CONF_DEV(dev) | ORION5X_PCI_CONF_REG(where) |
-		ORION5X_PCI_CONF_FUNC(func) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
+		PCI_CONF_DEV(PCI_SLOT(devfn)) | ORION5X_PCI_CONF_REG(where) |
+		ORION5X_PCI_CONF_FUNC(PCI_FUNC(devfn)) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
 
 	if (size == 4) {
 		__raw_writel(val, PCI_CONF_DATA);
@@ -347,8 +347,7 @@ static int orion5x_pci_rd_conf(struct pci_bus *bus, u32 devfn,
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	}
 
-	return orion5x_pci_hw_rd_conf(bus->number, PCI_SLOT(devfn),
-					PCI_FUNC(devfn), where, size, val);
+	return orion5x_pci_hw_rd_conf(bus->number, devfn, where, size, val);
 }
 
 static int orion5x_pci_wr_conf(struct pci_bus *bus, u32 devfn,
@@ -357,8 +356,7 @@ static int orion5x_pci_wr_conf(struct pci_bus *bus, u32 devfn,
 	if (!orion5x_pci_valid_config(bus->number, devfn))
 		return PCIBIOS_DEVICE_NOT_FOUND;
 
-	return orion5x_pci_hw_wr_conf(bus->number, PCI_SLOT(devfn),
-					PCI_FUNC(devfn), where, size, val);
+	return orion5x_pci_hw_wr_conf(bus->number, devfn, where, size, val);
 }
 
 static struct pci_ops pci_ops = {
@@ -375,12 +373,14 @@ static void __init orion5x_pci_set_bus_nr(int nr)
 		 * PCI-X mode
 		 */
 		u32 pcix_status, bus, dev;
+		u8 devfn;
 		bus = (p2p & PCI_P2P_BUS_MASK) >> PCI_P2P_BUS_OFFS;
 		dev = (p2p & PCI_P2P_DEV_MASK) >> PCI_P2P_DEV_OFFS;
-		orion5x_pci_hw_rd_conf(bus, dev, 0, PCIX_STAT, 4, &pcix_status);
+		devfn = PCI_DEVFN(dev, 0);
+		orion5x_pci_hw_rd_conf(bus, devfn, PCIX_STAT, 4, &pcix_status);
 		pcix_status &= ~PCIX_STAT_BUS_MASK;
 		pcix_status |= (nr << PCIX_STAT_BUS_OFFS);
-		orion5x_pci_hw_wr_conf(bus, dev, 0, PCIX_STAT, 4, pcix_status);
+		orion5x_pci_hw_wr_conf(bus, devfn, PCIX_STAT, 4, pcix_status);
 	} else {
 		/*
 		 * PCI Conventional mode
@@ -393,15 +393,16 @@ static void __init orion5x_pci_set_bus_nr(int nr)
 
 static void __init orion5x_pci_master_slave_enable(void)
 {
-	int bus_nr, func, reg;
+	int bus_nr, reg;
+	u8 devfn;
 	u32 val;
 
 	bus_nr = orion5x_pci_local_bus_nr();
-	func = PCI_CONF_FUNC_STAT_CMD;
+	devfn = PCI_DEVFN(0, PCI_CONF_FUNC_STAT_CMD);
 	reg = PCI_CONF_REG_STAT_CMD;
-	orion5x_pci_hw_rd_conf(bus_nr, 0, func, reg, 4, &val);
+	orion5x_pci_hw_rd_conf(bus_nr, devfn, reg, 4, &val);
 	val |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
-	orion5x_pci_hw_wr_conf(bus_nr, 0, func, reg, 4, val | 0x7);
+	orion5x_pci_hw_wr_conf(bus_nr, devfn, reg, 4, val | 0x7);
 }
 
 static void __init orion5x_setup_pci_wins(void)
@@ -424,7 +425,7 @@ static void __init orion5x_setup_pci_wins(void)
 
 	for (i = 0; i < dram->num_cs; i++) {
 		const struct mbus_dram_window *cs = dram->cs + i;
-		u32 func = PCI_CONF_FUNC_BAR_CS(cs->cs_index);
+		u8 devfn = PCI_DEVFN(0, PCI_CONF_FUNC_BAR_CS(cs->cs_index));
 		u32 reg;
 		u32 val;
 
@@ -432,15 +433,15 @@ static void __init orion5x_setup_pci_wins(void)
 		 * Write DRAM bank base address register.
 		 */
 		reg = PCI_CONF_REG_BAR_LO_CS(cs->cs_index);
-		orion5x_pci_hw_rd_conf(bus, 0, func, reg, 4, &val);
+		orion5x_pci_hw_rd_conf(bus, devfn, reg, 4, &val);
 		val = (cs->base & 0xfffff000) | (val & 0xfff);
-		orion5x_pci_hw_wr_conf(bus, 0, func, reg, 4, val);
+		orion5x_pci_hw_wr_conf(bus, devfn, reg, 4, val);
 
 		/*
 		 * Write DRAM bank size register.
 		 */
 		reg = PCI_CONF_REG_BAR_HI_CS(cs->cs_index);
-		orion5x_pci_hw_wr_conf(bus, 0, func, reg, 4, 0);
+		orion5x_pci_hw_wr_conf(bus, devfn, reg, 4, 0);
 		writel((cs->size - 1) & 0xfffff000,
 			PCI_BAR_SIZE_DDR_CS(cs->cs_index));
 		writel(cs->base & 0xfffff000,
-- 
2.39.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 03/10] ARM: orion5x: Pass devfn to orion5x_pci_hw_{rd,wr}_conf()

[Andrew Lunn]

On Mon, Apr 29, 2024 at 01:46:26PM +0300, Ilpo Järvinen wrote:
> Pass the usual devfn instead of individual components into
> orion5x_pci_hw_{rd,wr}_conf() to make the change into
> pci_conf1_offset() in an upcoming commit easier.
> 
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 03/10] ARM: orion5x: Pass devfn to orion5x_pci_hw_{rd,wr}_conf()

[Gregory CLEMENT]

Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> writes:

> Pass the usual devfn instead of individual components into
> orion5x_pci_hw_{rd,wr}_conf() to make the change into
> pci_conf1_offset() in an upcoming commit easier.
>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>


Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>

As some other patches of the series depend on patches in the PCIe
subsystem, the best approach would be to let you apply the series
through the PCIe subsystem.

Thanks,

Gregory


> ---
>  arch/arm/mach-orion5x/pci.c | 45 +++++++++++++++++++------------------
>  1 file changed, 23 insertions(+), 22 deletions(-)
>
> diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
> index 77ddab90f448..6376e1db6386 100644
> --- a/arch/arm/mach-orion5x/pci.c
> +++ b/arch/arm/mach-orion5x/pci.c
> @@ -270,15 +270,15 @@ static int orion5x_pci_local_bus_nr(void)
>  	return((conf & PCI_P2P_BUS_MASK) >> PCI_P2P_BUS_OFFS);
>  }
>  
> -static int orion5x_pci_hw_rd_conf(int bus, int dev, u32 func,
> -					u32 where, u32 size, u32 *val)
> +static int orion5x_pci_hw_rd_conf(int bus, u8 devfn, u32 where,
> +				  u32 size, u32 *val)
>  {
>  	unsigned long flags;
>  	spin_lock_irqsave(&orion5x_pci_lock, flags);
>  
>  	writel(PCI_CONF_BUS(bus) |
> -		PCI_CONF_DEV(dev) | ORION5X_PCI_CONF_REG(where) |
> -		ORION5X_PCI_CONF_FUNC(func) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
> +		PCI_CONF_DEV(PCI_SLOT(devfn)) | ORION5X_PCI_CONF_REG(where) |
> +		ORION5X_PCI_CONF_FUNC(PCI_FUNC(devfn)) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
>  
>  	*val = readl(PCI_CONF_DATA);
>  
> @@ -292,8 +292,8 @@ static int orion5x_pci_hw_rd_conf(int bus, int dev, u32 func,
>  	return PCIBIOS_SUCCESSFUL;
>  }
>  
> -static int orion5x_pci_hw_wr_conf(int bus, int dev, u32 func,
> -					u32 where, u32 size, u32 val)
> +static int orion5x_pci_hw_wr_conf(int bus, u8 devfn, u32 where,
> +				  u32 size, u32 val)
>  {
>  	unsigned long flags;
>  	int ret = PCIBIOS_SUCCESSFUL;
> @@ -301,8 +301,8 @@ static int orion5x_pci_hw_wr_conf(int bus, int dev, u32 func,
>  	spin_lock_irqsave(&orion5x_pci_lock, flags);
>  
>  	writel(PCI_CONF_BUS(bus) |
> -		PCI_CONF_DEV(dev) | ORION5X_PCI_CONF_REG(where) |
> -		ORION5X_PCI_CONF_FUNC(func) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
> +		PCI_CONF_DEV(PCI_SLOT(devfn)) | ORION5X_PCI_CONF_REG(where) |
> +		ORION5X_PCI_CONF_FUNC(PCI_FUNC(devfn)) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
>  
>  	if (size == 4) {
>  		__raw_writel(val, PCI_CONF_DATA);
> @@ -347,8 +347,7 @@ static int orion5x_pci_rd_conf(struct pci_bus *bus, u32 devfn,
>  		return PCIBIOS_DEVICE_NOT_FOUND;
>  	}
>  
> -	return orion5x_pci_hw_rd_conf(bus->number, PCI_SLOT(devfn),
> -					PCI_FUNC(devfn), where, size, val);
> +	return orion5x_pci_hw_rd_conf(bus->number, devfn, where, size, val);
>  }
>  
>  static int orion5x_pci_wr_conf(struct pci_bus *bus, u32 devfn,
> @@ -357,8 +356,7 @@ static int orion5x_pci_wr_conf(struct pci_bus *bus, u32 devfn,
>  	if (!orion5x_pci_valid_config(bus->number, devfn))
>  		return PCIBIOS_DEVICE_NOT_FOUND;
>  
> -	return orion5x_pci_hw_wr_conf(bus->number, PCI_SLOT(devfn),
> -					PCI_FUNC(devfn), where, size, val);
> +	return orion5x_pci_hw_wr_conf(bus->number, devfn, where, size, val);
>  }
>  
>  static struct pci_ops pci_ops = {
> @@ -375,12 +373,14 @@ static void __init orion5x_pci_set_bus_nr(int nr)
>  		 * PCI-X mode
>  		 */
>  		u32 pcix_status, bus, dev;
> +		u8 devfn;
>  		bus = (p2p & PCI_P2P_BUS_MASK) >> PCI_P2P_BUS_OFFS;
>  		dev = (p2p & PCI_P2P_DEV_MASK) >> PCI_P2P_DEV_OFFS;
> -		orion5x_pci_hw_rd_conf(bus, dev, 0, PCIX_STAT, 4, &pcix_status);
> +		devfn = PCI_DEVFN(dev, 0);
> +		orion5x_pci_hw_rd_conf(bus, devfn, PCIX_STAT, 4, &pcix_status);
>  		pcix_status &= ~PCIX_STAT_BUS_MASK;
>  		pcix_status |= (nr << PCIX_STAT_BUS_OFFS);
> -		orion5x_pci_hw_wr_conf(bus, dev, 0, PCIX_STAT, 4, pcix_status);
> +		orion5x_pci_hw_wr_conf(bus, devfn, PCIX_STAT, 4, pcix_status);
>  	} else {
>  		/*
>  		 * PCI Conventional mode
> @@ -393,15 +393,16 @@ static void __init orion5x_pci_set_bus_nr(int nr)
>  
>  static void __init orion5x_pci_master_slave_enable(void)
>  {
> -	int bus_nr, func, reg;
> +	int bus_nr, reg;
> +	u8 devfn;
>  	u32 val;
>  
>  	bus_nr = orion5x_pci_local_bus_nr();
> -	func = PCI_CONF_FUNC_STAT_CMD;
> +	devfn = PCI_DEVFN(0, PCI_CONF_FUNC_STAT_CMD);
>  	reg = PCI_CONF_REG_STAT_CMD;
> -	orion5x_pci_hw_rd_conf(bus_nr, 0, func, reg, 4, &val);
> +	orion5x_pci_hw_rd_conf(bus_nr, devfn, reg, 4, &val);
>  	val |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
> -	orion5x_pci_hw_wr_conf(bus_nr, 0, func, reg, 4, val | 0x7);
> +	orion5x_pci_hw_wr_conf(bus_nr, devfn, reg, 4, val | 0x7);
>  }
>  
>  static void __init orion5x_setup_pci_wins(void)
> @@ -424,7 +425,7 @@ static void __init orion5x_setup_pci_wins(void)
>  
>  	for (i = 0; i < dram->num_cs; i++) {
>  		const struct mbus_dram_window *cs = dram->cs + i;
> -		u32 func = PCI_CONF_FUNC_BAR_CS(cs->cs_index);
> +		u8 devfn = PCI_DEVFN(0, PCI_CONF_FUNC_BAR_CS(cs->cs_index));
>  		u32 reg;
>  		u32 val;
>  
> @@ -432,15 +433,15 @@ static void __init orion5x_setup_pci_wins(void)
>  		 * Write DRAM bank base address register.
>  		 */
>  		reg = PCI_CONF_REG_BAR_LO_CS(cs->cs_index);
> -		orion5x_pci_hw_rd_conf(bus, 0, func, reg, 4, &val);
> +		orion5x_pci_hw_rd_conf(bus, devfn, reg, 4, &val);
>  		val = (cs->base & 0xfffff000) | (val & 0xfff);
> -		orion5x_pci_hw_wr_conf(bus, 0, func, reg, 4, val);
> +		orion5x_pci_hw_wr_conf(bus, devfn, reg, 4, val);
>  
>  		/*
>  		 * Write DRAM bank size register.
>  		 */
>  		reg = PCI_CONF_REG_BAR_HI_CS(cs->cs_index);
> -		orion5x_pci_hw_wr_conf(bus, 0, func, reg, 4, 0);
> +		orion5x_pci_hw_wr_conf(bus, devfn, reg, 4, 0);
>  		writel((cs->size - 1) & 0xfffff000,
>  			PCI_BAR_SIZE_DDR_CS(cs->cs_index));
>  		writel(cs->base & 0xfffff000,
> -- 
> 2.39.2

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 04/10] ARM: orion5x: Use generic PCI Conf Type 1 helper

[Ilpo Järvinen]

Convert orion5x PCI code to use pci_conf1_ext_addr() from PCI core to
calculate PCI Configuration Type 1 address.

Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
 arch/arm/mach-orion5x/pci.c | 17 ++---------------
 1 file changed, 2 insertions(+), 15 deletions(-)

diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
index 6376e1db6386..8b7d67549adf 100644
--- a/arch/arm/mach-orion5x/pci.c
+++ b/arch/arm/mach-orion5x/pci.c
@@ -216,15 +216,6 @@ static int __init pcie_setup(struct pci_sys_data *sys)
 #define PCI_P2P_DEV_OFFS		24
 #define PCI_P2P_DEV_MASK		(0x1f << PCI_P2P_DEV_OFFS)
 
-/*
- * PCI_CONF_ADDR bits
- */
-#define ORION5X_PCI_CONF_REG(reg)	((reg) & 0xfc)
-#define ORION5X_PCI_CONF_FUNC(func)	(((func) & 0x3) << 8)
-#define PCI_CONF_DEV(dev)		(((dev) & 0x1f) << 11)
-#define PCI_CONF_BUS(bus)		(((bus) & 0xff) << 16)
-#define PCI_CONF_ADDR_EN		(1 << 31)
-
 /*
  * Internal configuration space
  */
@@ -276,9 +267,7 @@ static int orion5x_pci_hw_rd_conf(int bus, u8 devfn, u32 where,
 	unsigned long flags;
 	spin_lock_irqsave(&orion5x_pci_lock, flags);
 
-	writel(PCI_CONF_BUS(bus) |
-		PCI_CONF_DEV(PCI_SLOT(devfn)) | ORION5X_PCI_CONF_REG(where) |
-		ORION5X_PCI_CONF_FUNC(PCI_FUNC(devfn)) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
+	writel(pci_conf1_addr(bus, devfn, where, true), PCI_CONF_ADDR);
 
 	*val = readl(PCI_CONF_DATA);
 
@@ -300,9 +289,7 @@ static int orion5x_pci_hw_wr_conf(int bus, u8 devfn, u32 where,
 
 	spin_lock_irqsave(&orion5x_pci_lock, flags);
 
-	writel(PCI_CONF_BUS(bus) |
-		PCI_CONF_DEV(PCI_SLOT(devfn)) | ORION5X_PCI_CONF_REG(where) |
-		ORION5X_PCI_CONF_FUNC(PCI_FUNC(devfn)) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
+	writel(pci_conf1_addr(bus, devfn, where, true), PCI_CONF_ADDR);
 
 	if (size == 4) {
 		__raw_writel(val, PCI_CONF_DATA);
-- 
2.39.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 04/10] ARM: orion5x: Use generic PCI Conf Type 1 helper

[Gregory CLEMENT]

Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> writes:

> Convert orion5x PCI code to use pci_conf1_ext_addr() from PCI core to
> calculate PCI Configuration Type 1 address.
>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>

Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>

As some other patches of the series depend on patches in the PCIe
subsystem, the best approach would be to let you apply the series
through the PCIe subsystem.

Thanks,

Gregory

> ---
>  arch/arm/mach-orion5x/pci.c | 17 ++---------------
>  1 file changed, 2 insertions(+), 15 deletions(-)
>
> diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c
> index 6376e1db6386..8b7d67549adf 100644
> --- a/arch/arm/mach-orion5x/pci.c
> +++ b/arch/arm/mach-orion5x/pci.c
> @@ -216,15 +216,6 @@ static int __init pcie_setup(struct pci_sys_data *sys)
>  #define PCI_P2P_DEV_OFFS		24
>  #define PCI_P2P_DEV_MASK		(0x1f << PCI_P2P_DEV_OFFS)
>  
> -/*
> - * PCI_CONF_ADDR bits
> - */
> -#define ORION5X_PCI_CONF_REG(reg)	((reg) & 0xfc)
> -#define ORION5X_PCI_CONF_FUNC(func)	(((func) & 0x3) << 8)
> -#define PCI_CONF_DEV(dev)		(((dev) & 0x1f) << 11)
> -#define PCI_CONF_BUS(bus)		(((bus) & 0xff) << 16)
> -#define PCI_CONF_ADDR_EN		(1 << 31)
> -
>  /*
>   * Internal configuration space
>   */
> @@ -276,9 +267,7 @@ static int orion5x_pci_hw_rd_conf(int bus, u8 devfn, u32 where,
>  	unsigned long flags;
>  	spin_lock_irqsave(&orion5x_pci_lock, flags);
>  
> -	writel(PCI_CONF_BUS(bus) |
> -		PCI_CONF_DEV(PCI_SLOT(devfn)) | ORION5X_PCI_CONF_REG(where) |
> -		ORION5X_PCI_CONF_FUNC(PCI_FUNC(devfn)) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
> +	writel(pci_conf1_addr(bus, devfn, where, true), PCI_CONF_ADDR);
>  
>  	*val = readl(PCI_CONF_DATA);
>  
> @@ -300,9 +289,7 @@ static int orion5x_pci_hw_wr_conf(int bus, u8 devfn, u32 where,
>  
>  	spin_lock_irqsave(&orion5x_pci_lock, flags);
>  
> -	writel(PCI_CONF_BUS(bus) |
> -		PCI_CONF_DEV(PCI_SLOT(devfn)) | ORION5X_PCI_CONF_REG(where) |
> -		ORION5X_PCI_CONF_FUNC(PCI_FUNC(devfn)) | PCI_CONF_ADDR_EN, PCI_CONF_ADDR);
> +	writel(pci_conf1_addr(bus, devfn, where, true), PCI_CONF_ADDR);
>  
>  	if (size == 4) {
>  		__raw_writel(val, PCI_CONF_DATA);
> -- 
> 2.39.2

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 07/10] PCI: Replace PCI_CONF1{,_EXT}_ADDRESS() with the new helpers

[Ilpo Järvinen]

Replace the old PCI_CONF1{,_EXT}_ADDRESS() helpers used to calculate
PCI Configuration Space Type 1 addresses with the new
pci_conf1{,_ext}_offset() helpers that are more generic and more widely
available.

Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
 drivers/pci/controller/pci-ftpci100.c | 6 ++----
 drivers/pci/controller/pci-ixp4xx.c   | 5 ++---
 drivers/pci/controller/pcie-mt7621.c  | 7 +++----
 drivers/pci/pci.h                     | 8 --------
 4 files changed, 7 insertions(+), 19 deletions(-)

diff --git a/drivers/pci/controller/pci-ftpci100.c b/drivers/pci/controller/pci-ftpci100.c
index ffdeed25e961..a8d0217a0b94 100644
--- a/drivers/pci/controller/pci-ftpci100.c
+++ b/drivers/pci/controller/pci-ftpci100.c
@@ -182,8 +182,7 @@ static int faraday_raw_pci_read_config(struct faraday_pci *p, int bus_number,
 				       unsigned int fn, int config, int size,
 				       u32 *value)
 {
-	writel(PCI_CONF1_ADDRESS(bus_number, PCI_SLOT(fn),
-				 PCI_FUNC(fn), config),
+	writel(pci_conf1_addr(bus_number, fn, config, true),
 			p->base + FTPCI_CONFIG);
 
 	*value = readl(p->base + FTPCI_DATA);
@@ -214,8 +213,7 @@ static int faraday_raw_pci_write_config(struct faraday_pci *p, int bus_number,
 {
 	int ret = PCIBIOS_SUCCESSFUL;
 
-	writel(PCI_CONF1_ADDRESS(bus_number, PCI_SLOT(fn),
-				 PCI_FUNC(fn), config),
+	writel(pci_conf1_addr(bus_number, fn, config, true),
 			p->base + FTPCI_CONFIG);
 
 	switch (size) {
diff --git a/drivers/pci/controller/pci-ixp4xx.c b/drivers/pci/controller/pci-ixp4xx.c
index ec0125344ca1..fd52f4a3ef31 100644
--- a/drivers/pci/controller/pci-ixp4xx.c
+++ b/drivers/pci/controller/pci-ixp4xx.c
@@ -192,9 +192,8 @@ static u32 ixp4xx_config_addr(u8 bus_num, u16 devfn, int where)
 		       BIT(32 - PCI_SLOT(devfn));
 	} else {
 		/* type 1 */
-		return (PCI_CONF1_ADDRESS(bus_num, PCI_SLOT(devfn),
-					  PCI_FUNC(devfn), where) &
-			~PCI_CONF1_ENABLE) | PCI_CONF1_TRANSACTION;
+		return pci_conf1_addr(bus_num, devfn, where, false) |
+		       PCI_CONF1_TRANSACTION;
 	}
 }
 
diff --git a/drivers/pci/controller/pcie-mt7621.c b/drivers/pci/controller/pcie-mt7621.c
index 79e225edb42a..2b2d9828a910 100644
--- a/drivers/pci/controller/pcie-mt7621.c
+++ b/drivers/pci/controller/pcie-mt7621.c
@@ -127,8 +127,7 @@ static void __iomem *mt7621_pcie_map_bus(struct pci_bus *bus,
 					 unsigned int devfn, int where)
 {
 	struct mt7621_pcie *pcie = bus->sysdata;
-	u32 address = PCI_CONF1_EXT_ADDRESS(bus->number, PCI_SLOT(devfn),
-					    PCI_FUNC(devfn), where);
+	u32 address = pci_conf1_ext_addr(bus->number, devfn, where, true);
 
 	writel_relaxed(address, pcie->base + RALINK_PCI_CONFIG_ADDR);
 
@@ -143,7 +142,7 @@ static struct pci_ops mt7621_pcie_ops = {
 
 static u32 read_config(struct mt7621_pcie *pcie, unsigned int dev, u32 reg)
 {
-	u32 address = PCI_CONF1_EXT_ADDRESS(0, dev, 0, reg);
+	u32 address = pci_conf1_ext_addr(0, PCI_DEVFN(dev, 0), reg, true);
 
 	pcie_write(pcie, address, RALINK_PCI_CONFIG_ADDR);
 	return pcie_read(pcie, RALINK_PCI_CONFIG_DATA);
@@ -152,7 +151,7 @@ static u32 read_config(struct mt7621_pcie *pcie, unsigned int dev, u32 reg)
 static void write_config(struct mt7621_pcie *pcie, unsigned int dev,
 			 u32 reg, u32 val)
 {
-	u32 address = PCI_CONF1_EXT_ADDRESS(0, dev, 0, reg);
+	u32 address = pci_conf1_ext_addr(0, PCI_DEVFN(dev, 0), reg, true);
 
 	pcie_write(pcie, address, RALINK_PCI_CONFIG_ADDR);
 	pcie_write(pcie, val, RALINK_PCI_CONFIG_DATA);
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index cf0530a60105..fdf9624b0b12 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -833,12 +833,4 @@ struct pci_devres {
 
 struct pci_devres *find_pci_dr(struct pci_dev *pdev);
 
-#define PCI_CONF1_ADDRESS(bus, dev, func, reg) \
-	(PCI_CONF1_ENABLE | \
-	 pci_conf1_addr(bus, PCI_DEVFN(dev, func), reg & ~0x3U))
-
-#define PCI_CONF1_EXT_ADDRESS(bus, dev, func, reg) \
-	(PCI_CONF1_ENABLE | \
-	 pci_conf1_ext_addr(bus, PCI_DEVFN(dev, func), reg & ~0x3U))
-
 #endif /* DRIVERS_PCI_H */
-- 
2.39.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 07/10] PCI: Replace PCI_CONF1{,_EXT}_ADDRESS() with the new helpers

[Linus Walleij]

On Mon, Apr 29, 2024 at 12:47 PM Ilpo Järvinen
<ilpo.jarvinen@linux.intel.com> wrote:

> Replace the old PCI_CONF1{,_EXT}_ADDRESS() helpers used to calculate
> PCI Configuration Space Type 1 addresses with the new
> pci_conf1{,_ext}_offset() helpers that are more generic and more widely
> available.
>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>

Yours,
Linus Walleij

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 07/10] PCI: Replace PCI_CONF1{,_EXT}_ADDRESS() with the new helpers

[Sergio Paracuellos]

Hi,

On Mon, Apr 29, 2024 at 12:47 PM Ilpo Järvinen
<ilpo.jarvinen@linux.intel.com> wrote:
>
> Replace the old PCI_CONF1{,_EXT}_ADDRESS() helpers used to calculate
> PCI Configuration Space Type 1 addresses with the new
> pci_conf1{,_ext}_offset() helpers that are more generic and more widely
> available.
>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
> ---
>  drivers/pci/controller/pci-ftpci100.c | 6 ++----
>  drivers/pci/controller/pci-ixp4xx.c   | 5 ++---
>  drivers/pci/controller/pcie-mt7621.c  | 7 +++----
>  drivers/pci/pci.h                     | 8 --------
>  4 files changed, 7 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/pci/controller/pci-ftpci100.c b/drivers/pci/controller/pci-ftpci100.c
> index ffdeed25e961..a8d0217a0b94 100644
> --- a/drivers/pci/controller/pci-ftpci100.c
> +++ b/drivers/pci/controller/pci-ftpci100.c
> @@ -182,8 +182,7 @@ static int faraday_raw_pci_read_config(struct faraday_pci *p, int bus_number,
>                                        unsigned int fn, int config, int size,
>                                        u32 *value)
>  {
> -       writel(PCI_CONF1_ADDRESS(bus_number, PCI_SLOT(fn),
> -                                PCI_FUNC(fn), config),
> +       writel(pci_conf1_addr(bus_number, fn, config, true),
>                         p->base + FTPCI_CONFIG);
>
>         *value = readl(p->base + FTPCI_DATA);
> @@ -214,8 +213,7 @@ static int faraday_raw_pci_write_config(struct faraday_pci *p, int bus_number,
>  {
>         int ret = PCIBIOS_SUCCESSFUL;
>
> -       writel(PCI_CONF1_ADDRESS(bus_number, PCI_SLOT(fn),
> -                                PCI_FUNC(fn), config),
> +       writel(pci_conf1_addr(bus_number, fn, config, true),
>                         p->base + FTPCI_CONFIG);
>
>         switch (size) {
> diff --git a/drivers/pci/controller/pci-ixp4xx.c b/drivers/pci/controller/pci-ixp4xx.c
> index ec0125344ca1..fd52f4a3ef31 100644
> --- a/drivers/pci/controller/pci-ixp4xx.c
> +++ b/drivers/pci/controller/pci-ixp4xx.c
> @@ -192,9 +192,8 @@ static u32 ixp4xx_config_addr(u8 bus_num, u16 devfn, int where)
>                        BIT(32 - PCI_SLOT(devfn));
>         } else {
>                 /* type 1 */
> -               return (PCI_CONF1_ADDRESS(bus_num, PCI_SLOT(devfn),
> -                                         PCI_FUNC(devfn), where) &
> -                       ~PCI_CONF1_ENABLE) | PCI_CONF1_TRANSACTION;
> +               return pci_conf1_addr(bus_num, devfn, where, false) |
> +                      PCI_CONF1_TRANSACTION;
>         }
>  }
>
> diff --git a/drivers/pci/controller/pcie-mt7621.c b/drivers/pci/controller/pcie-mt7621.c
> index 79e225edb42a..2b2d9828a910 100644
> --- a/drivers/pci/controller/pcie-mt7621.c
> +++ b/drivers/pci/controller/pcie-mt7621.c
> @@ -127,8 +127,7 @@ static void __iomem *mt7621_pcie_map_bus(struct pci_bus *bus,
>                                          unsigned int devfn, int where)
>  {
>         struct mt7621_pcie *pcie = bus->sysdata;
> -       u32 address = PCI_CONF1_EXT_ADDRESS(bus->number, PCI_SLOT(devfn),
> -                                           PCI_FUNC(devfn), where);
> +       u32 address = pci_conf1_ext_addr(bus->number, devfn, where, true);
>
>         writel_relaxed(address, pcie->base + RALINK_PCI_CONFIG_ADDR);
>
> @@ -143,7 +142,7 @@ static struct pci_ops mt7621_pcie_ops = {
>
>  static u32 read_config(struct mt7621_pcie *pcie, unsigned int dev, u32 reg)
>  {
> -       u32 address = PCI_CONF1_EXT_ADDRESS(0, dev, 0, reg);
> +       u32 address = pci_conf1_ext_addr(0, PCI_DEVFN(dev, 0), reg, true);
>
>         pcie_write(pcie, address, RALINK_PCI_CONFIG_ADDR);
>         return pcie_read(pcie, RALINK_PCI_CONFIG_DATA);
> @@ -152,7 +151,7 @@ static u32 read_config(struct mt7621_pcie *pcie, unsigned int dev, u32 reg)
>  static void write_config(struct mt7621_pcie *pcie, unsigned int dev,
>                          u32 reg, u32 val)
>  {
> -       u32 address = PCI_CONF1_EXT_ADDRESS(0, dev, 0, reg);
> +       u32 address = pci_conf1_ext_addr(0, PCI_DEVFN(dev, 0), reg, true);
>
>         pcie_write(pcie, address, RALINK_PCI_CONFIG_ADDR);
>         pcie_write(pcie, val, RALINK_PCI_CONFIG_DATA);
> diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
> index cf0530a60105..fdf9624b0b12 100644
> --- a/drivers/pci/pci.h
> +++ b/drivers/pci/pci.h
> @@ -833,12 +833,4 @@ struct pci_devres {
>
>  struct pci_devres *find_pci_dr(struct pci_dev *pdev);
>
> -#define PCI_CONF1_ADDRESS(bus, dev, func, reg) \
> -       (PCI_CONF1_ENABLE | \
> -        pci_conf1_addr(bus, PCI_DEVFN(dev, func), reg & ~0x3U))
> -
> -#define PCI_CONF1_EXT_ADDRESS(bus, dev, func, reg) \
> -       (PCI_CONF1_ENABLE | \
> -        pci_conf1_ext_addr(bus, PCI_DEVFN(dev, func), reg & ~0x3U))
> -
>  #endif /* DRIVERS_PCI_H */
> --
> 2.39.2
>

I have tested in a GnuBee v1 board based on mt7621 and all PCI
enumeration and so on is working properly. Hence, for MT7621:

Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Tested-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>

Thanks,
    Sergio Paracuellos

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

[PATCH 09/10] PCI: mvebu: Use generic PCI Conf Type 1 helper

[Ilpo Järvinen]

Convert mvebu to use the pci_conf1_ext_addr() helper from PCI core
to calculate PCI Configuration Space address for Type 1 access.

Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
 drivers/pci/controller/pci-mvebu.c | 13 ++-----------
 1 file changed, 2 insertions(+), 11 deletions(-)

diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
index 29fe09c99e7d..1908754ee6fd 100644
--- a/drivers/pci/controller/pci-mvebu.c
+++ b/drivers/pci/controller/pci-mvebu.c
@@ -45,15 +45,6 @@
 #define PCIE_WIN5_BASE_OFF	0x1884
 #define PCIE_WIN5_REMAP_OFF	0x188c
 #define PCIE_CONF_ADDR_OFF	0x18f8
-#define  PCIE_CONF_ADDR_EN		0x80000000
-#define  PCIE_CONF_REG(r)		((((r) & 0xf00) << 16) | ((r) & 0xfc))
-#define  PCIE_CONF_BUS(b)		(((b) & 0xff) << 16)
-#define  PCIE_CONF_DEV(d)		(((d) & 0x1f) << 11)
-#define  PCIE_CONF_FUNC(f)		(((f) & 0x7) << 8)
-#define  PCIE_CONF_ADDR(bus, devfn, where) \
-	(PCIE_CONF_BUS(bus) | PCIE_CONF_DEV(PCI_SLOT(devfn))    | \
-	 PCIE_CONF_FUNC(PCI_FUNC(devfn)) | PCIE_CONF_REG(where) | \
-	 PCIE_CONF_ADDR_EN)
 #define PCIE_CONF_DATA_OFF	0x18fc
 #define PCIE_INT_CAUSE_OFF	0x1900
 #define PCIE_INT_UNMASK_OFF	0x1910
@@ -361,7 +352,7 @@ static int mvebu_pcie_child_rd_conf(struct pci_bus *bus, u32 devfn, int where,
 
 	conf_data = port->base + PCIE_CONF_DATA_OFF;
 
-	mvebu_writel(port, PCIE_CONF_ADDR(bus->number, devfn, where),
+	mvebu_writel(port, pci_conf1_ext_addr(bus->number, devfn, where, true),
 		     PCIE_CONF_ADDR_OFF);
 
 	switch (size) {
@@ -397,7 +388,7 @@ static int mvebu_pcie_child_wr_conf(struct pci_bus *bus, u32 devfn,
 
 	conf_data = port->base + PCIE_CONF_DATA_OFF;
 
-	mvebu_writel(port, PCIE_CONF_ADDR(bus->number, devfn, where),
+	mvebu_writel(port, pci_conf1_ext_addr(bus->number, devfn, where, true),
 		     PCIE_CONF_ADDR_OFF);
 
 	switch (size) {
-- 
2.39.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Re: [PATCH 09/10] PCI: mvebu: Use generic PCI Conf Type 1 helper

[Andrew Lunn]

On Mon, Apr 29, 2024 at 01:46:32PM +0300, Ilpo Järvinen wrote:
> Convert mvebu to use the pci_conf1_ext_addr() helper from PCI core
> to calculate PCI Configuration Space address for Type 1 access.
> 
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>

Tested on a kirkwood QNAP and an Armanda XP. The kirkwood correctly
reports there is nothing on the PCIe bus. The XP finds the two 88W8864
WiFi devices, but there is no mainline driver for it, and it also
finds an Etron Technology USB controller, which enumerates O.K.

Tested-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel