From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36286C43381 for ; Wed, 6 Mar 2019 07:52:30 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E144B2064A for ; Wed, 6 Mar 2019 07:52:29 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="YeWCRPNb" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E144B2064A Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ozxgX/fSD38MkELjLQo56s1mfnuL9wpE0Pb6f5J08vc=; b=YeWCRPNbFgn+9P9501p5PBjCu xCzQy6E+Q8VNZ20/iTPhZFRDdTV7TkWgMRK9V0I9PEn+yDeAof/hVxew7dHSbBNLkXVej4/+TMdlM 0J7zMnfOvR+mXLaBOziBR/XGofwQ+z2Pax5t1Tjpn6cCdkqquwfE911hVPuRPZX53JYcq+CEXEgRY RoPqotosai86/MYJUF59LI3ePwqKWyXs25cW/vuJbh+Q7WTbkWPA6zq2ZSIekfxBu4YXNCbqDYuCY 0h2ac9ceFK7xGVKVID9tKMciKHJQIMsn9f2qVwSacfaeXrqMKKMHCVxRaMV6umkThBfQHaQKbbYcS aL4BKpFrA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1h1RLl-0004Yo-P5; Wed, 06 Mar 2019 07:52:25 +0000 Received: from mga07.intel.com ([134.134.136.100]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1h1RLj-0004XY-F1 for linux-arm-kernel@lists.infradead.org; Wed, 06 Mar 2019 07:52:24 +0000 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Mar 2019 23:52:17 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,446,1544515200"; d="scan'208";a="121392893" Received: from mylly.fi.intel.com (HELO [10.237.72.57]) ([10.237.72.57]) by orsmga006.jf.intel.com with ESMTP; 05 Mar 2019 23:52:14 -0800 Subject: Re: [PATCH] spi-pxa2xx.c: modify the chip selection timing when spi transfer To: xiao jin , daniel@zonque.org, haojian.zhuang@gmail.com, robert.jarzmik@free.fr, broonie@kernel.org, linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, yanmin.zhang@intel.com References: <20190306030519.10746-1-jin.xiao@intel.com> From: Jarkko Nikula Message-ID: Date: Wed, 6 Mar 2019 09:52:13 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.5.1 MIME-Version: 1.0 In-Reply-To: <20190306030519.10746-1-jin.xiao@intel.com> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190305_235223_552580_72CBF195 X-CRM114-Status: GOOD ( 14.66 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "he, bo" Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi On 3/6/19 5:05 AM, xiao jin wrote: > From: "he, bo" > > We find spi can't work on board. More debug shows it's related > to the following patch that changed the chip selection assert and > deassert timing. > ^^ timing caught my attention. More below. > @@ -610,6 +596,7 @@ static void int_transfer_complete(struct driver_data *drv_data) > if (!pxa25x_ssp_comp(drv_data)) > pxa2xx_spi_write(drv_data, SSTO, 0); > > + cs_deassert(drv_data); > spi_finalize_current_transfer(drv_data->master); This > @@ -1070,6 +1057,7 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *master, > pxa2xx_spi_write(drv_data, SSTO, chip->timeout); > } > > + cs_assert(drv_data); and this is not correct with core message loop. It will cause the chip select is toggled with each transfer in PIO mode. If there is no cs_change flag set then there shouldn't be CS toggling between the transfers if SPI message consists of multiple transfers. More over this patch also will regress with DMA mode since there won't be CS deassert at all. Timing reminded me I've seen two cases where there was a timing related glitch in CS output: d0283eb2dbc1 ("spi: pxa2xx: Add output control for multiple Intel LPSS chip selects") 7a8d44bc89e5 ("spi: pxa2xx: Fix too early chipselect deassert") Do you have a possibility to measure with an oscilloscope what goes wrong with the CS after d5898e19c0d7 ("spi: pxa2xx: Use core message processing loop")? Can you share your setup if I can reproduce it here? E.g. SPI clock frequency, single or multiple CS, frequency of occurrence, etc -- Jarkko _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel