From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1E885C1B0E3 for ; Mon, 14 Dec 2020 13:25:55 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9D507224B1 for ; Mon, 14 Dec 2020 13:25:54 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9D507224B1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:Message-ID:References:In-Reply-To:Subject:To:From: Date:MIME-Version:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=xV47/P5Un4uheHJIQSv2B1+moCdLhy5isKIESvTgW5U=; b=R+nu/e11mU1gyL3vJnK5+zUU3 7CYocxVaFA2P7Naqd3FH9tIFdyKzOA9gDhlDRLvj8CX+dhAHEieGWJ9xQJkAE/WWfqnCsMh1qqIza JA/iCZXjiM5vG695iTetXCRGkC6rv2ZSVg3dcyNp86WM+ZJW8+Fo1oTKCUYK66Ws5rpg1a7V1+Fac ecg9rwMSTqIwVP+xGGdugWYDmmrrwE7RrtAKGVo1nEAvl9RCMwmP/DnTnyqfs6kCvmlZmz1dY/fyk 5DyUowe/a9Cn9JgWBOUoUFcPLxv57n6YIE4oEu5VncNygtLH2PkSwkpKbLS0hJvXOW/OHayZgsOgD ggxIUqWEw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1konq8-0003oh-A2; Mon, 14 Dec 2020 13:24:36 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1konq6-0003oJ-1p for linux-arm-kernel@lists.infradead.org; Mon, 14 Dec 2020 13:24:34 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 1114C224B1; Mon, 14 Dec 2020 13:24:33 +0000 (UTC) Received: from disco-boy.misterjones.org ([51.254.78.96] helo=www.loen.fr) by disco-boy.misterjones.org with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.94) (envelope-from ) id 1konq2-0016Zg-Tw; Mon, 14 Dec 2020 13:24:31 +0000 MIME-Version: 1.0 Date: Mon, 14 Dec 2020 13:24:30 +0000 From: Marc Zyngier To: Pingfan Liu Subject: Re: [PATCH] arm64/irq: use NMI to send stop IPI In-Reply-To: References: <1607433270-9807-1-git-send-email-kernelfans@gmail.com> User-Agent: Roundcube Webmail/1.4.9 Message-ID: X-Sender: maz@kernel.org X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: kernelfans@gmail.com, linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com, will@kernel.org, mark.rutland@arm.com, julien.thierry@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201214_082434_176225_C6F65C36 X-CRM114-Status: GOOD ( 21.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Catalin Marinas , Will Deacon , linux-arm-kernel@lists.infradead.org, Julien Thierry Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2020-12-14 13:04, Pingfan Liu wrote: > On Mon, Dec 14, 2020 at 5:46 PM Marc Zyngier wrote: >> >> On 2020-12-14 02:20, Pingfan Liu wrote: >> >> [...] >> >> > After serval days of chasing this issue, I have a raw idea about it. >> > What about re-structure the code like >> > DEFINE_IDTENTRY_SYSVEC_SIMPLE(sysvec_reschedule_ipi) ? >> >> I'm not sure how you want to mimic what x86 does, given that we have >> at least three different root interrupt controllers on arm64 (plus >> a fourth coming up), all of which have access methods that are not >> part of the CPU architecture, and that are shared with the 32bit >> part. >> > I just found that Mark had implemented enter_el1_irq_or_nmi() for > arm64, and think it is another way to handle the problem. > > I had thought if aligned to x86, then linux/kernel/entry/common.c can > be used. It may bring benefits, e.g. shift off the rcu/lockdep/dyntick > to core kernel. Using the entry/common.c stuff is indeed what we are planning to do, but the current arm64 code doesn't lend itself to that just yet, > > Anyway, I am a new beginner at this. If my opinion is not good enough, > please just ignore it. >> > I will send a series soon afterward. >> >> Please wait until the merge window is over. >> > Sorry that it has been sent out before your reply. If there is V2, I > will do it after the merge window. Please look at the series I pointed you too (and its follow-up), which has most of what you are trying to achieve already. Thanks, M. -- Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel