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Mon, 21 Sep 2026 13:04:52 -0500 Received: from lelvem-mr05.itg.ti.com (10.180.75.9) by DFLE200.ent.ti.com (10.64.6.58) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.45 via Frontend Transport; Mon, 21 Sep 2026 13:04:52 -0500 Received: from [10.249.36.64] ([10.249.36.64]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 68LI4pis3463236; Mon, 21 Sep 2026 13:04:52 -0500 Message-ID: Date: Mon, 21 Sep 2026 13:04:51 -0500 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 4/6] arm64: dts: ti: k3-j784s4-j742s2-main-common: Assign SRAM to VPU nodes To: Nishanth Menon CC: "Kumar, Udit" , , , , , , , , , References: <20260810205206.685971-1-b-brnich@ti.com> <20260810205206.685971-5-b-brnich@ti.com> <01ff0252-1580-4934-af34-6ef70d874f10@ti.com> <20260921172746.jge67yswqjeolwz3@impulse> Content-Language: en-US From: Brandon Brnich In-Reply-To: <20260921172746.jge67yswqjeolwz3@impulse> Content-Type: text/plain; charset="UTF-8"; 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>>>> clocks = <&k3_clks 241 2>; >>>> power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>; >>>> + sram = <&main_navss_sram>; >>>> }; >>>> vpu1: video-codec@4220000 { >>>> @@ -1010,6 +1011,7 @@ vpu1: video-codec@4220000 { >>>> interrupts = ; >>>> clocks = <&k3_clks 242 2>; >>>> power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>; >>>> + sram = <&main_navss_sram>; >>>> }; >>> >>> Hello Brandon, >>> Could you check, how two instances of hardware can share same sram ? >> >> If both instances are used in parallel, then only 1 would get the benefits >> of b/w savings with this current patch. These VPU instances are in a race to >> see who gets the pool depending on which instance allocates the first >> stream. Current Wave5 driver will take the entire 64 KB pool once a stream >> is opened. The pool is not released until all associated streams with that >> instance are freed. >> >> I will look to see if the driver can be modified at all here. If it can't, >> then I will find another node of available SRAM that I can hook up to 2nd >> instance. For now, we can drop this patch and associated patch adding >> main_navss_sram to J784s4 in this series. > > OK - What do i translate this as? We may need to change SRAM / need > more SRAM? Since this is a pool, I'd rather have the driver use SRAM > optimally before pulling in more SoC SRAM - if we really need it, lets > send an update explaining the usecase where more SRAM was needed. > > Am I correct? Yes, you are correct. Driver should use the pool more efficiently so that if both instances are pointing at same pool, they could at least do lower resolution streams without hogging all 64KB. This would also help in case of other IPs using this pool. VPU could take what it needs and allow other IPs to still allocate from here. However, if both instances are doing 4K60 encode and decode, then each will need 64KB to get full benefits of b/w savings. If allocating for max case (which driver plans for) is the path that should be taken, then carving out a 2nd 64KB pool and attaching it to vpu1 is the correct approach. Best, Brandon